coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2016-11-08	quick_ram_check: Remove reference to RAMBASE	Kyösti Mälkki
2016-11-08	intel car: Remove references to DCACHE_RAM_ROMSTACK_SIZE	Kyösti Mälkki
2016-11-07	mainboard/intel/kblrvp: Remove unused code in dptf.asl	Naresh G Solanki
2016-11-07	mainboard/intel/kblrvp: Configure usb over current pin & cdclock	Naresh G Solanki
2016-11-07	mainboard/intel/kblrvp: Enable Build with ChromeOS	Naresh G Solanki
2016-11-07	mainboard/intel/kblrvp: Add Chrome EC switch	Naresh G Solanki
2016-11-07	intel/kunimitsu: Update DPTF settings	Sumeet Pawnikar
2016-11-07	google/lars: Update DPTF settings	Sumeet Pawnikar
2016-11-07	soc/intel/skylake: Add _ACx methods for TSR0 sensor for fan control	Sumeet Pawnikar
2016-11-07	lpss_i2c: Increase transaction timeout	Duncan Laurie
2016-11-07	soc/intel/{sky,apollo}lake: Wait until GPE is clear when reading	Duncan Laurie
2016-11-07	drivers/i2c/tpm/cr50: Increase IRQ timeout	Duncan Laurie
2016-11-07	southbridge/amd: Update Kconfig and makefiles for 00670F00	Marc Jones
2016-11-07	amd/pi/hudson: Move audio to northbridge	Marshall Dawson
2016-11-07	vendorcode/amd: Update Kconfig and makefiles for 00670F00	Marc Jones
2016-11-07	vendorcode/amd: Modify 0067F00 for binaryPI	Marshall Dawson
2016-11-07	vendorcode/amd: Copy 00670F00 files from PI package	Marshall Dawson
2016-11-07	vendorcode/amd: Copy 00660F01 directory to 00670F00	Marc Jones
2016-11-07	arch/x86/acpigen: Add OperationRegion & Field method	Naresh G Solanki
2016-11-07	pci_ids.h: Correct recent AMD ID names	Marshall Dawson
2016-11-07	mainboard/google/reef: update DMIC related pins configuration	Sathyanarayana Nujella
2016-11-07	soc/intel/apollolake: Add pmc_ipc device support	Lijian Zhao
2016-11-07	soc/intel/skylake: Fix SATA booting to OS issue	Subrata Banik
2016-11-07	vboot: Disable vboot verification when Chrome EC disabled	Naresh G Solanki
2016-11-07	soc/intel/skylake: Avoid use of variable Local0 in TEVT in thermal.asl	Naresh G Solanki
2016-11-07	soc/intel/skylake: Add device id for PCH-Y	Naresh G Solanki
2016-11-07	riscv: Unify SBI call implementations under arch/riscv/	Jonathan Neuschäfer
2016-11-07	mb/lowrisc/nexys4ddr: Actually fix the UART clock setup	Jonathan Neuschäfer
2016-11-06	soc/intel/common: log event when MRC cache is updated	Aaron Durbin
2016-11-06	elog: add sources to reflect full event type namespace usage	Aaron Durbin
2016-11-06	elog: fix default elog_add_event_raw() declaration	Aaron Durbin
2016-11-06	Add option to use Ada code in ramstage	Nico Huber
2016-11-04	reef: tune trackpad i2c frequency to 400kHz	Aaron Durbin
2016-11-04	reef: tune tpm i2c frequency to 400kHz	Aaron Durbin
2016-11-03	mainboard/intel/kblrvp: Update onboard memory specific configs	Naresh G Solanki
2016-11-03	mainboard/intel/kblrvp: Update gpio.h, spd.h & mainboard.c	Naresh G Solanki
2016-11-03	google/veyron*: change .ddrconfig from 14 to 3	ZhengShunQian
2016-11-03	google/veyron*: add DDR configs for new samsung DDR	ZhengShunQian
2016-11-03	rockchip/rk3399: sdram.c: Fix msch ddrconfig register error	Lin Huang
2016-11-03	soc/intel/apollolake: Implement SPI flash status register read	Furquan Shaikh
2016-11-02	nb/intel/i945/early_init.c: Use "IS_ENABLED(CONFIG_ ....)"	Elyes HAOUAS
2016-11-02	vendorcode/amd/f14: Fix ignored argument in IDS_HDT_CONSOLE	Łukasz Dobrowolski
2016-11-02	riscv: Add a bandaid for the new toolchain	Ronald G. Minnich
2016-11-02	amd/hudson: Add PSP2 build for combo BIOS	Marc Jones
2016-11-02	util/amdfwtool: Fix duplicate long option name	Marshall Dawson
2016-11-02	northbridge/amd: Modify 00670F00 chip.h to match DCT	Marshall Dawson
2016-11-02	northbridge/amd: Update 00670F00 asl for reduced hardware	Marshall Dawson
2016-11-02	northbridge/amd: Update all names and IDs for 00670F00	Marc Jones
2016-11-02	northbridge/amd: Copy 00660F01 directories to 00670F00	Marc Jones
2016-11-02	pci_ids.h: Add ID for amd/00670F00 northbridge	Marshall Dawson