Age | Commit message (Collapse) | Author |
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But linux still refuses to believe this table. What's odd is this is the identical table used in V1. Damn.
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buildtarget now takes either a directory, and uses directory/Config.lb, or
takes a file
epia defaults to 256k flash
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don't use mptable on solo, it's not an SMP system.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1161 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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Now to fix the ram ...
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Still probably wrong.
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But nothing is getting set into the north bridge.
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ron
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more via fixes
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(i.e. with CPU1 not connected to ACROSS link of CPU0)
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drop old configuration method.
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Major restructuring of hypertransport handling.
Major rewerite of superio/NSC/pc87360 as a proof of concept for handling superio resources dynamically
Updates to hard_reset handling when resetting because of the need to change hypertransport link
speeds and widths.
(a) No longer assume the boot is good just because we get to a hard reset point.
(b) Set a flag to indicate that the BIOS triggered the reset so we don't decrement the
boot counter.
Updates to arima/hdama mptable so it tracks the new bus numbers
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* subtractive resources
* merging with the static device tree
* more device types than just pci
- The piece to watch out for is the new enable_resources method that was needed in all of the drivers
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