coreboot - Some coreboot project code with my work

Age	Commit message (Expand)	Author
2020-06-15	sandybridge boards: Factor out MAX_CPUS	Angel Pons
2020-04-16	autoport: use GMA_STATIC_DISPLAYS	Iru Cai
2020-03-24	drivers/intel/gma: Ditch `link_frequency_270_mhz` setting	Nico Huber
2020-01-14	autoport: Add Xeon E3-1200 v2 memory controller ID	Jonathan A. Kollasch
2020-01-08	util/autoport: correct build errors of produced files	Angel Pons
2019-05-12	nb/intel/snb: Drop NORTHBRIDGE_INTEL_IVYBRIDGE	Nico Huber
2019-03-18	util/autoport: Trim gfx.did to size	Angel Pons
2019-03-14	util/autoport: remove obsolete symbol SANDYBRIDGE_IVYBRIDGE_LVDS	Alexander Couzens
2019-03-13	util/autoport: Separate NB and SB PCIe port IDs	Angel Pons
2019-01-24	cpu/intel/model_206ax: Remove the notion of sockets	Arthur Heymans
2019-01-18	util/autoport: Break very long line	Angel Pons
2019-01-18	util/autoport: Correct DSDT include statement	Angel Pons
2018-08-05	southbridge/intel/bd82x6x/Kconfig: Do not include any IFD by default	Angel Pons
2017-07-30	intel/sandybridge: Clean VGA BIOS ids up a little	Nico Huber
2017-07-30	intel/sandybridge: Gather MMCONF_BASE_ADDRESS defaults	Nico Huber
2017-05-03	util/autoport: Add the PCI ID of the iGPU for the Intel i7 3770K	Omar Pakker
2016-03-05	sandybridge/gma_lvds: support both Sandy&Ivy on one board	Iru Cai
2016-02-12	Make MRC vs native a config rather than making a separate chipset for it.	Vladimir Serbinenko
2016-02-09	sandybridge: Set all native gfx-related options in northbridge code.	Vladimir Serbinenko
2015-10-22	gma ACPI: Make brightness levels a per board setting	Nico Huber
2015-10-11	Kill lvds_num_lanes	Vladimir Serbinenko
2015-10-11	Derive lvds_dual_channel from EDID timings.	Vladimir Serbinenko
2015-10-03	sandybridge ivybridge: Treat native init as first class citizen	Alexandru Gagniuc
2015-05-29	autoport: Write autoport together with porting guide for sandy/ivybridge.	Vladimir Serbinenko