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path: root/util/inteltool
AgeCommit message (Expand)Author
2019-09-05inteltool: Add Skylake Xeon E DMI3 Host bridge IdMaxim Polyakov
2019-09-05inteltool: add Lewisburg C62x GPIOs supportMaxim Polyakov
2019-09-04inteltool: add Lewisburg family C62x chipset PCI IDsMaxim Polyakov
2019-07-31inteltool: Add GPIO support for Skylake-H chipsetsFelix Singer
2019-07-29util/inteltool: Add H110 GPIO supportPavel Sayekat
2019-07-23util/*/Makefile: Rename -W to -WextraJacob Garber
2019-07-16util/inteltool: Shrink buffer sizeJacob Garber
2019-07-07util/inteltool: Enable -Wmissing-prototypesJacob Garber
2019-07-07util/inteltool: Make internal functions staticJacob Garber
2019-05-15util/inteltool: Add Kabylake E3-1200 SupportChristian Walter
2019-05-13util/inteltool: Use appropriate channel for printing timingsJacob Garber
2019-05-06inteltool: Add Sunrise Point-LP Skylake PCH IDsFelix Singer
2019-04-11util/inteltool: Swap conditions to prevent uninit readsJacob Garber
2019-03-15inteltool: add 300 and C240 Series PCHThomas Heijligen
2019-03-06inteltool: Add multiple device IDs of Intel GPUsFelix Singer
2019-03-05util/inteltool: Add Apollo Lake GPIO groups and namesNico Huber
2019-01-21util/inteltool: Add support for DenvertonThomas Heijligen
2019-01-05util/inteltool: fix PCR init of Sunrise Point-LP devicesShaleen Jain
2018-12-28util/inteltool: Add support for Sunrise Point LPMatthew Garrett
2018-11-29util/inteltool: Add Apollo Lake LPC ID and allow to read PCRsNico Huber
2018-11-17treewide: use /usr/bin/env where appropriateYegor Timoshenko
2018-10-18util/inteltool: Fix LynxPoint (non-LP) GPIO register mapFehér Roland Ádám
2018-07-26util: Add description.md to each utilTom Hiller
2018-06-21inteltool: Add PCI IDs for the C220 PCH seriesqeed
2018-06-11inteltool: Add dumping of full PCR portsYouness Alaoui
2018-06-04util/inteltool: Add Pentium 4 model f6xElyes HAOUAS
2018-03-27inteltool: Add some Skylake desktop idsNico Huber
2018-03-15util/inteltool: Add missing #include <string.h>Nico Huber
2018-02-06inteltool: Add Cougar- and Pantherpoint PCH PCI IDs for SPIArthur Heymans
2018-02-06inteltool: Fix displaying 64bit spi registersArthur Heymans
2018-01-15inteltool: Dump Sunrise Point PCH-H GPIO groupsNico Huber
2018-01-15inteltool: Support for nasty Primary to Sideband Bridge (P2SB)Nico Huber
2018-01-10util/inteltool: Add Skylake Desktop NorthbridgeChristoph Pomaska
2017-12-22inteltool: Add hint for compiler to avoid fall-through warningPaul Menzel
2017-12-20util/inteltool: Add GPU device IDsPatrick Rudolph
2017-11-08util/inteltool: Add Skylake definition to MCHBAR readingMaximilian Schander
2017-11-08util/inteltool: Add PCIEXBAR and PXPEPBAR reading for SkylakeMaximilian Schander
2017-11-08util/inteltool: Add Skylake DMIBAR register dumpingMaximilian Schander
2017-11-03inteltool: Add southbridge and CPU definitions for SkylakeMaximilian Schander
2017-08-22util/inteltool: Remove duplicated error message, switch to snprintfMaciej Suminski
2017-08-20util/inteltool: Fix a comparison between signed and unsigned integersMaciej Suminski
2017-07-28util/inteltool: Clean up checkpatch.pl warningsPratik Prajapati
2017-07-28util/inteltool: Add support for SGX statusPratik Prajapati
2017-07-15inteltool: Add support for Skylake PMCNico Huber
2017-06-14inteltool/Makefile: Clean .dependencies tooNico Huber
2017-06-14inteltool/Makefile: Separate CPPFLAGS from CFLAGSNico Huber
2017-06-09inteltool: Add Skylake PCI id in memory.cNico Huber
2017-06-07Use more secure HTTPS URLs for coreboot sitesPaul Menzel
2017-06-06inteltool: #include <commonlib/helpers.h>Nico Huber
2017-06-06inteltool/ahci: Don't print reserved, all-zero registersNico Huber
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