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2008-02-18Should be part of changeset 3106.Rudolf Marek
This patch introduces virtual LDNs changes for W83627EHF driver. Not only LDN 7 and 9 are changed, but also a SPI flash interface which has enable on bit1 and not bit0. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3108 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-18Rename almost all occurences of LinuxBIOS to coreboot. Stefan Reinauer
Due to the automatic nature of this update, I am self-acking. It worked in abuild. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-08-11- fix dependency rule for Makefile and Makefile.settingsRichard Smith
The make dependency rule for Makefile and Makefile.settings was completely broken. No way it ever worked. OLPC buildrom flushed out this issue. If you updated the Config.lb file in your target/<mfg>/<mainboard> directory and then switched to target/<mfg>/<mainboard>/<target> and ran 'make' you would get a permission denied error due to the make file trying to run 'config.py' directly rather than 'python config.py' We never saw this because we always run target/buildtarget <target> and that sets up everything correctly. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2373 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2006-05-02add automatic payload compression method to LinuxBIOSStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2288 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-12-021201_ht_bus0_dev0_fidvid_core.diffStefan Reinauer
https://openbios.org/roundup/linuxbios/issue41 Lord have mercy upon us. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2118 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2005-07-06cleaning cvs leftoversarch import user (historical)
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1919 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-22- Add the cpu path support. Oops I failed to commit this earlierEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1790 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-20added missing cpu and cpu_bus supportGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1788 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-05- Ensure the all target is the first commands in the makefile....Eric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1754 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-05- Put the rule for the Makefile at the bottom of the makefile!Eric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1753 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-05- In the makefile header get the name of the Makefile correctEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1752 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-11-05- Massage the code to generate the top level Makefile so theEric Biederman
generated Makefile has correct dependencies and is somewhat complete. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1751 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-21- Bump the LinuxBIOS major versionEric Biederman
- Rename chip_config chip_operations throughout the tree - Fix Config.lb on most of the Opteron Ports - Fix the amd 8000 chipset support for setting the subsystem vendor and device ids - Add detection of devices that are on the motherboard (i.e. In Config.lb) - Baby step in getting the resource limit handling correct, Ignore fixed resources - Only call enable_childrens_resources on devices we know will have children For some busses like i2c it is non-sense and we don't want it. - Set the resource limits for pnp devices resources. - Improve the resource size detection for pnp devices. - Added a configuration register to amd8111_ide.c so we can enable/disable individual ide channels - Added a header file to hold the prototype of isa_dma_init - Fixed most of the superio chips so the should work now, the via superio pci device is the exception. - The code compiles and runs so it is time for me to go to bed. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1698 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-18- FIXED resources are also ASSIGNED resourcesEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1687 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-18- Set the parent's link properly in the bus fieldEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1686 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-16- Bump MAX_LINKS to 4 I have actually found an i2c bridge that needs thisEric Biederman
- Fix the hdama Config.lb to not longer use the link keywords oops, and instead to have it nest everything properly. - Update config.g to not support the link keyword - update config.g to not support northbridge/southbridge/cpu/pmc noise words we can just use chip now. - Remove old link handling from the code - Detect and handle duplicate paths so we generate one device with multiple links git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1685 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-16- HDAMA boots!Eric Biederman
- Set the bootstrap processor flag in the mptable. - Implement 64bit support in our print statements - Fix the reporting of how many cpus we are waiting to stop. It is the 1 less than the actual number of cpus running. - Actually enable cpu_initialization. - Fix firstsiblingdevice in config.g - Add IORESOURCE_FIXED to all of the resources set by config.g - Fix the apic_cluster rule to add an apic_cluster path not an apic path. - Add a div64.h to assist in the 64bit printf. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1682 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-16- First stab at running linuxbios without the old static device tree.Eric Biederman
Things are close but not quite there yet. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1681 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-16- Fix config.g and the hdama config so everthing builds again.Eric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1680 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-15add back stuff from beforeRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1679 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-15fixes for apic, i2cRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1678 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-15closerRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1677 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-15this now works right.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1676 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14more or less more or less brokenRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1668 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14more breakage, thanks to RonRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1665 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14- Add chip and a few other bug fixesEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1656 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-03remove brain-dead verify codeGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1590 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-29chaged chip_device_path::enable to chip_device_path::enabled,Li-Ta Lo
again, I am the only one who can't speak English. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1544 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-13back out incorrect commit on config.gLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1501 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-13porting getpir to freebios2Li-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1500 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-23These changes tighten up rules for exporting options.Greg Watson
1. Exportable options ('export used') used to be exported if referred to in a 'uses' statement. These options will now only be exported if the option is set, or the default value is changed. 2. Options marked as 'export always' with no default value ('default none') used to generate defines with no values 'export k8:='. This behavior has changed so that the option will ONLY be exported if it has a value assigned using 'set' or 'default'. Otherwise it is an error. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1467 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-11- Moved hlt() to it's own header.Eric Biederman
- Reworked pnp superio device support. Now complete superio support is less than 100 lines. - Added support for hard coding resource assignments in Config.lb - Minor bug fixes to romcc - Initial support for catching the x86 processor BIST error codes. I've only seen this trigger once in production during a very suspcious reset but... - added raminit_test to test the code paths in raminit.c for the Opteron - Removed the IORESOURCE_SET bit and added IORESOURCE_ASSIGNED and IORESOURCE_STORED so we can tell what we have really done. - Added generic AGP/IOMMU setting code to x86 - Added an implementation of memmove and removed reserved identifiers from memcpy - Added minimal support for booting on pre b3 stepping K8 cores - Moved the checksum on amd8111 boards because our default location was on top of extended RTC registers - On the Hdama added support for enabling i2c hub so we can get at the temperature sensors. Not that i2c bus was implemented well enough to make that useful. - Redid the Opteron port so we should only need one reset and most of memory initialization is done in cpu_fixup. This is much, much faster. - Attempted to make the VGA IO region assigment work. The code seems to work now... - Redid the error handling in amdk8/raminit.c to distinguish between a bad value and a smbus error, and moved memory clearing out to cpufixup. - Removed CONFIG_KEYBOARD as it was useless. See pc87360/superio.c for how to setup a legacy keyboard properly. - Reworked the register values for standard hardware, moving the defintions from chip.h into the headers of the initialization routines. This is much saner and is actually implemented. - Made the hdama port an under clockers BIOS. I debuged so many interesting problems. - On amd8111_lpc added setup of architectural/legacy hardware - Enabled PCI error reporting as much as possible. - Enhanded build_opt_tbl to generate a header of the cmos option locations so that romcc compiled code can query the cmos options. - In romcc gracefully handle function names that degenerate into function pointers - Bumped the version to 1.1.6 as we are getting closer to 2.0 TODO finish optimizing the HT links of non dual boards TODO make all Opteron board work again TODO convert all superio devices to use the new helpers TODO convert the via/epia to freebios2 conventions TODO cpu fixup/setup by cpu type git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1390 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-07config.gGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1383 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-02-04- Update to the latest config.gEric Biederman
- Everything except if statements should work correctly git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1367 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-11-05New option behavior:Greg Watson
1. Options can only be set with 'option' statement in the target configuration file. Options can be set as many times as needed. 2 Option DEFAULT values can be changed (or set) in any configuration file. Changing a default value will display a warning message. 3. A default value is changed with the statement 'default <op> = <val>'. 4. Setting an option overrides the default value. 5. The 'mainboard' and 'arch' statements now set options implicitly. No 'uses' statement is required. The idea is that parts will define default values for options that they need/use. Option overrides are only done in the target file. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1258 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-14- Fix the link check so it actually checks for the appropriate maximum linkEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1218 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-10-11 - O2, enums, and switch statements work in romccEric Biederman
- Support for compiling romcc on non x86 platforms - new romc options -msse and -mmmx for specifying extra registers to use - Bug fixes to device the device disable/enable framework and an amd8111 implementation - Move the link specification to the chip specification instead of the path - Allow specifying devices with internal bridges. - Initial via epia support - Opteron errata fixes git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1200 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-26fix buildrom statement if there's only one romimage specified.Stefan Reinauer
roms always needs to be an array. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1143 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-25allow default settings in the mainboard fileRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1137 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-17add filename to buildromStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1117 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-12add cvsignore fileStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1113 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-12add "clean" targetStefan Reinauer
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1112 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-09-01- Updates to config.g so that it works more reliably and has initial supportEric Biederman
for paths - Renamed some configuration variables SMP -> CONFIG_SMP MAX_CPUS -> CONFIG_MAX_CPUS MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS - Removed some dead configuration variables MAX_CPUS -> CONFIG_MAX_CPUS MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS SMP -> CONFIG_SMP FINAL_MAINBOARD_FIXUP SIO_BASE SIO_SYSTEM_CLK_INPUT NO_KEYBOARD USE_NORMAL_IMAGE SERIAL_CONSOLE USE_ELF_BOOT ENABLE_FIXED_AND_VARIABLE_MTRRS START_CPU_SEG DISABLE_WATCHDOG ENABLE_IOMMU AMD8111_DEV - Removed some assembly files that are no longer needed killed src/southbridge/amd/amd8111/smbus.inc killed src/southbrideg/amd/amd8111/cmos_boot_failover.inc killed src/ram/ramtest.inc - Updates to config.g so that it works more reliably and has initial support for paths - Renamed some configuration variables SMP -> CONFIG_SMP MAX_CPUS -> CONFIG_MAX_CPUS MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS - Removed some dead configuration variables MAX_CPUS -> CONFIG_MAX_CPUS MAX_PHYSICAL_CPUS -> CONFIG_MAX_PHYSICAL_CPUS SMP -> CONFIG_SMP FINAL_MAINBOARD_FIXUP SIO_BASE SIO_SYSTEM_CLK_INPUT NO_KEYBOARD USE_NORMAL_IMAGE SERIAL_CONSOLE USE_ELF_BOOT ENABLE_FIXED_AND_VARIABLE_MTRRS START_CPU_SEG DISABLE_WATCHDOG ENABLE_IOMMU AMD8111_DEV - Removed some assembly files that are no longer needed killed src/southbridge/amd/amd8111/smbus.inc killed src/southbrideg/amd/amd8111/cmos_boot_failover.inc killed src/ram/ramtest.inc killed src/sdram/generic_dump_spd.inc killed src/sdram/generic_dump_spd.inc - Updated the arima/hdama to build with the new configuration system - Updated config.g to list all of the variables with make echo git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1093 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-06I mean it this time. NO more unnecessary 'dir' commands for cpus.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1082 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-06end silly multiple sources of /cpu/whatever.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1081 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-05Fixed version skew problem.Greg Watson
Use warning() and fatal(). git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1072 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-05- Update the Makefile to have a proper ALL: targetEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1069 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-08-04Commits for the new config static device design, to allow more than one staticRonald G. Minnich
cpu of a certain type and to eliminate the cpu p5 cpu p6 cpu k7 nonsense in the old config files. Next step is to hook into Eric's pci device stuff. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1067 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-28Added support for naming instances of parts. This is to allow arbitraryGreg Watson
device arrangement that can be statically configured during boot. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1058 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2003-07-25added a bit of error checking!Greg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1041 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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