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2020-09-11sconfig: Allow to link devices to other device's driversNico Huber
Rarely, the driver of one device needs to know about another device that can be anywhere in the device hierarchy. Current applications boil down to EEPROMs that store information that is consumed by some code (e.g. MAC address). The idea is to give device nodes in the `devicetree.cb` an alias that can later be used to link it to a device driver's `config` structure. The driver has to declare a field of type `struct device *`, e.g. struct some_chip_driver_config { DEVTREE_CONST struct device *needed_eeprom; }; In the devicetree, the referenced device gets an alias, e.g. device i2c 0x50 alias my_eeprom on end The author of the devicetree is free to choose any alias name that is unique in the devicetree. Later, when configuring the driver the alias can be used to link the device with the field of a driver's config: chip some/chip/driver use my_eeprom as needed_eeprom end Override devices can add an alias if it does not exist, but cannot change the alias for a device that already exists. Alias names are checked for conflicts both in the base tree and in the override tree. References are resolved after the tree is parsed so aliases and references do not need to be in a specific order in the tree. Change-Id: I058a319f9b968924fbef9485a96c9e3f900a3ee8 Signed-off-by: Nico Huber <nico.huber@secunet.com> Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35456 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-07-06devicetree: Remove weak declarations for opsKyösti Mälkki
Make it compulsory to build with all the drivers that are visible in the board devicetree.cb file. Change-Id: Ifb783e2f733d5c65c615e5c1879e3e4c7a83e049 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35086 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2020-06-02sconfig: Add support for firmware configurationDuncan Laurie
This change adds support to sconfig for generating the firmware configuration field and option definitions in devicetree.cb. In addition these fields and options can be used to probe for a device and have that device be disabled if it is not found at boot time. New tokens: fw_config: top level token, table can be defined before chips field: define field in the mask with the start and end bits option: define option in a field with the value of the field probe: indicate that a device should probe by field and option Example: fw_config field FEATURE 0 0 option DISABLE 0 option ENABLE 1 end end chip drivers/generic/feature device generic 0 on probe FEATURE ENABLE end end Variants can add new fields and add new options to existing fields in overridetree.cb but cannot redefine an existing option. Devices can have multiple probe tokens, and the device will be considered to be found if any of them return true. The output from defining this field are: 1) the various fields and options will be added as macro constants to static.h and can be used by fw_config for probing. 2) the probe entries will result in a list of fields/options to probe that is added to the resulting struct device and handled by coreboot. BUG=b:147462631 Signed-off-by: Duncan Laurie <dlaurie@google.com> Change-Id: I8aea63e577d933aea09e0d0b09470929cc96e0de Reviewed-on: https://review.coreboot.org/c/coreboot/+/41440 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2020-06-02util/sconfig: Move default includes out of emit_chips()Nico Huber
This should make it easier to add more includes. Change-Id: Ib4a25352901408c2b36de4972391df742a0d8037 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41744 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-06-02util/sconfig: Refactor and fix add_register()Nico Huber
add_register() contained a duplicate check but only compared the new key to the first (smallest in order) list member. Fix that and factor the list handling out so it can be used by other functions. Change-Id: I5a8346f36fa024351e1282c9681868ecf451b283 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41743 Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-12util/sconfig: Add LPC and ESPI busesRaul E Rangel
Picasso has an LPC and eSPI bridge on the same PCI DEVFN. They can both be active at the same time. This adds a way to specify which devices belong on which bus. i.e., device pci 14.3 on # - D14F3 bridge device espi 0 on chip ec/google/chromeec device pnp 0c09.0 on end end end device lpc 0 on end end BUG=b:154445472 TEST=Built trembyle and saw static.c contained the espi bus. Signed-off-by: Raul E Rangel <rrangel@chromium.org> Change-Id: I0c2f40813c05680f72e5f30cbb13617e8f994841 Reviewed-on: https://review.coreboot.org/c/coreboot/+/41099 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2020-05-09util/: Replace GPLv2 boiler plate with SPDX headerPatrick Georgi
Used commands: perl -i -p0e 's|\/\*[\s*]*.*is free software[:;][\s*]*you[\s*]*can[\s*]*redistribute[\s*]*it[\s*]*and\/or[\s*]*modify[\s*]*it[\s*]*under[\s*]*the[\s*]*terms[\s*]*of[\s*]*the[\s*]*GNU[\s*]*General[\s*]*Public[\s*]*License[\s*]*as[\s*]*published[\s*]*by[\s*]*the[\s*]*Free[\s*]*Software[\s*]*Foundation[;,][\s*]*version[\s*]*2[\s*]*of[\s*]*the[\s*]*License.[\s*]*This[\s*]*program[\s*]*is[\s*]*distributed[\s*]*in[\s*]*the[\s*]*hope[\s*]*that[\s*]*it[\s*]*will[\s*]*be[\s*]*useful,[\s*]*but[\s*]*WITHOUT[\s*]*ANY[\s*]*WARRANTY;[\s*]*without[\s*]*even[\s*]*the[\s*]*implied[\s*]*warranty[\s*]*of[\s*]*MERCHANTABILITY[\s*]*or[\s*]*FITNESS[\s*]*FOR[\s*]*A[\s*]*PARTICULAR[\s*]*PURPOSE.[\s*]*See[\s*]*the[\s*]*GNU[\s*]*General[\s*]*Public[\s*]*License[\s*]*for[\s*]*more[\s*]*details.[\s*]*\*\/|/* SPDX-License-Identifier: GPL-2.0-only */|' $(cat filelist) perl -i -p0e 's|This[\s*]*program[\s*]*is[\s*]*free[\s*]*software[:;][\s*]*you[\s*]*can[\s*]*redistribute[\s*]*it[\s*]*and/or[\s*]*modify[\s*]*it[\s*]*under[\s*]*the[\s*]*terms[\s*]*of[\s*]*the[\s*]*GNU[\s*]*General[\s*]*Public[\s*]*License[\s*]*as[\s*]*published[\s*]*by[\s*]*the[\s*]*Free[\s*]*Software[\s*]*Foundation[;,][\s*]*either[\s*]*version[\s*]*2[\s*]*of[\s*]*the[\s*]*License,[\s*]*or[\s*]*.at[\s*]*your[\s*]*option.*[\s*]*any[\s*]*later[\s*]*version.[\s*]*This[\s*]*program[\s*]*is[\s*]*distributed[\s*]*in[\s*]*the[\s*]*hope[\s*]*that[\s*]*it[\s*]*will[\s*]*be[\s*]*useful,[\s*]*but[\s*]*WITHOUT[\s*]*ANY[\s*]*WARRANTY;[\s*]*without[\s*]*even[\s*]*the[\s*]*implied[\s*]*warranty[\s*]*of[\s*]*MERCHANTABILITY[\s*]*or[\s*]*FITNESS[\s*]*FOR[\s*]*A[\s*]*PARTICULAR[\s*]*PURPOSE.[\s*]*See[\s*]*the[\s*]*GNU[\s*]*General[\s*]*Public[\s*]*License[\s*]*for[\s*]*more[\s*]*details.[\s*]*\*\/|/* SPDX-License-Identifier: GPL-2.0-or-later */|' $(cat filelist) perl -i -p0e 's|\/\*[\s*]*.*This[\s*#]*program[\s*#]*is[\s*#]*free[\s*#]*software[;:,][\s*#]*you[\s*#]*can[\s*#]*redistribute[\s*#]*it[\s*#]*and/or[\s*#]*modify[\s*#]*it[\s*#]*under[\s*#]*the[\s*#]*terms[\s*#]*of[\s*#]*the[\s*#]*GNU[\s*#]*General[\s*#]*Public[\s*#]*License[\s*#]*as[\s*#]*published[\s*#]*by[\s*#]*the[\s*#]*Free[\s*#]*Software[\s*#]*Foundation[;:,][\s*#]*either[\s*#]*version[\s*#]*3[\s*#]*of[\s*#]*the[\s*#]*License[;:,][\s*#]*or[\s*#]*.at[\s*#]*your[\s*#]*option.*[\s*#]*any[\s*#]*later[\s*#]*version.[\s*#]*This[\s*#]*program[\s*#]*is[\s*#]*distributed[\s*#]*in[\s*#]*the[\s*#]*hope[\s*#]*that[\s*#]*it[\s*#]*will[\s*#]*be[\s*#]*useful[;:,][\s*#]*but[\s*#]*WITHOUT[\s*#]*ANY[\s*#]*WARRANTY[;:,][\s*#]*without[\s*#]*even[\s*#]*the[\s*#]*implied[\s*#]*warranty[\s*#]*of[\s*#]*MERCHANTABILITY[\s*#]*or[\s*#]*FITNESS[\s*#]*FOR[\s*#]*A[\s*#]*PARTICULAR[\s*#]*PURPOSE.[\s*#]*See[\s*#]*the[\s*#]*GNU[\s*#]*General[\s*#]*Public[\s*#]*License[\s*#]*for[\s*#]*more[\s*#]*details.[\s*]*\*\/|/* SPDX-License-Identifier: GPL-3.0-or-later */|' $(cat filelist) perl -i -p0e 's|(\#\#*)[\w]*.*is free software[:;][\#\s]*you[\#\s]*can[\#\s]*redistribute[\#\s]*it[\#\s]*and\/or[\#\s]*modify[\#\s]*it[\s\#]*under[\s \#]*the[\s\#]*terms[\s\#]*of[\s\#]*the[\s\#]*GNU[\s\#]*General[\s\#]*Public[\s\#]*License[\s\#]*as[\s\#]*published[\s\#]*by[\s\#]*the[\s\#]*Free[\s\#]*Software[\s\#]*Foundation[;,][\s\#]*version[\s\#]*2[\s\#]*of[\s\#]*the[\s\#]*License.*[\s\#]*This[\s\#]*program[\s\#]*is[\s\#]*distributed[\s\#]*in[\s\#]*the[\s\#]*hope[\s\#]*that[\s\#]*it[\s\#]*will[\#\s]*be[\#\s]*useful,[\#\s]*but[\#\s]*WITHOUT[\#\s]*ANY[\#\s]*WARRANTY;[\#\s]*without[\#\s]*even[\#\s]*the[\#\s]*implied[\#\s]*warranty[\#\s]*of[\#\s]*MERCHANTABILITY[\#\s]*or[\#\s]*FITNESS[\#\s]*FOR[\#\s]*A[\#\s]*PARTICULAR[\#\s]*PURPOSE.[\#\s]*See[\#\s]*the[\#\s]*GNU[\#\s]*General[\#\s]*Public[\#\s]*License[\#\s]*for[\#\s]*more[\#\s]*details.\s(#* *\n)*|\1 SPDX-License-Identifier: GPL-2.0-only\n\n|' $(cat filelist) perl -i -p0e 's|(\#\#*)[\w*]*.*is free software[:;][\s*]*you[\s*]*can[\s*]*redistribute[\s*]*it[\s*]*and\/or[\s*]*modify[\s*]*it[\s*]*under[\s*]*the[\s*]*terms[\s*]*of[\s*]*the[\s*]*GNU[\s*]*General[\s*]*Public[\s*]*License[\s*]*as[\s*]*published[\s*]*by[\s*]*the[\s*]*Free[\s*]*Software[\s*]*Foundation[;,][\s*]*version[\s*]*2[\s*]*of[\s*]*the[\s*]*License.[\s*]*This[\s*]*program[\s*]*is[\s*]*distributed[\s*]*in[\s*]*the[\s*]*hope[\s*]*that[\s*]*it[\s*]*will[\s*]*be[\s*]*useful,[\s*]*but[\s*]*WITHOUT[\s*]*ANY[\s*]*WARRANTY;[\s*]*without[\s*]*even[\s*]*the[\s*]*implied[\s*]*warranty[\s*]*of[\s*]*MERCHANTABILITY[\s*]*or[\s*]*FITNESS[\s*]*FOR[\s*]*A[\s*]*PARTICULAR[\s*]*PURPOSE.[\s*]*See[\s*]*the[\s*]*GNU[\s*]*General[\s*]*Public[\s*]*License[\s*]*for[\s*]*more[\s*]*details.\s(#* *\n)*|\1 SPDX-License-Identifier: GPL-2.0-only\n\n|' $(cat filelist) Change-Id: I1008a63b804f355a916221ac994701d7584f60ff Signed-off-by: Patrick Georgi <pgeorgi@google.com> Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41177 Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-09AUTHORS, util/: Drop individual copyright noticesPatrick Georgi
We have the git history which is a more reliable librarian. Change-Id: Idbcc5ceeb33804204e56d62491cb58146f7c9f37 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41175 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: ron minnich <rminnich@gmail.com>
2020-05-07util/sconfig: Drop use of ref_count for chip_instanceFurquan Shaikh
chip_instance structure currently uses a ref_count to determine how many devices hold reference to that instance. If the count drops to zero, then it is assumed that the chip instance is a duplicate in override tree and has a similar instance that is already overriden in base device tree. ref_count is currently decremented whenever a device in override tree matches the one in base device tree and the registers from the override tree instance are copied over to the base tree instance. On the other hand, if a device in override tree does not match any device in base tree under a given parent, then the device is added to base tree and all the devices in its subtree that hold pointers to its parent chip instance are updated to point to the parent's chip instance in base tree. This is done as part of update_chip_pointers. However, there are a couple of issues that this suffers from: a) If a device is present only in override tree and it does not have its own chip (i.e. pointing to parent's chip instance), then it results in sconfig emiiting parent's chip instance (which can be the SoC chip instance) in static.c even though it is unused. This is because update_chip_pointers() does not call delete_chip_instance() before reassigning the chip instance pointer. b) If a device is added under root device only in the override tree and it does not have its own chip instance (i.e. uses SoC chip instance), then it results in sconfig emitting a copy of the SoC chip instance and setting that as chip_ops for this new device in the override tree. In order to fix the above issues, this change drops the ref_count field from chip_instance structure and instead adds a forwarding pointer `base_chip_instance`. This is setup as per the following rules: 1. If the instance belongs to base devicetree, base_chip_instance is set to NULL. 2. If the instance belongs to override tree, then it is set to its corresponding chip instance in base tree (if present), else set to NULL. State of base_chip_instance is then used when emitting chips and devices using the following rules: 1. If a chip_instance has non-NULL base_chip_instance, then that chip instance is not emitted to static.c 2. When emitting chip_ops for a device, base_chip_instance is used to determine the correct chip instance name to emit. BUG=b:155549176 TEST=Verified that the static.c file generated for base/override tree combination is correct when new devices without chips are added only to override tree. Change-Id: Idbb5b34f49bf874da3f30ebb6a6a0e2d8d091fe5 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41007 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-05-07util/sconfig: Move chip instance id assignment to emit_chips()Furquan Shaikh
This change moves the assignment of id for chip instance from new_chip_instance() to emit_chips(). This is similar to the previous change for moving dev id assignment to happen much later. This ensures that the same ID gets assigned to a chip when adding support for device trees which makes it easier to compare static.c files. BUG=b:155549176 Change-Id: I3efa9af5ed91123675be42bce1cb389bad19cb62 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41006 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2020-05-07util/sconfig: Drop id from struct device maintained by sconfigFurquan Shaikh
This change drops the id field from struct device as used by sconfig. It was primarily used for generating unique device names. This was maintained within device structure so that the order in which the device tree entries were parsed is clear. Since the ids are assigned in parsing order, it is problematic when a device is moved from base devicetree to override tree. The entire parsing order changes which makes it really difficult to compare what really changed in static.c file. By moving the dev name assignment to happen later when doing pass0 of static.c generation, the difference in static.c file is minimized when adding support for override trees. BUG=b:155549176 Change-Id: I31870ace5a2fd7d5f95ab5e30d794c3bc959ed46 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/41005 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2020-05-05sconfig: Allow `register` entries below devices, tooNico Huber
Every device belongs to a chip. And we already keep that relation by inheriting the `.chip_info` pointer if downstream devices don't have another chip specified. So we can also allow to specify `register` settings at the device level. Change-Id: I44e6b95d0cd708fef69b152ebc46b869b2bb9205 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/40803 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2020-03-30util/sconfig: emit NULL sibling fieldsAaron Durbin
It's helpful to see the sibling field, even when it's NULL, when debugging the static.c output from a devictree.cb file. Ensure the NULL fields are emitted for fullness. Change-Id: Ib6d5b8164769a6512e762d5a525c7df1f429c866 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/39862 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2020-02-08Add configurable ramstage support for minimal PCI scanningRonald G. Minnich
This CL has changes that allow us to enable a configurable ramstage, and one change that allows us to minimize PCI scanning. Minimal scanning is a frequently requested feature. To enable it, we add two new variables to src/Kconfig CONFIGURABLE_RAMSTAGE is the overall variable controlling other options for minimizing the ramstage. MINIMAL_PCI_SCANNING is how we indicate we wish to enable minimal PCI scanning. Some devices must be scanned in all cases, such as 0:0.0. To indicate which devices we must scan, we add a new mandatory keyword to sconfig It is used in place of on, off, or hidden, and indicates a device is enabled and mandatory. Mandatory devices are always scanned. When MINIMAL_PCI_SCANNING is enabled, ONLY mandatory devices are scanned. We further add support in src/device/pci_device.c to manage both MINIMAL_PCI_SCANNING and mandatory devices. Finally, to show how this works in practice, we add mandatory keywords to 3 devices on the qemu-q35. TEST= 1. This is tested and working on the qemu-q35 target. 2. On CML-Hatch Before CL: Total Boot time: ~685ms After CL: Total Boot time: ~615ms Change-Id: I2073d9f8e9297c2b02530821ebb634ea2a5c758e Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/36221 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jeremy Soller <jeremy@system76.com>
2020-01-28commonlib: Add commonlib/bsdJulius Werner
This patch creates a new commonlib/bsd subdirectory with a similar purpose to the existing commonlib, with the difference that all files under this subdirectory shall be licensed under the BSD-3-Clause license (or compatible permissive license). The goal is to allow more code to be shared with libpayload in the future. Initially, I'm going to move a few files there that have already been BSD-licensed in the existing commonlib. I am also exracting most contents of the often-needed <commonlib/helpers.h> as long as they have either been written by me (and are hereby relicensed) or have an existing equivalent in BSD-licensed libpayload code. I am also relicensing <commonlib/compression.h> (written by me) and <commonlib/compiler.h> (same stuff exists in libpayload). Finally, I am extracting the cb_err error code definitions from <types.h> into a new BSD-licensed header so that future commonlib/bsd code can build upon a common set of error values. I am making the assumption here that the enum constants and the half-sentence fragments of documentation next to them by themselves do not meet the threshold of copyrightability. Change-Id: I316cea70930f131e8e93d4218542ddb5ae4b63a2 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/38420 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org>
2019-11-26util/sconfig: Fix illogical override rule for resourceBill XIE
The old logic only uses the type to identify resources, which makes a resource in override tree overriding the first resource with the same type (but possibly different index) in base tree, and resources with same type (but again different index) in override tree overriding each other. Resources had better be identified with both their type and index. Change-Id: I7cd88905a8d6d1c7c6c03833835df2fba83047ea Signed-off-by: Bill XIE <persmule@hardenedlinux.org> Reviewed-on: https://review.coreboot.org/c/coreboot/+/37109 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-10-05util/sconfig: Issue header for exposed PCI and PNP namesNico Huber
Let `sconfig` output a C header file with the symbol names that we generate since 5e2a2cd5e7 (util/sconfig: Expose usable PCI and PNP device names). We add another command line argument for the path to the header file. As the file is similar in nature to our `config.h` we simply put it in $(obj)/ too. Change-Id: I8f87288c82f2844b61eba6534797a42b978b47bb Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/35488 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2019-09-06util/sconfig: Expose usable PCI and PNP device namesKyösti Mälkki
These devices can be accessed directly by symbolname, without a search and walk through the tree, as they have static paths. Change-Id: I711058f5c809fa9bc7ea4333aaebad6847ebdfd4 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31933 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-17device: Move pci_irqs outside DEVTREE_EARLYKyösti Mälkki
Only needed in ramstage, and only for MP tables. Change-Id: Ia7c1e153b948aeefa4c3bea4920b02a91a417096 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/33922 Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-07-12util/sconfig: Fix compile error with older glibc-headersWerner Zeh
In patch e29a6ac16a9f478fc00ce7cb83f3779954e3168d (util/sconfig: Add commonlib/helpers.h) helpers.h has been added to the include-list. In headers.h we have a definition for __unused: On a host system environment where glibc-headers-2.12-1.212 is installed, a file included by <sys/stat.h> called bits/stat.h have the following content on line 105 and onwards: long int __unused[3]; where the mentioned part is part of the structure called struct stat. If we include commonlib/helpers.h _before_ <sys/stat.h>, the symbol for __unused will be defined by the preprocessor to be '__attribute__((unused))', therefore the above mentioned structure member will be expanded by the preprocessor to be 'long int __attribute__((unused))[3];', which is not a valid C syntax and therefore produces a compile error for sconfig tool. To handle this case we need to make sure commonlib/helpers.h is included _after_ <sys/stat.h>. As the needed part of stat.h (which is struct stat) is only used in main.c it is safe to move the include from sconfig.h directly into main.c while taking care of the order. Change-Id: I9e6960a318d3dd999e1e9c1df326d67094f3b5ce Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/34236 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-07-10util/sconfig: Add commonlib/helpers.hKyösti Mälkki
Followup work injects ARRAY_SIZE() in static.c Change-Id: Ifbcaa1b613aef312d3876e8b536499a9f01a8d19 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31932 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr> Reviewed-by: Martin Roth <martinroth@google.com>
2019-07-10util/sconfig: Declare the repeated devicetree storageKyösti Mälkki
With DEVTREE_EARLY we could create incomplete device objects with topology links removed to reduce footprint for bootblock. Declare everything with 'static __unused DEVTREE_CONST' to avoid compiler errors and to not expose unusable device object names to global scope. Change-Id: Ie4cb9e75f179f44edf4f8256ad8320bc2d4ae71a Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31931 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2019-05-22util/sconfig: Move 'static' at beginning of declarationElyes HAOUAS
When using -Werror=old-style-declaration, gcc reports an error: "'static' is not at beginning of declaration" Tested on 945G-M4 board. Change-Id: I7216a4fab2d5878066c871166e6a481d1f201a9d Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32900 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2019-05-07sconfig: Add SMBIOS type 9 entriesPatrick Rudolph
Add the new field 'smbios_slot_desc', which takes 2 to 4 arguments. The field is valid for PCI devices and only compiled if SMBIOS table generation is enabled. smbios_slot_desc arguments: 1. slot type 2. slot lenth 3. slot designation (optional) 4. slot data width (optional) Example: device pci 1c.1 on smbios_slot_desc "21" "3" "MINI-PCI-FULL" "8" end # PCIe Port #2 Integrated Wireless LAN Tested on Lenovo T520. Change-Id: If95aae3c322d3da47637613b9a872ba1f7af9080 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32307 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2019-04-24util/sconfig: Throw an error if override tree has no devicesFurquan Shaikh
If override tree does not have any device, then the chip info structure in it cannot be associated with the correct device and ends up being added as a standalone chip info structure without any device actually using it. This change prevents this condition by throwing an error during compilation. BUG=b:130342895 Change-Id: I7b8bb6b3228030a465976ca32ce8ef63f41365dd Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/32289 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-09-16sconfig: Allow setting device status in device treeHung-Te Lin
For devices supporting both Linux and Windows, we may find some ACPI devices that only need drivers in Linux and should not even be shown in Windows Device Manager UI. The new 'hidden' keyword in device tree 'device' statement allows devices sharing same driver to call acpi_gen_writeSTA with different values. BUG=b:72200466 BRANCH=eve TEST=Builds and boots properly on device eve Change-Id: Iae881a294b122d3a581b456285d2992ab637fb8e Signed-off-by: Hung-Te Lin <hungte@chromium.org> Reviewed-on: https://review.coreboot.org/28566 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2018-07-26util: Add description.md to each utilTom Hiller
Descriptions are taken from the files themselves or READMEs. Description followed by a space with the language in marked up as code. Change-Id: I5f91e85d1034736289aedf27de00df00db3ff19c Signed-off-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-on: https://review.coreboot.org/27563 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-06-25util/sconfig: Get rid of ops from struct deviceFurquan Shaikh
"ops" field was used in device structure only to add default_dev_ops_root for root device. It was always set to NULL for all other devices. This change gets rid of ops field from struct device and instead hardcodes default_dev_ops_root in pass1 for root device. BUG=b:80081934 TEST=Verified that static.c generated with and without this change is exactly the same. Change-Id: I0848788610c2ed27274daf4920de3068a9784d4c Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/27209 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-25util/sconfig: Add support for overriding base tree properties/nodeFurquan Shaikh
This change adds support to allow variants to override the devices and properties in base device tree by providing an override device tree. It works as follows: 1. Both base and override device trees are parsed from provided input files. 2. Walk through the trees in lockstep fashion using depth-first traversal checking if a node in override tree has a matching node in base tree. - If matching node is found, then update the properties of base node using the override node. Continue walking the children of the nodes. - If matching node is not found, then copy the entire override subtree of the node under the current base parent. In addition to that, chip instance pointers of the nodes in override tree need to be updated if they were pointing to the override parents chip instance. Since chip always expects a device to be present, it leads to a side-effect that overriding chip registers requires that a device is always provided for the chip in the override tree as well. BUG=b:80081934 Change-Id: I6604e4f8abe3fc48240e942fea32da96031e1e46 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/27206 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-25util/sconfig: Enable parsing of override device treeFurquan Shaikh
This change allows sconfig utility to accept an extra optional parameter to specify override device tree that can be used to override the properties or add new devices in addition to that provided by base device tree. This is helpful for variants that share most of the devicetree but have to override certain registers or add some devices which might not be applicable to base devicetree. In order to support the override devicetree, following changes are made in this CL: 1. override_root_dev and override_root_bus are provided. 2. main() function is updated to accept an optional argument. 3. If override device file is provided, then parse_devicetree is called for override_devtree as well. This change in itself does not provide the override feature. It is only a small step towards the final goal. The override devicetree parsed by sconfig is currently unused. BUG=b:80081934 Change-Id: I477e038c8922ae1a9ed5d8bf22a5f927a19a69c7 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26689 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-13util/sconfig: Prepare sconfig to allow parsing multiple treesFurquan Shaikh
In preparation to allow devicetree overrides, it will be necessary to use the same parsing functions to prepare two separate parse trees. This change does the following things: 1. Updates root device and bus names to add base_ prefix. 2. Adds a function parse_devicetree that sets the root_parent and linenum before calling yyparse(). 3. Updates all uses of root_dev to refer to the next base_root_dev. BUG=b:80081934 TEST=Verified that static.c generated for all boards built using abuild is the same with and without this change. Change-Id: I403a90c1ebf07ac66115ddfe137daf0980dc1a18 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/27017 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-06-08util/sconfig: Get rid of rescnt in struct deviceFurquan Shaikh
This change gets rid of rescnt member in struct device since it is redundant. "res" member can be used to determine if resource list is present or not. BUG=b:80081934 TEST=Verified that static.c generated with and without this CL is exactly the same for all boards built using abuild. Change-Id: I73a2361686ad1130716a7d29576f2d02b9ed33c1 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26806 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-08util/sconfig: Re-factor device structure in parse treeFurquan Shaikh
This change re-factors the device structure in parse tree to be able to support multidev devices just like non-multidev devices. With this change, every device has a bus under it which is the parent of all devices that fall on the bus. If there are duplicate entries in the devicetree, then there will be multiple buses under the device and each bus will have its own set of children. The tree starts out with a root device which has a root bus under it. This is a special device which is created statically and its parent is its own root bus. When parsing the device tree file, devices get added under the root bus as children. Since this change re-organizes the way devicetree is represented, it gets rid of latestchild and next_sibling pointers from struct device. Also, the tree traversal to generate static.c is changed to breadth-first walk instead of using the next_sibling. BUG=b:80081934 TEST=Verified using abuild that all boards compile successfully. Change-Id: Ic8c8a73a247e8e992ab6b1b2cc3131e06fa2e5a1 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26800 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-08util/sconfig: Make queue handling more generic within main.cFurquan Shaikh
This change updates queue handling routines to be more generic so that it can be used by more than just chip queue. Additionally, it provides functions to dequeue element from head and peek head of a queue which will be used in a follow-up commit. BUG=b:80081934 TEST=Verified that abuild compiles successfully for all boards. Change-Id: Ibd2de85b48c5d4e2790bf974ea3bb1bd387f66ee Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26802 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-08sconfig/main.c: Fix number of arguments in fprintfMaulik V Vaghela
During compilation sconfig/main.c gives an error regarding number of arguments passed in fprintf. BUG=none BRANCH=none TEST=check if compilation warning has been fixed Change-Id: Ia769cc606a1e3f7e1188cd82235442493d37f664 Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/26972 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-08util/sconfig: Get rid of unused parameter to walk_device_treeFurquan Shaikh
This change gets rid of unused 3rd parameter chips to the function walk_device_tree. BUG=b:80081934 TEST=Verified that abuild compiles successfully for all boards. Change-Id: I255ff030562073b16310fc22a0981808bf2c062f Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26801 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-05util/sconfig: Get rid of nextdev member in struct deviceFurquan Shaikh
Now that chips and devices are treated differently and the device tree actually contains only devices, next and nextdev are exactly the same for all devices in the tree. This change gets rid of nextdev pointer and updates all uses of nextdev to next. BUG=b:80081934 TEST=Verified that static.c generated for all boards built by abuild is same with and without this change. Change-Id: Ie50b3d769a78fe0beddba2e5551441b43cb212a2 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26741 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-05util/sconfig: Get rid of struct headerFurquan Shaikh
Now that chips and devices are treated differently in sconfig, this change gets rid of struct header and add_header function which were responsible for maintaining list of headers that need to be added to static.c. Instead, struct chip is re-factored into struct chip and struct chip_instance, where chip is a list of unique chips required by the mainboard whereas chip_instance is an instance of the chip. One chip can have multiple instances dependending upon the devices in the system. Also, struct device is updated to hold a pointer to chip instance instead of the chip structure. This unique list of chips is then used to add appropriate headers to static.c BUG=b:80081934 TEST=Verified using abuild that all boards compile successfully. Change-Id: I6fccdf7c361b4f55a831195adcda9b21932755aa Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26739 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-05util/sconfig: Add helper function for allocating memoryFurquan Shaikh
Add a helper function s_alloc (sconfig alloc) that allocates memory using calloc to get 0 initialized memory and checks to ensure it is not NULL. BUG=b:80081934 Change-Id: I56a70cf4865c50ed238226ace86e867bb1ec53db Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26738 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-05util/sconfig: Get rid of bus pointer in device structureFurquan Shaikh
The only reason bus pointer existed in device structure in sconfig was to allow a node to point to the parent which could be a chip and bus which is the true parent in device tree hierarchy. Now that chip is no longer a device, there is no need for separate bus and parent pointers. This change gets rid of the redundant bus pointer in struct device in sconfig. BUG=b:80081934 TEST=Verified that static.c generated for all boards built by abuild is same with and without this change. Change-Id: I21f8fe1545a9ed53d66d6d4462df4a5d63023844 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26736 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-05util/sconfig: Re-factor emitting of headers to static.cFurquan Shaikh
This change removes call to add_header from parsing functions and moves it to a local function within main.c. It also adds a new function emit_headers that is responsible for creating the linked list for chip headers and emitting those to static.c BUG=b:80081934 TEST=Verified that static.c for all files compiled using abuild is the same with and without this change. Change-Id: I24d526e81323115d3cc927242a4b9e49414afbe0 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26726 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-05util/sconfig: Re-factor sconfig to not assume chip as deviceFurquan Shaikh
This change adds a new structure "struct chip" to identify elements of type chip rather than re-using the structure for device. Until now chip was treated as a device while generating the parse tree and then device tree postprocessing skipped over all the chip entries in children and sibling pointers of device nodes. With this change, the device tree will only contain struct device in the parsed tree. It helps by avoiding unnecessary pointers to chip structure as children or next_sibling and then skipping those elements in post processing. Every device can then hold a pointer to its chip. When generating static.c, chip structure is emitted before device structure to ensure that the device structure has chip within its scope. Externally, the only visible change in static.c should be the order in which chip/device elements are emitted i.e. previously all chips under a particular device were emitted to static.c and then the devices using those chips. Now, all chips are emitted before all the devices in static.c BUG=b:80081934 TEST=Verified that abuild is successful for all boards. Also, verified that static.c generated for eve, kahlee, scarlet, asrock imb_a180 is unchanged from before in node definitions. Change-Id: I255092f527c8eecb144385eb681df20e54caf8f5 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26720 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-05-11devicetree: Add USB device typeDuncan Laurie
This commit adds support for describing USB ports in devicetree.cb. It allows a USB port location to be described in the tree with configuration information, and ACPI code to be generated that provides this information to the OS. A new scan_usb_bus() is added that will scan bridges for devices so a tree of ports and hubs can be created. The device address is computed with a 'port type' and a 'port id' which is flexible for SOC to handle depending on their specific USB setup and allows USB2 and USB3 ports to be described separately. For example a board may have devices on two ports, one with a USB2 device and one with a USB3 device, both of which are connected to an xHCI controller with a root hub: xHCI | RootHub | | USB2[0] USB3[2] device pci 14.0 on chip drivers/usb/acpi register "name" = ""Root Hub"" device usb 0.0 on chip drivers/usb/acpi register "name" = ""USB 2.0 Port 0"" device usb 2.0 on end end chip drivers/usb/acpi register "name" = ""USB 3.0 Port 2"" device usb 3.2 on end end end end end Change-Id: I64e6eba503cdab49be393465b535e139a8c90ef4 Signed-off-by: Duncan Laurie <dlaurie@google.com> Reviewed-on: https://review.coreboot.org/26169 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2018-01-25sconfig: Add a new mmio resource typeJustin TerAvest
Add support for a mmio resource in the devicetree to allow memory-mapped IO addresses to be assigned to given values. AMD platforms perform a significant amount of configuration through these MMIO addresses, including I2C bus configuration. BUG=b:72121803 Change-Id: I5608721c22c1b229f527815b5f17fff3a080c3c8 Signed-off-by: Justin TerAvest <teravest@chromium.org> Reviewed-on: https://review.coreboot.org/23319 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-04-25lib: provide clearer devicetree semanticsAaron Durbin
The devicetree data structures have been available in more than just ramstage and romstage. In order to provide clearer and consistent semantics two new macros are provided: 1. DEVTREE_EARLY which is true when !ENV_RAMSTAGE 2. DEVTREE_CONST as a replacment for ROMSTAGE_CONST The ROMSTAGE_CONST attribute is used in the source code to mark the devicetree data structures as const in early stages even though it's not just romstage. Therefore, rename the attribute to DEVTREE_CONST as that's the actual usage. The only place where the usage was not devicetree related is console_loglevel, but the same name was used for consistency. Any stage that is not ramstage has the const C attribute applied when DEVTREE_CONST is used. Change-Id: Ibd51c2628dc8f68e0896974f7e4e7c8588d333ed Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/19333 Tested-by: build bot (Jenkins) Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
2017-04-14util/blobtool & sconfig: Update GENPARSER Kconfig questionMartin Roth
blobtool uses the same sort of update mechanism for the .l & .y files, so update the SCONFIG_GENPARSER Kconfig question to encompass both utilities. - Change the name to UTIL_GENPARSER, and update the help text. - Update sconfig's makefile. - Add the check to blobtool's makefile. - Update the makefiles to check for y, not defined. Change-Id: I6215791c9a019bce37d4a150b65d1fdbb9073156 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/19229 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-02-16sconfig: Add a new "SPI" device typeFurquan Shaikh
Update sconfig lex and yacc files to add support for a new "SPI" device type in the devicetree. SPI device takes only parameter i.e. chip select number for the device on the SPI bus. Re-generate the shipped files for sconfig using flex 2.6.0 and bison 3.0.4 (make CONFIG_SCONFIG_GENPARSER=1). Clean up local paths that leak into generated files. BUG=chrome-os-partner:59832 BRANCH=None TEST=Compiles successfully. Change-Id: If0831e25b3e4ed87827ad92356d7bf47b6387884 Signed-off-by: Furquan Shaikh <furquan@chromium.org> Reviewed-on: https://review.coreboot.org/18339 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@chromium.org>
2016-08-08sconfig: Reformat C codeMartin Roth
Change-Id: Idfd1bd8240413026b992ae1382a57bccf9d8ddb5 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/16082 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-08-08sconfig: Remove mainboard chip.h supportMartin Roth
The mainboard chip.h files were (mostly) removed long ago. Change-Id: I1d5a9381945427c96868fa17756e6ecabb1048b2 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/16080 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-08-08sconfig: Remove bootblock and Kconfig modesMartin Roth
The command line parameters for these modes haven't worked in two years and nobody noticed. They're obviously not getting used, so remove them. TEST=Generate static.c before and after the change, verify they're identical. Change-Id: I1d746fb53a2f232155f663f4debc447d53d4cf6b Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/16079 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-06-16 04:16:35 +0000