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2019-03-06util/superiotool/ite.c: add support for IT8613EKrystian Hebel
Based on not publicly available IT8613E Preliminary Specification V0.3. Change-Id: Iec99d4d998f645dbad9c803d6d5477580b0bccc4 Signed-off-by: Krystian Hebel <krystian.hebel@3mdeb.com> Reviewed-on: https://review.coreboot.org/c/coreboot/+/31620 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2019-01-25util/superiotool: detect Fintek F81866, F8196*Kyle Stevenson
F81866 detection tested with the iBASE SI-613: superiotool r4.9-420-g034e5e6 Found Fintek F81866 (vid=0x3419, id=0x1010) at 0x4e F8196* detection is based on chip IDs provided by iBASE, but untested. Change-Id: I7210e1523a188a8593cd03547bb0c95cd3e7aa39 Signed-off-by: Kyle Stevenson <kstevenson@comqi.com> Reviewed-on: https://review.coreboot.org/c/31052 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2019-01-15util/superiotool: Add ITE8528Patrick Rudolph
Add ITE8528 which can be found on the wedge100s. Most registers are dumped from hardware. No datasheet is publicy available. Change-Id: I24b12c0032157a4959336f8b51dadbe7b2e09d66 Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/c/30801 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2019-01-04util/superiotool: Add ITE IT8786E-IKyösti Mälkki
Based on IT8786E-I V0.4.1 datasheet with following remark: "Please note that the IT8786E-I V0.4.1 is applicable only to the D version." Signed-off-by: Kyösti Mälkki <kyosti.malkki@3mdeb.com> Signed-off-by: Michał Żygowski <michal.zygowski@3mdeb.com> Change-Id: Ibf6e290abb01ae1b6b28173a83e88d1d99663ad4 Reviewed-on: https://review.coreboot.org/c/30334 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-11-17treewide: use /usr/bin/env where appropriateYegor Timoshenko
Some Unix systems (GuixSD, NixOS) do not install programs like Bash and Python to /usr/bin, and /usr/bin/env has to be used to locate these instead. Change-Id: I7546bcb881c532adc984577ecb0ee2ec4f2efe00 Signed-off-by: Yegor Timoshenko <yegortimoshenko@riseup.net> Reviewed-on: https://review.coreboot.org/28953 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-10-10util/superiotool/smsc.c: Add SCH5504 register dumpAngel Pons
There is no datasheet available for this SuperIO, but dumping all possible registers on a Dell Optiplex GX520 resulted in data that was similar to other supported chips. Data also matches what is set in the BIOS, e.g. the parallel and serial ports' addresses. Change-Id: I768e4b5ec1e73c53e1a2355e0a0657b7a5ccbb89 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28958 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-10-08util/superiotool/smsc.c: Add some register dumpsAngel Pons
The SCH3112, SCH3116 and SCH5127 were lacking a pin dump. Since their datasheets are available, add their pin dumps. The SCH3112, SCH3114 and SCH3116 are almost identical, they only differ in the number of serial ports. Some values in the SCH3114 dump were inaccurate, that has been fixed as well. Datasheets used: - SCH311X: DS00001872A - SCH5127: DS00002081A Change-Id: Ic985526be9b09e0452eaf883904dfaf709b7e907 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28794 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-09-13util/superiotool: Add Winbond W83667HG register dumpAngel Pons
This SuperIO is supported by coreboot and used in two Asus boards. However, superiotool was lacking a register dump for this chip. Add the corresponding data from datasheet W83667HG-B revision 1.3 into superiotool. The SuperIO's datasheet was obtained by requesting it to Nuvoton. Change-Id: Ie51dc492c761d9c3d4b6100017bb730b1ae6d1e0 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28099 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-08-26util/superiotool: Fix typoElyes HAOUAS
Change-Id: I62fed1084efc3224c9563619d57fbdc5040ddbbc Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/28292 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-08-26superiotool: fix wpcd376iStefan Tauner
According to the datasheet (rev. 1.6) there is no SP2 (apart from some typos) and the IR is actually implemented as SP3 in LDN 0x16. Additionally, there is LDN 0x15 to set up CIR-specific options of the IR serial port, which was missing as well. Change-Id: I34d90d8c44f11a4f62ccc4b836409cc443fb7952 Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-on: https://review.coreboot.org/27856 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-07-26util: Add description.md to each utilTom Hiller
Descriptions are taken from the files themselves or READMEs. Description followed by a space with the language in marked up as code. Change-Id: I5f91e85d1034736289aedf27de00df00db3ff19c Signed-off-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-on: https://review.coreboot.org/27563 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-06-04util/superiotool: Remove whitespace before tabElyes HAOUAS
Change-Id: Ie79cfb92cfb8b8f628aa4b12bba946b0479fc466 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26668 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-04-17Use git HTTP URLs without `/p` in itPaul Menzel
Change-Id: I9972b138c6dd2a289880c4ec8b3fe64fc3baa66b Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/25545 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-01-15util/superiotool: dump VT1211 registersLubomir Rintel
Change-Id: Id01b72a2194ebf3359a11c3ff382efaedf28f9e1 Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-on: https://review.coreboot.org/22255 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15util/superiotool: distinguish between VT82C686 and VT1211Lubomir Rintel
They both have a device id of 0x3c. The former is part of the PCI chip set accessible via port 0x3f0 while the latter is a standalone LPC chip accessible via 0x2e/0x4e depending on strapping. They're not register compatible: the VT82C686 only provides a FDC, LPT and part of UARTs. The VT82C686 documentation suggests it has revision 0x00 while the VT1211 datasheet indicates 0x01. Nevertheless, the VT1211 I happen to have hs a revision of 0x02. Thus the revision is probably not good enough to tell one from the another. Change-Id: Ic7529c84724c8d6b9eb75b863f1bceef5e4b52b5 Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-on: https://review.coreboot.org/22254 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-15util/superiotool: recognize a VT1211 LPC superioLubomir Rintel
Change-Id: I2c24c347c3e044397944ca2abbceb36f83483daf Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-on: https://review.coreboot.org/22253 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-01-14util/superiotool: add support for chip ITE IT8623EGergely Kiss
Due to the lack of a datasheet, defaults are shown as "not available (NA)" in the register dump. Change-Id: I6baaf5dd95453fb1265425f357ea16c710c006ba Signed-off-by: Gergely Kiss <mail.gery@gmail.com> Reviewed-on: https://review.coreboot.org/23084 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2017-06-28util/superiotool: Check for libpci before builingArthur Heymans
Check is adapted from inteltool's Makefile. Change-Id: Ife01ef20d9284cb0a68719757856f9a66a4de452 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/19074 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2017-06-07Use www.coreboot.org over coreboot.orgPaul Menzel
<https://coreboot.org> is redirected to <https://www.coreboot.org>. ``` $ curl -I https://coreboot.org HTTP/1.1 301 Moved Permanently Server: nginx/1.8.1 Date: Mon, 05 Jun 2017 10:41:33 GMT Content-Type: text/html Content-Length: 184 Connection: keep-alive Location: https://www.coreboot.org/ ``` So use the command below to use the final location to save a redirect. ``` $ git grep -l https://coreboot.org \ | xargs sed -i 's,https://coreboot.org,https://www.coreboot.org,g' ``` Change-Id: I4176c20ef31399f0063b41e3a0029cca0c1b0ff3 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://review.coreboot.org/20035 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-06-07Use more secure HTTPS URLs for coreboot sitesPaul Menzel
The coreboot sites support HTTPS, and requests over HTTP with SSL are also redirected. So use the more secure URLs, which also saves a request most of the times, as nothing needs to be redirected. Run the command below to replace all occurences. ``` $ git grep -l -E 'http://(www.|review.|)coreboot.org' | xargs sed -i 's,http://\(.*\)coreboot.org,https://\1coreboot.org,g' ``` Change-Id: If53f8b66f1ac72fb1a38fa392b26eade9963c369 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: https://review.coreboot.org/20034 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2017-06-06superiotool: Add SMSC KBC1126Iru Cai
Device ID is read from HP Elitebook 2760p. Based on: - superio/smsc/kbc1100 (LDNs, keyboard, EC) - DSDT from OEM firmware (COM1 and mailbox) - Datasheet "KBC1122 Priliminary DS Rev. 0.8" Change-Id: Id172ae42411a6d42a4ae7c7f30f96aeda3e6c384 Signed-off-by: Iru Cai <mytbk920423@gmail.com> Reviewed-on: https://review.coreboot.org/18480 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2017-05-08superiotool: Add registers of LPC47N217Iru Cai
Change-Id: I460663593dc32f5b52c19c3f19fbc35b8252ed4d Signed-off-by: Iru Cai <mytbk920423@gmail.com> Reviewed-on: https://review.coreboot.org/19606 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2017-03-13util/superiotool: Add support for Fintek F71808ANicola Corna
Default values taken from the datasheet and from the dump of an uninitialized F71808A on a Sapphire Pure Platinum H61. Both the control registers and the HWM configuration registers are added. Change-Id: Ia6e2a7c13a5086d19ebdb426f2f975b43220a273 Signed-off-by: Nicola Corna <nicola@corna.info> Reviewed-on: https://review.coreboot.org/18562 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2017-01-03superiotool: Add support for HWM registers on W83627EHGArthur Heymans
Based on datasheet: "W83627EHF/EF W83627EHG/EG WINBOND LPC I/O, Revision : 1.0" Change-Id: Ia2e5ab8bc454a34a89fe2cf06bfba55261109785 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/17457 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2017-01-03superiotool: Add support for HWM registers on W83627DHGArthur Heymans
Based on datasheet: "W83627DHG WINBOND LPC I/O, Version: 1.4" Change-Id: Id20dff7539d926ef6f68265efbfc7420539d9bca Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/17964 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2016-10-31superiotool: Add undocumented registers of ITE IT8783E/FNico Huber
Dumping and behavioral analysis have shown that there are more registers in the environment control of the IT8783E/F than documented in my data- sheet. This adds every register that wasn't 0x00/0xff by default. The default values are guesswork: those that looked like sensor readings became NANA, others are taken from dumps. Change-Id: I7e39700c9b98ed5be9f085bc8ffd848006310254 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/17005 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-10-31superiotool: Add register definitions for ITE IT8783E/FNico Huber
Values are taken from an unpublished datasheet. With the exception of the default value for register 0x55 in the environment controller space: Looks like this was just documented wrong. The dumped value of 0x50 also makes more sense. Change-Id: I2bd23d30b7158b2e05fcee7c6280df82570d1401 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/17004 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-10-31superiotool: Add an alternative dump formatNico Huber
Add new dump format to superiotool that prints each register on a separate line. This should be more suitable for diff'ing dumps of multiple superiotool runs. Change-Id: I226ee82b903bf77e760d3396d02fa50688adb9f2 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/17003 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-07-31superiotool: Add Nuvoton NCT6791DOmar Pakker
This adds support for the Nuvoton NCT6791D Super I/O chip to the superiotool. The implementation is based on the Datasheet supplied by Nuvoton: Datasheet Version: January 8th, 2016 Revision 1.11 Datasheet deviation: - Defaults for control registers 0x20 and 0x21 are invalid. Datasheet: 0xc562. Actual: 0xc803. Change-Id: I8ced9738cd41960cbab7b5ea38ff19192d210672 Signed-off-by: Omar Pakker <omarpakker+coreboot@gmail.com> Reviewed-on: https://review.coreboot.org/15252 Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-05-26superiotool: Add support for chip NCT6102D / NCT6106DRoberto Muñoz Gómez
Add support for chip NCT6102D / NCT6106D in superiotool Change-Id: I689ff8e796f43a5aac144e9898df750407588b1f Signed-off-by: Roberto Muñoz Gómez <munoz.roberto@gmail.com> Reviewed-on: https://review.coreboot.org/14206 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins)
2016-04-16util/superiotool: Add initial support for Exar XR28V384.Derek Waldner
Datasheet https://www.exar.com/content/document.ashx?id=21368 Add support for Exar chip used on a custom board that was designed to connect to the Olive Hill Plus development platform. The register dump was verified on the Olive Hill Plus platform. Change-Id: Ibd3e13eefb706bd99b6e5b38634f6855b39848ab Signed-off-by: Derek Waldner <derek.waldner.os@gmail.com> Reviewed-on: https://review.coreboot.org/14367 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-03-30util/superiotool: Register fix for Fintek F81865F/F-IWilbert Duijvenvoorde
Datasheet: http://www.fintek.com.tw/files/productfiles/F81865_V028P.pdf There is a multi-function select register listed as 0x2a-1 and 0x2a-2. These are the original names in the datasheet, but superiotool will display register 0x29 and 0x28 and their values. This patch renames them both to 0x2a and shows both of the default values for them. They are both 0x00, so one of them could be dropped though. Change-Id: Iad91f9e4755d2d1a123e56ab0fa9257be7ea9978 Signed-off-by: Wilbert Duijvenvoorde <w.a.n.duijvenvoorde@gmail.com> Reviewed-on: https://review.coreboot.org/5404 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-01-26superiotool: fix out-of-box NetBSD Makefile supportAndrey Korolyov
Add NetBSD-specific locations under pkg/ and missing linker flag for libpciutils. Change-Id: I812817a374aaba561b28d8a22f20d238c9dca32b Signed-off-by: Andrey Korolyov <andrey@xdel.ru> Reviewed-on: https://review.coreboot.org/12830 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-10-31tree: drop last paragraph of GPL copyright headerPatrick Georgi
It encourages users from writing to the FSF without giving an address. Linux also prefers to drop that and their checkpatch.pl (that we imported) looks out for that. This is the result of util/scripts/no-fsf-addresses.sh with no further editing. Change-Id: Ie96faea295fe001911d77dbc51e9a6789558fbd6 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/11888 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2015-10-24util: Update makefiles for junit testingMartin Roth
- Have clean remove junit.xml files. - Remove junit.xml target from cbmem makefile - this is in the top level Makefile.inc now. - add distclean targets to makefiles. - Make sure all makefiles have .PHONY set up. - rm commands need -f or they will fail if the file they're trying to remove doesn't exist, causing the build to fail. Change-Id: I2f0635f2c0a9417e3377a90c8d67103323c4a72f Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: http://review.coreboot.org/12120 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-06-08Remove empty lines at end of fileElyes HAOUAS
Used command line to remove empty lines at end of file: find . -type f -exec sed -i -e :a -e '/^\n*$/{$d;N;};/\n$/ba' {} \; Change-Id: I816ac9666b6dbb7c7e47843672f0d5cc499766a3 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: http://review.coreboot.org/10446 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2015-06-02superiotool: detect the NCT5572DFelix Held
Change-Id: I99717072679a51deecd6934ce7fb4aeb45135cd6 Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: http://review.coreboot.org/10386 Tested-by: build bot (Jenkins) Reviewed-by: Nicolas Reinecke <nr@das-labor.org>
2015-05-21Remove address from GPLv2 headersPatrick Georgi
As per discussion with lawyers[tm], it's not a good idea to shorten the license header too much - not for legal reasons but because there are tools that look for them, and giving them a standard pattern simplifies things. However, we got confirmation that we don't have to update every file ever added to coreboot whenever the FSF gets a new lease, but can drop the address instead. util/kconfig is excluded because that's imported code that we may want to synchronize every now and then. $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, *MA[, ]*02110-1301[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 51 Franklin Street, Suite 500, Boston, MA 02110-1335, USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 59 Temple Place[-, ]*Suite 330, Boston, MA *02111-1307[, ]*USA:Foundation, Inc.:" {} + $ find * -type f -exec sed -i "s:Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.:Foundation, Inc.:" {} + $ find * -type f -a \! -name \*.patch \ -a \! -name \*_shipped \ -a \! -name LICENSE_GPL \ -a \! -name LGPL.txt \ -a \! -name COPYING \ -a \! -name DISCLAIMER \ -exec sed -i "/Foundation, Inc./ N;s:Foundation, Inc.* USA\.* *:Foundation, Inc. :;s:Foundation, Inc. $:Foundation, Inc.:" {} + Change-Id: Icc968a5a5f3a5df8d32b940f9cdb35350654bef9 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: http://review.coreboot.org/9233 Tested-by: build bot (Jenkins) Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com>
2014-12-19util/superiotool: change displayed name of chip id 0xc333 (nct6776)Felix Held
nct6776f and nct6776d are just two package variants containing the same die Change-Id: I4d319fa0e791e66ad04857dede2fdfc8e42dd45a Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: http://review.coreboot.org/7806 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-12-19util/superiotool: fix default values for nct6776 (rev. c)Felix Held
change default values according to the datasheet in revision 1.2 Change-Id: Iec1d55dd7b906a7a41940f3f8e42413922883efd Signed-off-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-on: http://review.coreboot.org/7805 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Tested-by: build bot (Jenkins)
2014-12-09utils: Remove references to tracker from manpagesMartin Roth
abuild, inteltool, and superiotool's manpages still referenced reporting bugs to tracker.coreboot.org. Remove that url and change the message to point to the coreboot mailing list instead. Change-Id: I7a85bc2b36ccdb7f3798a39a08345c1a02a67e65 Signed-off-by: Martin Roth <martin.roth@se-eng.com> Reviewed-on: http://review.coreboot.org/7712 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com>
2014-03-27util/superiotool: Add initial support for Fintek F71869ED.Wilbert Duijvenvoorde
Datasheet: http://www.fintek.com.tw/files/productfiles/F71869_V1.1.pdf Practically the same as F71869AD, just another ID (0x1408). Tested on actual hardware, Jetway NC9C-550-LF. Update: Fixed F71869ED based on the proper datasheet: http://www.alldatasheet.com/datasheet-pdf/pdf/459075/FINTEK/F71869ED.html Change-Id: I5da858565ca16ba4d73b47b42fadd31dabbc290b Signed-off-by: Wilbert Duijvenvoorde <w.a.n.duijvenvoorde@gmail.com> Reviewed-on: http://review.coreboot.org/5380 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2014-03-24util/superiotool: Register fix for Fintek F71869ADWilbert Duijvenvoorde
Fixed F71869AD based on the proper datasheet: http://www.alldatasheet.com/datasheet-pdf/pdf/459074/FINTEK/F71869AD.html Change-Id: If22341551c6a1a9bbae088801a6194f7b5b6bf4d Signed-off-by: Wilbert Duijvenvoorde <w.a.n.duijvenvoorde@gmail.com> Reviewed-on: http://review.coreboot.org/5405 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-by: Rudolf Marek <r.marek@assembler.cz>
2014-01-31utils: Install man pages as non-executable (chmod 644)Lubomir Rintel
This bothers rpmlint. Change-Id: I27d9cfac3ef6834ff87acc5a5ccbf332e59eeb1a Signed-off-by: Lubomir Rintel <lkundrak@v3.sk> Reviewed-on: http://review.coreboot.org/5075 Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Tested-by: build bot (Jenkins)
2014-01-27util/superiotool: Add initial support for Fintek F71869AD.Edward O'Callaghan
Change-Id: Ia2ce8214d8b419d0ca0186e6f6b2241097b0847b Signed-off-by: Edward O'Callaghan <eocallaghan@alterapraxis.com> Reviewed-on: http://review.coreboot.org/4802 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc <mr.nuke.me@gmail.com>
2013-06-04superiotool: Add dump facility for HWM of W83627DHG-PNico Huber
Change-Id: I9355996a8cf1b7cb91cc415ec04f5108a1cc42a5 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/3358 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-06-04superiotool: Add dump facility for ITE IT8516 + I/O 0x20e/fNico Huber
Change-Id: Iaea08b7eb5aac9ff1e0756f1400a82641bb45b14 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/3359 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-04-22superiotool: add CR dump for W83627UHG = NCT6627UDFrank Rysanek
This commit adds "register dump capability" to superiotool for a specific chip by Winbond/Nuvoton: the W83627UHG AKA NCT6627UD (same chip, different package). In other words, it fills in the "CR map" definitions in winbond.c, which so far have been void for this chip. - superiotool r4.0-3976-g190011e Found Winbond W83627UHG = NCT6627UD (id=0xa2, rev=0x32) at 0x2e Register dump: idx 02 20 21 22 23 24 25 26 27 28 29 2a 2b 2c 2d 2e 2f val ff a2 32 ff f0 44 00 00 ff 00 00 00 00 03 00 00 ff def 00 a2 NA ff f0 MM 00 MM RR 00 00 00 00 02 00 00 00 LDN 0x00 (Floppy) idx 30 60 61 70 74 f0 f1 f2 f4 f5 val 00 00 00 00 02 8e 00 ff 00 00 def 01 03 f0 06 02 8e 00 ff 00 00 LDN 0x01 (Parallel port) idx 30 60 61 70 74 f0 val 00 03 78 0c 04 3f def 01 03 78 07 04 3f LDN 0x02 (UART A) idx 30 60 61 70 f0 val 01 03 f8 04 00 def 01 03 f8 04 00 LDN 0x03 (UART B) idx 30 60 61 70 f0 f1 val 01 02 f8 03 00 44 def 01 02 f8 03 00 00 LDN 0x05 (Keyboard) idx 30 60 61 62 63 70 72 f0 val 01 00 60 00 64 01 0c 82 def 01 00 60 00 64 01 0c 83 LDN 0x06 (UART C) idx 30 60 61 70 f0 val 01 03 e8 05 80 def 01 03 e0 04 00 LDN 0x07 (GPIO 3, GPIO 4) idx 30 e0 e1 e2 e3 e4 e5 e6 e7 val 04 ff ff ff ff ff ff ff ff def 00 ff 00 00 00 ff 00 00 00 LDN 0x08 (WDTO#, PLED, GPIO 5,6 & GPIO Base Address) idx 30 60 61 e0 e1 e2 e3 e4 e5 e6 e7 f5 f6 f7 val 01 00 00 ff ff ff ff ff ff ff ff 02 00 00 def 02 00 00 ff 00 00 00 ff 1f 00 00 00 00 00 LDN 0x09 (GPIO 1, GPIO 2 and SUSLED) idx 30 e0 e1 e2 e3 e4 e5 e6 e7 f3 val 02 ff ff ff ff 00 ff 00 00 00 def 00 ff 00 00 00 ff 00 00 00 00 LDN 0x0a (ACPI) idx 30 70 e0 e1 e2 e3 e4 e5 e6 e7 e8 e9 f2 f3 f4 f6 f7 fe val 01 00 01 00 0a 00 00 00 0c 00 09 00 01 00 00 00 00 00 def 00 00 01 00 ff 08 00 00 1c 00 RR RR 3e 00 00 00 00 00 LDN 0x0b (Hardware monitor) idx 30 60 61 70 f0 f1 f2 val 01 02 48 00 81 ff 81 def 00 00 00 00 RR RR 00 LDN 0x0c (PECI, SST) idx e0 e1 e2 e3 e4 e5 e6 e7 e8 f1 f2 f3 fe ff val 00 48 48 48 48 00 00 00 00 4c 50 10 23 5a def 00 48 48 48 48 00 RR RR 00 48 50 10 23 5a LDN 0x0d (UART D) idx 30 60 61 70 f0 val 00 00 00 00 00 def 00 02 e0 03 00 LDN 0x0e (UART E) idx 30 60 61 70 f0 val 00 00 00 00 80 def 00 03 e8 04 00 LDN 0x0f (UART F) idx 30 60 61 70 f0 val 01 02 38 0a 00 def 00 02 e8 03 00 Change-Id: I834f8767b29f3148f353004edb22cfd7db5ddd56 Signed-off-by: Frank Rysanek <Frantisek.Rysanek@post.cz> Reviewed-on: http://review.coreboot.org/3027 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2013-04-04libpayload, superiotool: README: Prepend `coreboot/` to path of change ↵Paul Menzel
directory line Nico Huber spotted [1], that commit (4d6ab4e2) [1] updating superiotools’s `README` with the Git command line superiotool: Update README with Git repository URL and directory location missed, that after `git clone` one sitll has to change into the cloned directory. So prepend the path with `coreboot/` to fix that. The same error happened in the commit (e1ea5151) for libpayload [2] libpayload: Update README with Git repository URL and directory location and is fixed in this patch too. [1] http://review.coreboot.org/#/c/3019/ [2] http://review.coreboot.org/2228 Change-Id: Ib6e8b678af6276556a40ccfd52ae35ca7e674455 Reported-by: Nico Huber <nico.h@gmx.de> Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3021 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.huber@secunet.com>
2013-04-04superiotool: Update README with Git repository URL and directory locationPaul Menzel
Change-Id: I36d980cea5ca9cc67262dba809441091757e1fb5 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3019 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
generated by cgit v1.2.3 (git 2.25.1) at 2024-11-01 00:27:05 +0000