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2016-06-21cbfstool: Change CONFIG_FMD_GENPARSER if not set to nAlexander Couzens
When doing make in util/cbfstool it contaminates the tree because it generates the fmd_parser. Change-Id: Ida855d1e57560c76d3fcfcc8e2f7f75bcdfdd5d4 Signed-off-by: Alexander Couzens <lynxis@fe80.eu> Reviewed-on: https://review.coreboot.org/15221 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.h@gmx.de>
2016-06-21fmaptool: Make base offsets absolute in fmap_config.hJulius Werner
fmaptool generates a header file used to hardcode certain values from the FMAP in coreboot's binaries, to avoid having to find and parse the FMAP manually for every access. For the offset of the FMAP itself this has already been using the absolute offset from the base of the whole ROM, but for individual CBFS sections it only used the offset from the immediate parent FMAP region. Since the code using it intentionally has no knowledge of the whole section tree, this causes problems as soon as the CBFS is a child section of something not at absolute offset 0 (as is the case for most x86 Chromebooks). Change-Id: If0c516083949fe5ac8cdae85e00a4461dcbdf853 Reported-by: Rolf Evers-Fischer <embedded24@evers-fischer.de> Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/15273 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-06-21util/riscvtools: Add script that turns coreboot.rom into an ELFJonathan Neuschäfer
This is required because SPIKE doesn't support loading flat files yet. Change-Id: If745d78712ca8108b5dcc21591201bc2d3f70b86 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/14964 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-06-17cbfstool: Extract payload in ELFAntonello Dettori
Implement function that automatically converts a SELF payload, extracted from the CBFS, into an ELF file. The code has been tested on the following payloads: Working: GRUB, FILO, SeaBIOS, nvramcui, coreinfo and tint Currently not working: none Change-Id: I51599e65419bfa4ada8fe24b119acb20c9936227 Signed-off-by: Antonello Dettori <dettori.an@gmail.com> Reviewed-on: https://review.coreboot.org/15139 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-06-17elfwriter: Fix multi-phdrs ELFs parsingAntonello Dettori
Allow to write multiple phdrs, one for each non-consecutive section of the ELF. Previously it only worked for ELFs contaning a single program header. Change-Id: If6f95e999373a0cab4414b811e8ced4c93c67c30 Signed-off-by: Antonello Dettori <dev@dettori.io> Reviewed-on: https://review.coreboot.org/15215 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-06-16ifwitool: Calculate checksum for subpart_dirFurquan Shaikh
Checksum is calculated by using 2s complement method. 8-bit sum of the entire subpart directory from first byte of header to last byte of last partition directory entry. BUG=chrome-os-partner:53508 Change-Id: I991d79dfdb5331ab732bf0d71cf8223d63426fa8 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/15200 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-06-15ifwitool: Fix calculation of dst_sizeRolf Evers-Fischer
Change-Id: I07523252eacffb323e2bb54c306f5e9ac83e4cbd Signed-off-by: Rolf Evers-Fischer <embedded24@evers-fischer.de> Reviewed-on: https://review.coreboot.org/15162 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-06-12ifwitool: Do not calculate checksum for subpart_dirFurquan Shaikh
1. The checksum method that was documented is not correct. So, no use filling in a value based on wrong calculations. This can be added back once updated information is available. 2. Checksum does not seem to affect the booting up of SoC. So, fill in 0 for now. Change-Id: I0e49ac8e0e04abb6d7c9be70323612bdef309975 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/15145 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-06-12ifwitool: Correct pack order and header orderFurquan Shaikh
Update pack and header order and mark the entries as mandatory and recommended w.r.t. ordering (mandatory = essential for booting, recommended = okay to change, but this config is tested and known to work). Change-Id: Ia089bdaa0703de830bb9553130caf91a3665d2c4 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/15144 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-06-12autoport: Add prompt for enabling unsafe inteltool glx optionChris Ching
Change-Id: Ib674ab7ca8b6464de553a86536b1762fda98d94e Signed-off-by: Chris Ching <chingcodes@google.com> Reviewed-on: https://review.coreboot.org/14901 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-06-09util/checklist: Add bootblock supportLee Leahy
Scan the boot block when building it with C_ENVIRONMENT_BOOTBLOCK selected. TEST=Build and run with Galileo Gen2 Change-Id: I922f761c31e95efde0975d8572c47084b91b2879 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/15130 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-06-08inteltool: handle unsafe dumping of graphics registersStefan Tauner
The current implementation from Vladimir simply dumps 1 MB of memory contents starting at the base address of the second PCI device (which most likely is the VGA controller on Intel systems). This locks up a number of different systems, e.g. my Ibex Peak-based T410s. This patch documents the issue and stops dumping the graphics registers for the -a/--all parameter. Change-Id: I581bdc63db60afaf4792bc11fbeed73aab57f63a Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-on: https://review.coreboot.org/14627 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2016-06-08cbfstool: Allow to easily build the individual toolsAntonello Dettori
Adds a label for each tool included in the cbfstool package in order to build them more easily through Make. Change-Id: Id1e5164240cd12d22cba18d7cc4571fbadad38af Signed-off-by: Antonello Dettori <dettori.an@gmail.com> Reviewed-on: https://review.coreboot.org/15075 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-06-04intelmetool: Add the X99 ISA Bridge device idOmar Pakker
This adds the ISA bridge device id for the Intel C160/X99 series chipset to the intelmetool. Change-Id: I2e7db0fe1692985ebb167b9a44ab412a45a9f3bd Signed-off-by: Omar Pakker <omarpakker+coreboot@gmail.com> Reviewed-on: https://review.coreboot.org/15053 Tested-by: build bot (Jenkins) Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@googlemail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-06-03Add Board Checklist SupportLee Leahy
Build the <board>_checklist.html file which contains a checklist table for each stage of coreboot. This processing builds a set of implemented (done) routines which are marked green in the table. The remaining required routines (work-to-do) are marked red in the table and the optional routines are marked yellow in the table. The table heading for each stage contains a completion percentage in terms of count of routines (done .vs. required). Add some Kconfig values: * CREATE_BOARD_CHECKLIST - When selected creates the checklist file * MAKE_CHECKLIST_PUBLIC - Copies the checklist file into the Documenation directory * CHECKLIST_DATA_FILE_LOCATION - Location of the checklist data files: * <stage>_complete.dat - Lists all of the weak routines * <stage>_optional.dat - Lists weak routines which may be optionally implemented TEST=Build with Galileo Gen2. Change-Id: Ie056f8bb6d45ff7f3bc6390b5630b5063f54c527 Signed-off-by: Lee Leahy <leroy.p.leahy@intel.com> Reviewed-on: https://review.coreboot.org/15011 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-06-01ifwitool: Fix syntax issues with ifwitoolFurquan Shaikh
Change-Id: Ie7a12a39116ee08f5e24c81c97695201169a63f7 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/15022 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-30ifwitool: Add new tool for managing IFWI imagesFurquan Shaikh
- Supports following operations: 1. add raw/dir sub-partition 2. extract raw/dir sub-partition 3. print info 4. delete raw sub-partition 5. replace raw/dir sub-partition Change-Id: I683a0ab13cc50eb60eecca34db4a8ffefc8dccbd Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/14896 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-28util/cbfstool: Include commonlib/helpers.h in common.hFurquan Shaikh
This avoids re-declaring common macros like ARRAY_SIZE, MIN, MAX and ALIGN. Also removes the issues around including both files in any tool. Also, fix comparison error in various files by replacing int with size_t. Change-Id: I06c763e5dd1bec97e8335499468bbdb016eb28e5 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/14978 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-26cbfstool: Move cbfs_file_get_header to fit.cFurquan Shaikh
Since fit.c is the only caller of this function move it out of common.c and into fit.c. Change-Id: I64cc31a6d89ee425c5b07745ea5ca9437e2f3fcf Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/14949 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-05-26superiotool: Add support for chip NCT6102D / NCT6106DRoberto Muñoz Gómez
Add support for chip NCT6102D / NCT6106D in superiotool Change-Id: I689ff8e796f43a5aac144e9898df750407588b1f Signed-off-by: Roberto Muñoz Gómez <munoz.roberto@gmail.com> Reviewed-on: https://review.coreboot.org/14206 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins)
2016-05-18util/cbfstool: allow option to honor FSP modules' linked addressAaron Durbin
If '-b' isn't passed when adding an FSP file type to CBFS allow the currently linked address to be used. i.e. don't relocate the FSP module and just add it to CBFS. Change-Id: I61fefd962ca9cf8aff7a4ca2bea52341ab41d67b Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/14839 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-05-18board_status: Abort early if the coreboot image doesn't existJonathan Neuschäfer
Change-Id: I274c990e69634ebcb9dd77470cbf1515281de312 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/14683 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-05-16sconfig: Add a new generic device typeDuncan Laurie
Add support for a basic generic device in the devicetree to bind to a device that does not have a specific bus, but may need to be described in tables for the operating system. For instance some chips may have various GPIO connections that need described but do not fall under any other device. In order to support this export the basic 'scan_static_bus()' that can be used in a device_operations->scan_bus() method to scan for the generic devices. It has been possible to get a semi-generic device by using a fake PNP device, but that isn't really appropriate for many devices. Also Re-generate the shipped files for sconfig. Use flex 2.6.0 to avoid everything being rewritten. Clean up the local paths that leak into the generated configs. Change-Id: If45a5b18825bdb2cf1e4ba4297ee426cbd1678e3 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/14789 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Leroy P Leahy <leroy.p.leahy@intel.com>
2016-05-16sconfig: Add 10bit addressing mode to i2c device typeDuncan Laurie
Use the second token for an i2c device entry in devicetree.cb to indicate if it should use 10-bit addressing or 7-bit. The default if not provided is to use 7-bit addressing, but it can be changed to 10-bit addressing with the ".1" suffix. For example: chip drivers/i2c/generic device i2c 3a.1 on end end Change-Id: I1d81a7e154fbc040def4d99ad07966fac242a472 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/14788 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-16sconfig: Allow strings in devicetree.cbDuncan Laurie
Currently you cannot assign a string to a register in devicetree because the quotes are removed when parsing and the literal is assigned directly. Add a parse option for two double-quotation marks to indicate a string and return a quoted literal that can be assigned to a register with a 'const char *' type. Example: chip drivers/i2c/generic register "hid" = ""INT343B"" register "uid" = "1" device i2c 15 on end end Change-Id: I621cde1f7547494a8035fbbab771f29522da1687 Signed-off-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: https://review.coreboot.org/14787 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-16board_status: Add longopt equivalents for older optionsDavid Hendricks
Long options can be useful when writing examples and documentation as they are more expressive and obvious to the reader. Change-Id: I39496765ba1f15ccc2ffe1ad730f0f95702f82b8 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: https://review.coreboot.org/14736 Tested-by: build bot (Jenkins) Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
2016-05-13board_status: Add an option to set the SSH portJonathan Neuschäfer
If the option is not provided, ssh uses the default port for the host, which is usually 22, but may be overridden in the user's SSH configuration. Change-Id: I303e9aeae16bd73a96c5e6d54f8e39482613db28 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/14522 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2016-05-13board_status: Use explicit branch name in "git push"Jonathan Neuschäfer
In some configurations, "git push <remote>" (without a branch name) refuses to do anything. Change-Id: I23a401b39dd851e9723676586c7f29afa111b49d Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/14539 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: David Hendricks <dhendrix@chromium.org>
2016-05-13inteltool: update documentationStefan Tauner
- manpage - usage message - new warning message if -S is used on an unsupported chipset Change-Id: I1acaa5f4232b65244ec00fd22ec7460d9cc387f1 Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-on: https://review.coreboot.org/14624 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2016-05-11cbfstool/fsp: Rename fsp1_1_relocateFurquan Shaikh
FSP 2.0 uses the same relocate logic as FSP 1.1. Thus, rename fsp1_1_relocate to more generic fsp_component_relocate that can be used by cbfstool to relocate either FSP 1.1 or FSP 2.0 components. Allow FSP1.1 driver to still call fsp1_1_relocate which acts as a wrapper for fsp_component_relocate. Change-Id: I14a6efde4d86a340663422aff5ee82175362d1b0 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/14749 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2016-05-11util/cbfstool: Allow xip/non-xip relocation for FSP componentFurquan Shaikh
Currently, convert_fsp assumes that the component is always XIP. This is no longer true with FSP 2.0 and Apollolake platform. Thus, add the option -y|--xip for FSP which will allow the caller to mention whether the FSP component being added is XIP or not. Add this option to Makefiles of current FSP drivers (fsp1_0 and fsp1_1). Change-Id: I1e41d0902bb32afaf116bb457dd9265a5bcd8779 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/14748 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins)
2016-05-10util/mma: changing BOOT_STUB to COREBOOT region and few more thingsPratik Prajapati
(1) Added following new function. cbfs_locate_file_in_region - to locate (and mmap) a file in a flash region This function is used to look for MMA blobs in "COREBOOT" cbfs region (2) mma_setup_test.sh would write to "COREBOOT" region. (3) changes in mma_automated_test.sh. Few MMA tests need system to be COLD rebooted before test can start. mma_automated_test.sh would do COLD reboot after each test, and so i would sync the filesystem before doing COLD reboot. BRANCH=none BUG=chrome-os-partner:43731 TEST=Build and Boot kunimitsu (FAB4). Able to locate MMA files in CBFS Not tested on Glados. Change-Id: I8338a46d8591d16183e51917782f052fa78c4167 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 1e418dfffd8a7fe590f9db771d2f0b01a44afbb4 Original-Change-Id: I402f84f5c46720710704dfd32b9319c73c412e47 Original-Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/331682 Original-Commit-Ready: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com> Original-Tested-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://review.coreboot.org/14125 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-05-10util/mma: Add tools to support (semi) automation test of mmaPratik Prajapati
mma_automated_test.sh takes a config file (/usr/local/mma/tests) as input and executes all tests mentioned in the config file. format of the config file is one or more lines mentioned below. <MMA test name> <MMA test param> <#count> e.g. consider following config file. Margin1D.efi Margin1DRxVrefConfig.bin 4 RMT.efi RMTConfig.bin 1 MarginMapper.efi ScoreTxVref-TxDqDelayConfigCh1.bin 2 Margin2D.efi Margin2D_Cmd_Ch0_D1_R0_Config.bin 3 This will execute Margin1D.efi MMA test 4 times with Margin1DRxVrefConfig.bin param and results will be stored in DUT under /usr/local/mma/results_<date-time-stamp> with Margin1D_Margin1DRxVrefConfig_1.bin to Margin1D_Margin1DRxVrefConfig_4.bin name. Subsequently all tests will be executed and results will be stored. /etc/init/mma.conf invokes mma_automated_test.sh when DUT starts. And if valid test config is preset at /usr/local/mma/tests, mma_automated_test.sh will continue executing the tests. Each time DUT will be rebooted and next test in sequence will be executed. Overall follow these steps to start MMA. (1) create /usr/local/mma/tests file with the syntax mentioned above. (2) either reboot the DUT (mma.conf will be called at each boot time, which would run the mma_automated_test.sh) or execute "start mma" command (to save a reboot cycle.) (3) all test results can be found under /usr/local/mma/results_<date-time-stamp> where <date-time-stamp> is YY_MM_DD_HH_mm format (YEAR_MONTH_DAY_HOUR_MINUTE) when you started the mma tests. BRANCH=none BUG=chrome-os-partner:43731 TEST=Build and Boot kunimitsu (FAB3). MMA automation tests executes and results get saved. Change-Id: I6805fdb95b7ff919f9c8e967b748e4893a3f9889 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 68c0a531ba3fc335b92b17002e75412195b778c4 Original-Change-Id: I92db7ca47e1e3e581c3fbb413f11e2c3e6d19b6b Original-Signed-off-by: Pratik Prajapati <pratikkumar.v.prajapati@intel.com> Original-Signed-off-by: Icarus Sparry <icarus.w.sparry@intel.com> Original-Reviewed-on: https://chromium-review.googlesource.com/313180 Original-Commit-Ready: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com> Original-Tested-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com> Original-Reviewed-by: Aaron Durbin <adurbin@chromium.org> Original-Reviewed-by: Pratikkumar V Prajapati <pratikkumar.v.prajapati@intel.com> Reviewed-on: https://review.coreboot.org/12928 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-05-09util: ipq40xx: Scripts to combine SBL and Coreboot ELFsVaradarajan Narayanan
The IPQ40xx Primary Boot Loader (PBL, i.e. Boot-ROM) expects an ELF in the boot medium to load and boot. These scripts combine the Secondary Boot Loader (SBL) and Coreboot ELF to an image as expected by the PBL. BUG=chrome-os-partner:49249 TEST=Able to boot and reach depthcharge BRANCH=none Change-Id: I5d02b7f1f58bb23d81a3e19fb9b78f3a999b89f3 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Original-Commit-Id: 819c7f2a810ca2880718ba14f2451f06eef4d98b Original-Change-Id: I017207b2d4108de150853f421aa7bcfd0e12e9a4 Original-Signed-off-by: Varadarajan Narayanan <varada@codeaurora.org> Original-Reviewed-on: https://chromium-review.googlesource.com/340181 Original-Commit-Ready: Nicolas Boichat <drinkcat@chromium.org> Original-Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: https://review.coreboot.org/14680 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-05-08util/sconfig: Fix warningsStefan Reinauer
and re-generate _shipped files Change-Id: I7a18824d64d3f6212e8566695376bf97e2196ee2 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://review.coreboot.org/14733 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
2016-05-07board_status: Allow for parsing longoptsDavid Hendricks
This converts the argument parsing to allow us to add longopts using GNU getopt(1). Shortopts should be reserved for general parameters. Longopts can be used to tweak specific behaviors. For example, we might wish to add options to set SSH port, timeout, and authentication parameters with "--ssh-port", "--ssh-timeout", "--ssh-identity", etc. Change-Id: Idee5579079dbbb7296ad98f5d6025b01aab55452 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: https://review.coreboot.org/14523 Tested-by: build bot (Jenkins) Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
2016-05-06util/cbfstool: fix x86 execute-in-place semantics for all fmd regionsAaron Durbin
A previous patch [1] to make top-aligned addresses work within per fmap regions caused a significant regression in the semantics of adding programs that need to be execute-in-place (XIP) on x86 systems. Correct the regression by providing new function, convert_to_from_absolute_top_aligned(), which top aligns against the entire boot media. [1] 9731119b cbfstool: make top-aligned address work per-region Change-Id: I3b685abadcfc76dab8846eec21e9114a23577578 Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://review.coreboot.org/14608 Tested-by: build bot (Jenkins) Reviewed-by: Duncan Laurie <dlaurie@google.com> Reviewed-by: Furquan Shaikh <furquan@google.com>
2016-05-04buildgcc: Update Python to 3.5.1Stefan Reinauer
Change-Id: I57f935b94ab0db2e9ff9434fb496d470bb4ec987 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://review.coreboot.org/14463 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins)
2016-05-04buildgcc: Update gdb and expatStefan Reinauer
Update gdb to 7.11 and expat to 2.1.1 riscv64-elf is still broken. Change-Id: Id7605f4274fcb15f9c3e366f5c492328f70f7956 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://review.coreboot.org/14461 Tested-by: build bot (Jenkins) Reviewed-by: Idwer Vollering <vidwer@gmail.com>
2016-05-04crossgcc: Update toolchainIru Cai
New tools: * mpfr 3.1.4 * binutils 2.26 * gcc 5.3.0 * llvm/clang 3.8.0 Patch changes: * binutils-2.25_fix-aarch64.patch: fixed in 2.26 * binutils-2.25_host-clang.patch: the positions of header file includes have been adjusted * binutils-2.25_no-bfd-doc.patch: update to 2.26 * binutils-2.25_riscv.patch: update from riscv-gnu-toolchain * gcc-5.2.0_elf_biarch.patch: update to 5.3.0 * gcc-5.2.0_gnat.patch: update to 5.3.0 * gcc-5.2.0_libgcc.patch: update to 5.3.0 * gcc-5.2.0_nds32.patch: update to 5.3.0 * gcc-5.2.0_riscv.patch: update from riscv-gnu-toolchain * cfe-3.7.1.src_frontend.patch: update to 3.8.0 In the latest code of riscv-gnu-toolchain project, the patch for {binutils,gcc}/config.sub has been removed, and the target is renamed as riscv32 and riscv64. The `riscv' to `riscv64' change in xcompile is in another commit. Test results: All GCC and LLVM/clang toolchain build successfully. x86,arm: qemu boots power8: firmware fails to boot aarch64,mips: not tested riscv: firmware fails to build with new binutils clang: firmware fails to boot Signed-off-by: Iru Cai <mytbk920423@gmail.com> Change-Id: I42ce89c29263d768d161c28199994f17d0389633 Reviewed-on: https://review.coreboot.org/14227 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2016-05-04crosfirmware: Make script more silentJoseph Pillow
Remove debug output and parted messages. Change-Id: I6416a88b5fdb4c92741439e9edb5f753f885cbe3 Signed-off-by: Joseph Pillow <joseph.a.pillow@gmail.com> Reviewed-on: https://review.coreboot.org/14460 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-05-04buildgcc: Always set HOSTCFLAGSNico Huber
Always set HOSTCFLAGS to the flags GMP was built with, defaulting to "-Os" if it isn't built yet. Previously, if GMP was already built or not even in the list of packages to be built, this was silently skipped and other packages were built with empty HOSTCFLAGS. Change-Id: I29b2ea75283410a6cea60dc1c92b87573aebfb34 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/13550 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-05-04buildgcc: Use smaller xz archivesStefan Reinauer
The xz archives are slightly smaller than the bz2 archives for gmp and mpfr, so use them instead to speed up the download. Change-Id: I3729455cdbc46e5a0cff119ecca97b0e00c3d402 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://review.coreboot.org/14462 Reviewed-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-05-04buildgcc: Drop --target from python and expatStefan Reinauer
Both packages are not using the target architecture. Drop it, and remove them from package_uses_targetarch Change-Id: I58efde4cb7cc39e7e3c31527eb7682e318928100 Signed-off-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-on: https://review.coreboot.org/14464 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2016-05-03fmaptool: Export some fmap knowledge to the build environmentPatrick Georgi
By exporting base and offset of CBFS-formatted fmap regions, the code can use these when it's not prudent to do a runtime lookup. Change-Id: I20523b5cea68880af4cb1fcea4b37bb8ac2a23db Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/14571 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2016-05-03xcompile: test if gcc is really availableStefan Tauner
Just because an 'as' with a certain prefix is available does not guarantee that a 'gcc' with the same prefix is available as well. Without a check detect_compiler_runtime() would try to execute an unavailable binary and print something like this: .../xcompile: line 218: arm-linux-gnueabi-gcc: command not found Change-Id: Icbadfeb2860152f7cf7696a9122521d0d881f3aa Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-on: https://review.coreboot.org/14563 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-05-03board_status/towiki: Link to CGit instead of GitwebJonathan Neuschäfer
Gitweb isn't online anymore, so fix a few broken links. Change-Id: I7fdfcb60f83a718c9a5b6c7f7ef4df9206451d95 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/14559 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-05-01romcc.1: Point bug reporters to the coreboot ML / bug trackerJonathan Neuschäfer
Change-Id: Ic0866a5183c64070ef35b21ba00586bc65dfcde8 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/14538 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2016-04-26board_status/to-wiki: Fix background color of very recent test resultsTimothy Pearson
Test results under 16 days old display with an incorrect background color due to the leading zero not being preset in the associated HTML color code. Add the leading zero where needed to generate a valid HTML color code. Change-Id: I0dfe29ec1afc409a4908073922ac31a4091f0f1f Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/14514 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth <martinroth@google.com>
2016-04-25board_status/to-wiki: Indicate age of test results by background colorTimothy Pearson
A major issue with the board-status Wiki page is that it shows all test results equally regardless of age. As a test result ages it becomes more likely that the board no longer works peroperly under coreboot due to code churn. Visually indicate board-test status "at a glance" by smoothly fading the background color of the test result from green to yellow as the test result ages. This patch sets the full yellow transition to 255 days after test for programming convenience, however the number of days required to fully "stale" a test result could be modified relatively easily. Change-Id: I5a076a6cc17d53fda8e4681e38074fc1f46c0e12 Signed-off-by: Timothy Pearson <tpearson@raptorengineeringinc.com> Reviewed-on: https://review.coreboot.org/14457 Reviewed-by: Vladimir Serbinenko <phcoder@gmail.com> Tested-by: build bot (Jenkins)
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