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2009-04-14util: romfs->cbfs renamePeter Stuge
I noticed this before sed, but forgot to change it back after sed. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4111 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-14v2/util: romfs -> cbfs renamePeter Stuge
It's all sed here. romfs->cbfs, ROMFS->CBFS, romtool->cbfstool Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4110 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-13Fix typo. Add missing copyright year.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4107 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-11Mention a few more flash chip packages in README/manpage.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4092 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-10move architecture override before cross compiler detection, or the SandpointStefan Reinauer
skeleton will have get a cross compiler before it gets the architecture set to SKIP. Pretty much build system internal, so self-acked. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4091 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-10Add a note that 'modprobe msr' might be required.Uwe Hermann
Remove trailing whitespace. Fix typos. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4090 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-10Fix typo.Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4089 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-10Various manpage / README fixes:Uwe Hermann
- Improve description a bit, especially wrt chip packages and protocols. - Add some missing parameters to manpage option descriptions. - Remove long obsolete DoC support note. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4088 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-09Fixed the typo should indeed be a 0x2e.Mondrian nuessle
Tested on an iWILL DK8-HTX board. Signed-off-by: Mondrian nuessle <nuessle@uni-hd.de> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4086 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-08Only build romfs on those target that have CONFIG_ROMFS enabled.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4083 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04Makefile includes were mixed up.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4072 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04This fixes a race condition (revealed by my other check-in r4067) in theStefan Reinauer
romtool by changing the Makefiles to be no longer recursive (once again, recursive make is to be considered harmful). Tried to (quickly) unify most of the Makefile code, but medium-term this is going to be worked on for Kconfig support anyways. Also fix a sign cast error in rom-mkpayload in case people want to compile this with -W -Werror Patch relative to coreboot-v2/util/romtool Signed-off-by: Stefan Reinauer <stepan@coresystems.de> and Acked-by: Stefan Reinauer <stepan@coresystems.de> in order to get the tree working decently asap git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4069 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04build romtool in mainboard target directory.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4067 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04fix cross compilation in abuild for certain scenarios Stefan Reinauer
(coreboot.org build system internal) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4066 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04fix some warnings by casting safely. (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4064 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04use $(MAKE) instead of hardcoded "make".. (trivial)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4063 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-04Fix the concurrency issue of building romtool.Patrick Georgi
romtool is still built in util/romtool, as happens without this patch. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4061 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03I thought that romfs infrastructure is done now, but there were somePatrick Georgi
issues (see buildbot). The romfs image was always built, and sometimes broke (because of the different image layouts) for buildrom images. After the patch, these issues are avoided by not adding payloads to the romfs image (they wouldn't be read anyway). Both workarounds (in buildrom code for romfs and vice-versa) aren't very pretty, but that's what our buildsystem requires. As I had to create a "communication channel" (via the romfs-support files), I took the chance to also use it for compression information, so if you configure lzma support, you'll get lzma compressed payloads in romfs. Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4054 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03This patch implements --include=file.h for romcc.Stefan Reinauer
The compile_file calls seem to be in the wrong order, but romcc actually requires it that (probably some stack-like file processing) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4051 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-03the attached patch is the last infrastructure change necessary forPatrick Georgi
romfs. Everything else to make a target romfs aware happens in the targets. What the patch does: 1. missing romfs.h include 2. special handling while creating coreboot.rom While the romfs code path in the makefile doesn't actually use the file, it's possible that the build of coreboot.rom fails in a romfs setup, because the individual buildrom image is too small to host both coreboot and payloads (as the payloads aren't supposed to be there). Thus, a special case to replace the payload with /dev/null in case of a romfs build. There would be cleaner ways, but they're not easily encoded in the Config.lb format. 3. config.g is changed to create rules for a romfs build Targets should still build (they do for me) Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4049 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-04-02Ronald Hoogenboom writes:Ronald Hoogenboom
I've attached a patch that removes the 3-mile-long compiler commandlines, which vim's quickfix doesn't like so much. Instead of putting all those -DXYZ='bla' on the compiler commandline, they are put in a file called settings.h (as #define XYZ bla) and only a --include=settings.h is put on the commandline. This file is created unconditionally at the same time as when the CPUFLAGS simply expanded make variable used to be created (not via a target rule and dependency), so it shouldn't change anything. Signed-off-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4047 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-31This patch adds Jordan's romtool support for v2. Ronald G. Minnich
There are a few changes. The 20K bootblock size restriction is gone. ROMFS has been tested and works on v2 with qemu and kontron. Once this patch is in, those patches will follow. Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Patrick Georgi <patrick.georgi@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4032 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-30flashrom: Board enable support for HP DL145 G3.Mondrian Nuessle
This is a BCM5785 based machine, WP# and TLB# need to be deasserted using GPIO 2 and 5 from the PM registers of the southbridge. This is very similar to the x3455 implementation. Signed-off-by: Mondrian Nuessle <nuessle@uni-hd.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4031 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-25- List SMSC LPC47N227 runtime register block as supported.Uwe Hermann
- Add missing contributor in README. - Cosmetic fixes. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4029 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-23msrtool: If an MSR name lookup fails in msraddrbyname(), return the ↵Peter Stuge
strtoul() conversion result. Thanks to Mart for finding and reporting the problem! Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4026 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-19Move the Atmel AT45 comments about block and page sizes from the end ofCarl-Daniel Hailfinger
the struct to the individual struct members to improve readability. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4020 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-17Add support for high coreboot table to mkelfimageStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4015 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-17This patch adds "high coreboot table support" to coreboot version 2.Stefan Reinauer
Some bootloaders seem to overwrite memory starting at 0x600, thus destroying the coreboot table integrity, rendering the table useless. By moving the table to the high tables area (if it's activated), this problem is fixed. In order to move the table, a 40 bytes mini coreboot table with a single sub table is placed at 0x500/0x530 that points to the real coreboot table. This is comparable to the ACPI RSDT or the MP floating table. This patch also adds "table forward" support to flashrom and nvramtool. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4013 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-17This patch adds "high coreboot table support" to coreboot version 2.Stefan Reinauer
Some bootloaders seem to overwrite memory starting at 0x600, thus destroying the coreboot table integrity, rendering the table useless. By moving the table to the high tables area (if it's activated), this problem is fixed. In order to move the table, a 40 bytes mini coreboot table with a single sub table is placed at 0x500/0x530 that points to the real coreboot table. This is comparable to the ACPI RSDT or the MP floating table. This patch also adds "table forward" support to flashrom and nvramtool. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4012 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-15abuild: Don't forget CROSS_COMPILE anymore.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4006 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-14trivial patch for abuild: allow powerpc-elf-gcc, too.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4005 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-13this commit should fix Ticket #122 (proper log files for all builds)Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@4003 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-1120090310-3-scanbuild:Patrick Georgi
Add support for clang's scan-build utility to abuild. scan-build wraps the compiler and runs its own compiler on the same sources to do some static analysis on them. It adds an option "-sb" or "--scan-build" that creates a coreboot-builds/$target-scanbuild directory for every $target, containing the output of scan-build, which is a HTML documentation on its results. Be aware, that scanbuild significantly increases build time: A board that takes 6-7 seconds normally requires 60 seconds with that option enabled on my test system. The patch also moves the stack-protector option down a bit, so it applies to crosscompiled targets, too (which overwrote the compiler settings before) Signed-off-by: Patrick Georgi <patrick.georgi@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3996 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-11abuild:Stefan Reinauer
- add configure only mode to easily and quickly check Config.lb and Option.lb files - fix up cross compiler handling - don't use in-place sed, not all sed versions can do it - use perl instead of date to avoid non-gnu date trouble Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3992 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-11Add support for the LPC47M182 to superiotoolStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Joseph Smith <joe@settoplinux.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3990 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-08Add some basic K8 MSRs. Marc Jones
Fix bash script type. Removed const return type on msraddrbyname() to fix gcc warning/error. Signed-off-by: Marc Jones <marcj303@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3985 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-06FreeBSD definitions of (read|write)[bwl] collide with our own. Before weCarl-Daniel Hailfinger
attempt trickery, we can simply rename the accessor functions. Patch created with the help of Coccinelle. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Idwer Vollering <idwer_v@hotmail.com> Acked-by: Patrick Georgi <patrick@georgi-clan.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3984 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-06During the conversion of flash chip accesses to helper functions, ICarl-Daniel Hailfinger
spotted assignments to volatile variables which were neither placed inside the mmapped ROM area nor were they counters. Due to the use of accessor functions, volatile usage can be reduced significantly because the accessor functions take care of actually performing the reads/writes correctly. The following semantic patch spotted them (linebreak in python string for readability reasons, please remove before usage): @r exists@ expression b; typedef uint8_t; volatile uint8_t a; position p1; @@ a@p1 = readb(b); @script:python@ p1 << r.p1; a << r.a; b << r.b; @@ print "* file: %s line %s has assignment to unnecessarily volatile variable: %s = readb(%s);" % (p1[0].file, p1[0].line, a, b) Result was: HANDLING: sst28sf040.c * file: sst28sf040.c line 44 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 43 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 42 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 41 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 40 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 39 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 38 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 58 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 57 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 56 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 55 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 54 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 53 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); * file: sst28sf040.c line 52 has assignment to unnecessarily volatile variable: tmp = readb(TODO: Binary); The following semantic patch uses the spatch builtin match printing functionality by prepending a "*" to the line with the pattern: @@ expression b; typedef uint8_t; volatile uint8_t a; @@ * a = readb(b); Result is: HANDLING: sst28sf040.c diff = --- sst28sf040.c 2009-03-06 01:04:49.000000000 +0100 @@ -35,13 +35,6 @@ static __inline__ void protect_28sf040(v /* ask compiler not to optimize this */ volatile uint8_t tmp; - tmp = readb(bios + 0x1823); - tmp = readb(bios + 0x1820); - tmp = readb(bios + 0x1822); - tmp = readb(bios + 0x0418); - tmp = readb(bios + 0x041B); - tmp = readb(bios + 0x0419); - tmp = readb(bios + 0x040A); } static __inline__ void unprotect_28sf040(volatile uint8_t *bios) @@ -49,13 +42,6 @@ static __inline__ void unprotect_28sf040 /* ask compiler not to optimize this */ volatile uint8_t tmp; - tmp = readb(bios + 0x1823); - tmp = readb(bios + 0x1820); - tmp = readb(bios + 0x1822); - tmp = readb(bios + 0x0418); - tmp = readb(bios + 0x041B); - tmp = readb(bios + 0x0419); - tmp = readb(bios + 0x041A); } static __inline__ int erase_sector_28sf040(volatile uint8_t *bios, It's arguably a bit easier to read if you get used to the leading "-" for matching lines. This patch was enabled by Coccinelle: http://www.emn.fr/x-info/coccinelle/ Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Joseph Smith <joe@settoplinux.org> -- http://www.hailfinger.org/ git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3973 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-03-05flashrom: Use helper functions to access flash chips.Carl-Daniel Hailfinger
Right now we perform direct pointer manipulation without any abstraction to read from and write to memory mapped flash chips. That makes it impossible to drive any flasher which does not mmap the whole chip. Using helper functions readb() and writeb() allows a driver for external flash programmers like Paraflasher to replace readb and writeb with calls to its own chip access routines. This patch has the additional advantage of removing lots of unnecessary casts to volatile uint8_t * and now-superfluous parentheses which caused poor readability. I used the semantic patcher Coccinelle to create this patch. The semantic patch follows: @@ expression a; typedef uint8_t; volatile uint8_t *b; @@ - *(b) = (a); + writeb(a, b); @@ volatile uint8_t *b; @@ - *(b) + readb(b) @@ type T; T b; @@ ( readb | writeb ) (..., - (T) - (b) + b ) In contrast to a sed script, the semantic patch performs type checking before converting anything. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: FENG Yu Ning <fengyuning1984@gmail.com> Tested-by: Joe Julian git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3971 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-28coreboot-v2: drop this ugly historic union name in v2 that was dropped in v3Stefan Reinauer
a long time ago. This will make it easier to port v2 boards forward to v3 at some point (and other things) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3964 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-28This is a small fix for the last checkin (does not fix those two boards) thatStefan Reinauer
caused same filenames to still cause objects being dropped from the build list - which was the whole purpose of the patch. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3962 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-28With this patch the v2 build system will create a directory hierarchyStefan Reinauer
similar to what v3 does. This is required to have two source files with the same name but in different directories. (As in, two different SuperIOs on board, with a superio.c each) Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3961 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-25flashrom: Add SST25VF040.REMS with TEST_OK_ PROBE READZheng Bao
Signed-off-by: Zheng Bao <zheng.bao@amd.com> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3958 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-22flashrom: SST29EE020A TEST_OK_ PROBE READ ERASE WRITEPeter Stuge
Report by Holger Mickler. Thanks! Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3956 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-18Carl-Daniel's part:Carl-Daniel Hailfinger
This patch converts mainboard_$VENDOR_$BOARD_ops to mainboard_ops and mainboard_$VENDOR_$BOARD_config to mainboard_config. Ron's part: The config change that makes the naming change not break every build. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3954 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-10Change 0x%p to %p. Thanks Stefan for catching the one I introduced in 3931.Myles Watson
Signed-off-by: Myles Watson <mylesgw@gmail.com> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3933 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-09flashrom: Fix broken flash chip base address logicPeter Stuge
Elan SC520 requries us to deal with flash chip base addresses at locations other than top of 4GB. The logic for that was incorrectly triggered also when a board had more than one flash chip. This patch will honor flashbase only when probing for the first flash chip on the board, and look at top of 4GB for later chips. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Myles Watson <mylesgw@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3932 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-02flashrom: MSI MS-7046 board enablePeter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: David Tiemann <davidtiemann@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3927 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-02-01 Following patch fixes VIA SPI (VT8237S). It needs to have opcodesRudolf Marek
initialized same way as ICH7. Signed-off-by: Rudolf Marek <r.marek@assembler.cz> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3926 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2009-01-28Factor out read and erase functions from flashrom main().Carl-Daniel Hailfinger
Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3923 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1