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2013-12-07abuild: drop xml modePatrick Georgi
We use junit style output these days. Change-Id: I4110ec10bf0e9f4354ee08e7e1c5a81ae605fee0 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/4484 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-12-05abuild: fix and enable USE_XARGS configurationPatrick Georgi
USE_XARGS mode builds n boards in parallel (with 1 CPU each) instead of building 1 board with n CPUs. This requires the main build system to work under such circumstances. Change-Id: Ib4571a78dfe78fd61ae5b26c18be9745bd8b3d52 Reviewed-on: http://review.coreboot.org/4485 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-12-05sconfig: avoid regenerating the binary all the timePatrick Georgi
This makes USE_XARGS-abuild unhappy due to races Change-Id: I1237468366c7f8af7eacd572c2bd32df9a3d58ca Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/4486 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2013-12-05cbmem: print timestamp namesStefan Reinauer
The numbers alone are hard to parse, so add some timestamp names to make it easier to read. Change-Id: Ie32d3e7ca759bd15e7c160bdd829dec19943e6cb Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/65333 Reviewed-by: David Hendricks <dhendrix@chromium.org> Reviewed-by: Ronald G. Minnich <rminnich@chromium.org> Reviewed-by: Marc Jones <marc.jones@se-eng.com> Commit-Queue: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: http://review.coreboot.org/4314 Tested-by: build bot (Jenkins)
2013-12-05Fix timestamp output in cbmem utility on ARMStefan Reinauer
On ARM the timestamps are already in micro seconds, so no need to convert them. Signed-off-by: Stefan Reinauer <reinauer@google.com> Change-Id: If7363b0703e144bde62d9dab4ba845e1ace5bd18 Reviewed-on: https://gerrit.chromium.org/gerrit/63991 Reviewed-by: Vadim Bendebury <vbendeb@chromium.org> Commit-Queue: Stefan Reinauer <reinauer@chromium.org> Tested-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: http://review.coreboot.org/4313 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-12-05Add scripts to export board status data to wikiPatrick Georgi
It's a start... Change-Id: Ibdb0b64ab0349df58bcad5ce553bf0dbec636925 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/4483 Tested-by: build bot (Jenkins)
2013-12-04cbmem: fix userspace utility to work with dynamic CBMEMStefan Reinauer
This also adds an option -x/--hexdump to dump the whole CBMEM area for debugging. Change-Id: I244955394c6a2199acf7af78ae4b8b0a6f3bfe33 Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: https://gerrit.chromium.org/gerrit/62287 Reviewed-by: David Hendricks <dhendrix@chromium.org> Commit-Queue: Stefan Reinauer <reinauer@chromium.org> Tested-by: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: http://review.coreboot.org/4312 Tested-by: build bot (Jenkins)
2013-12-04cbmem: Implement ARM supportStefan Reinauer
on ARM the CBMEM utility requires the procfs entry /proc/device-tree/firmware/coreboot/coreboot-table provided by the FDT (dynamically created by depthcharge at the moment) Signed-off-by: Stefan Reinauer <reinauer@google.com> Change-Id: If5f961afb23791af6f32dd4fc9a837a1aa41b70e Reviewed-on: https://gerrit.chromium.org/gerrit/59322 Reviewed-by: Stefan Reinauer <reinauer@chromium.org> Tested-by: Stefan Reinauer <reinauer@chromium.org> Commit-Queue: Stefan Reinauer <reinauer@chromium.org> Reviewed-on: http://review.coreboot.org/4311 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-25cbfstool: check potential microcode update earlierAaron Durbin
The update-fit command takes in a parameter for number of slots in the FIT table. It then processes the microcobe blob in cbfs adding those entries to the FIT table. However, the tracking of the number of mircocode updates was incremented before validating the update. Therefore, move the sanity checking before an increment of the number of updates. Change-Id: Ie8290f53316b251e500b88829fdcf9b5735c1b0e Signed-off-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: https://gerrit.chromium.org/gerrit/50319 Reviewed-by: Duncan Laurie <dlaurie@chromium.org> Reviewed-on: http://review.coreboot.org/4161 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-25cbmem utility: compatibility with older coreboot versionsStefan Reinauer
Commit b8ad224 changed the memory address in lb_cbmem_ref coreboot table entries from a pointer to a uint64_t. This change was introduced to make the cbmem utility work on both 32bit and 64bit userland. Unfortunately, this broke the cbmem utility running on older versions of coreboot because they were still providing a 32bit only field for the address while the cbmem utility would now take the following 4 bytes as upper 32bits of a pointer that can obviously not be mmapped. This change checks if the size of the lb_cbmem_ref structure provided by coreboot is smaller than expected, and if so, ignore the upper 32bit of the address read. Signed-off-by: Stefan Reinauer <reinauer@google.com> Change-Id: If4c8e9b72b2a38c961c11d7071b728e61e5f1d18 Commit-Queue: Stefan Reinauer <reinauer@google.com> Tested-by: Stefan Reinauer <reinauer@google.com> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-on: http://review.coreboot.org/4139 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-19nvramtool: write size field more obviouslyPatrick Georgi
The field wasn't initialized in RAM first and later overwritten in a somewhat twisted way (that relied on the size field coming after the tag field in the struct). Change-Id: Ibe931b297df51e3c46ae163e059338781f5a27e2 Found-by: Coverity Scan Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/4087 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2013-11-18cbfstool: add a constant for the aarch64Ronald G. Minnich
Change-Id: Ide2c8b778447de66d95bd8c55b378aa2051ac2a0 Signed-off-by: Ronald G. Minnich <rminnich@google.com> Reviewed-on: http://review.coreboot.org/4091 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin <adurbin@google.com>
2013-11-17board_status.sh: trivial cosmetic changes toward the endDavid Hendricks
This moves an ugly comment closer to where it is applicable and also adds a visual break between the commands which gather data and the part of the script that finishes up. I'm usually not fan of banner comments, but it seemed to help in my totally subjective opinion. I was thinking about how to break the part that uploads results into a separate function, but there are enough variables that are re-used from earlier parts that the tradeoff probably isn't worth it. Change-Id: If888329911c4de3b907cdf5973695c707bbb02fe Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/4051 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-17board_status.sh: pass filename as an arg to command wrappersDavid Hendricks
This allows the command wrappers to delete files if the command fails. In particular, it delets empty or otherwise useless files that are generated if a non-fatal command fails. Change-Id: If26d7b4d7500f160edd1cc2a8b6218792fefae8b Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/4050 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-17board_status.sh: add support for non-fatal commandsDavid Hendricks
This adds cmd_nonfatal() for commands which are considered non-essential and can be expected to fail safely. This can be used, for example, to gather data that is generated when using non-standard utilities or coreboot config options. Change-Id: Ie43944d2eb73f9aae1c30c3a204cfc413e11d286 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/4049 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-17board_status.sh: move show_help()David Hendricks
This is really only a cosmetic change, but is intended to make it slightly easier to remember to update the help menu whenever options change. Change-Id: I58b5012309229d08da138a01c7cd1c5096423179 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/4048 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-17board_status.sh: Make clobber option use 'C' instead of 'c'David Hendricks
Clobbering output is only really useful when debugging the script. Since we're only using short options, let's save 'c' for something more important. Change-Id: If87a70fdc0cd006818d1736c40f9984dfec663a9 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/4047 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-17Updates to the board status scriptDavid Hendricks
This is the first major re-work for the board status script. Summary: - Added a command to the getrevision.sh script to retrieve tagged revision. - Results are placed in a dynamically generated temporary location. This makes it easy to do multiple trial runs and avoids polluting the coreboot directory. - Results are stored in a directory with the following form: <vendor>/<mainboard>/<tagged_revision>/<timestamp>/ Vendor and mainboard are obtained from CONFIG_MAINBOARD_DIR so that hierarchy is consistent between coreboot and board-status. - The results directory is used as the commit message. - board-status repository is checked out automatically if results are to be uploaded. TODO: - Add ability to run commands which may fail. Currently we assume any failure should terminate the script, but some commands can be made optional. Successfully uploaded first result to board-status repository. See http://review.coreboot.org/gitweb?p=board-status.git;a=summary . Change-Id: Icba41ccad4e6e6ee829b8092a2459c2d72a3365b Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/4039 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-11-16romcc: Fix off-by-onePatrick Georgi
Arrays are indexed 0..(number_of_element-1). Change-Id: I2157e74340568636d588113d1d2d8cae50082da2 Found-by: Coverity Scan Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/4089 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins)
2013-11-12rename status-related stuff to board_statusDavid Hendricks
This just moves stuff to be more clear about the purpose of the script. Other suggestions are welcome. Change-Id: Ic6095fd4eb347daa5a03eff21b5952d2d42a6bfd Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/4038 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-11-10util/xcompile/xcompile: set up for aarch64Ronald G. Minnich
The tools for aarch64 on ubuntu are called aarch64-linux-gnu-* The type is elf64-littleaarch64 This now finds the right files for building on aarch64 This has only been tested on ubuntu saucy; the aarch64 toolchain is in a very ill-defined state on most distros. Change-Id: Ic1bbd40f0d72384d6e80287b850686292a252918 Signed-off-by: Ronald G. Minnich <rminnich@google.com> Reviewed-on: http://review.coreboot.org/4035 Tested-by: build bot (Jenkins) Reviewed-by: David Hendricks <dhendrix@chromium.org>
2013-11-07Trivial: Remove trailing whitespaces in status.shZheng Bao
The whitespaces make "git commit" failed. lint-stable-003-whitespace Check for superfluous whitespace in the tree ======== test failed: File util/status/status.sh has lines ending with whitespace. ======== Change-Id: I52fc5ae3e5aa81dac098b36d2479e4d10325a09b Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/4032 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2013-11-04Another pass at board status scriptDavid Hendricks
This reports relevant bits of information about a machine which is running coreboot. This also includes a script to get revision info from git, which we may want to split out into another patch. A remote target can be specified since it is likely that the machine used to develop the code is not the same machine being developed for. The remote host must be set up for non-interactive root login. Example: sh util/status/status.sh -r gizmoboard -u Change-Id: Ief0a85faca2ec9ce2d270e1e5b09e74836ab0c97 Signed-off-by: David Hendricks <dhendrix@chromium.org> Reviewed-on: http://review.coreboot.org/4021 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-10-22util/lint/lint-stable-003-whitespace: Ignore temporary files ending with a tildePaul Menzel
Some editors like gedit create auxiliary files ending with a tilde '~'. As these are not checked into the Git repository, do not check these for whitespace errors. Change-Id: I2c4cf00f9d623be73ea3bbb7b2da4f1e1900c8e9 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3952 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins) Reviewed-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
2013-10-17arch/x86/Makefile.inc: Pass $(AS) and $(CPP) to SeaBIOSAndrew Wu
SeaBIOS’ Makefile requires cpp (C Preprocessor) to build. Modify the xcompile script to search for cpp program path, and pass it to SeaBIOS’ `Makefile.inc`. Also pass the program path for as (GNU assembler). This is needed, so the crossgcc toolchain to build the SeaBIOS payload under Mac OSX. OSX ships a cpp program, but it works differently from GNU CPP, so we need to override it. Change-Id: If996ffbb76ec4bd16079b54b41f3fac07bfe25be Signed-off-by: Andrew Wu <arw@dmp.com.tw> Reviewed-on: http://review.coreboot.org/3896 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Jonathan A. Kollasch <jakllsch@kollasch.net>
2013-09-27lint: Use temporary build directoryNico Huber
`util/lint/lint-stable-002-build-dir-handling` always overwrites your current `config.h` and `auto.conf` when the pre-commit hook is run. It can be very confusing when your configuration is suddenly broken. So fix it by not using the default build directory. Change-Id: If2bbc97ac2f12a8203a3769d813386a023f93dd6 Signed-off-by: Nico Huber <nico.huber@secunet.com> Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/3593 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-09-20buildgcc: Downgrade to gcc 4.7.3, handle armv7-aPatrick Georgi
gcc 4.8.x has issues with using ebp, which broke some builds, so downgrade. The problem also manifested elsewhere, so it's not necessarily our fault. While at it, gcc complained about "armv7a" where it seems to expect "armv7-a". Change-Id: I6f0c35f49709cb41022475bb47116c12ab1c7ee3 Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Reviewed-on: http://review.coreboot.org/3930 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-09-18buildgcc: Use per-arch build directoriesPatrick Georgi
This simplifies debugging and also fixes an issue when build directories are kept between buildgcc runs for different architectures. Change-Id: I5badccd3368e3014680da3eedb607119fff8fa7f Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/3929 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2013-09-17Fix whitespace leaked into treeKyösti Mälkki
Clean whitespace errors that have gotten past lint-stable-003-whitespace and gerrit review. Change-Id: Id76fc68e9d32d1b2b672d519b75cdc80cc4f1ad9 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3920 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Bruce Griffith <Bruce.Griffith@se-eng.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-09-17lint whitespace: Fix rule to recurse into subdirectoriesKyösti Mälkki
The rule "-perm +111 -prune" matched any searchable directory and did not recursively find files in them. The use of "+mode" for -perm is deprecated. Change-Id: I1b43f89ee9ab37928e56104b0f07241ff84b84c0 Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3921 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-08-31Remove NRV2B compression supportPatrick Georgi
It wasn't even hooked up to the build system anymore. Change-Id: I4b962ffd945b39451e19da3ec2f7b8e0eecf2e53 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/3892 Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins)
2013-08-31Add a (b)zImage parser to cbfstoolPatrick Georgi
In the great tradition of LinuxBIOS this allows adding a kernel as payload. add-payload is extended to also allow adding an initial ramdisk (-I filename) and a command line (-C console=ttyS0). Change-Id: Iaca499a98b0adf0134e78d6bf020b6531a626aaa Signed-off-by: Patrick Georgi <patrick.georgi@secunet.com> Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/3302 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-08-27Locate the generated iasl in acpica-unix-20130626Zheng Bao
acpica-unix-20130626 doesn't use bin32 and bin64 to save the objects any more. Change-Id: I419ecc987e2adcd860a8ad1bf2f6b5c4dd40fd8a Signed-off-by: Zheng Bao <zheng.bao@amd.com> Signed-off-by: Zheng Bao <fishbaozi@gmail.com> Reviewed-on: http://review.coreboot.org/3885 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-08-16Correct spelling of shadow, setting and memoryPaul Menzel
Change-Id: Ic7d793754a8b59623b49b7a88c09b5c6b6ef2cf0 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3768 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-08-15cbfstool: Add an add-int command that adds a raw 64-bit integer CBFS filePeter Stuge
This simplifies storing SeaBIOS parameters in CBFS. Change-Id: I301644ba0d7a9cb5917c37a3b4ceddfa59e34e77 Signed-off-by: Peter Stuge <peter@stuge.se> Reviewed-on: http://review.coreboot.org/3733 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Reviewed-by: Patrick Georgi <patrick@georgi-clan.de>
2013-07-23inteltool: Print raw CPUID and make hexadecimal values unambiguousDamien Zammit
The raw CPUID is useful for matching the directories under 'src/cpu/intel' and is not easy to find out otherwise because it is most often decoded already. The decoded values are not obviously hexadecimal so prepend them with 0x to make sure they are unambiguous. The output differences look like this: - CPU: Processor Type: 0, Family 6, Model 25, Stepping 2 + CPU: ID 0x20652, Processor Type 0x0, Family 0x6, Model 0x25, Stepping 0x2 Change-Id: Id47f0b00f8db931f0000451c8f63ac1e966442c4 Signed-off-by: Damien Zammit <damien@zamaudio.com> Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-on: http://review.coreboot.org/3788 Reviewed-by: Stefan Tauner <stefan.tauner@gmx.at> Tested-by: build bot (Jenkins)
2013-07-22buildgcc: Update reference toolchainStefan Reinauer
* GCC 4.8.1 * binutils 2.23.2 * GDB 7.6 * ACPICA 20130626 * Python 3.3.2 ... this adds support for Aarch64. For Ron. Change-Id: Idec91bcd615bc35c83373bd23d4681f1c8eb015c Signed-off-by: Stefan Reinauer <reinauer@google.com> Reviewed-on: http://review.coreboot.org/3758 Tested-by: build bot (Jenkins) Reviewed-by: David Hubbard <david.c.hubbard+coreboot@gmail.com> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-07-08msrtool: Fix verbose ignored by cpuid().Benoît Legat
This is a trivial patch moving cpuid() call after reading argv so that verbose is set. Change-Id: Ic621191ef650495614a041413c1a0f707d4469e6 Signed-off-by: Benoît Legat <benoit.legat@gmail.com> Reviewed-on: http://review.coreboot.org/3627 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-07-01cbmem: Fix makefileStefan Tauner
The .dependencies rule did not use the CPPFLAGS variable which led to funny behavior: a spurious termination message the first time (after checkout/make distclean) one executes make. Afterwards the (wrongly) empty .dependencies file hides the problem and the binary is created anyway. $ make cbmem.c:37:34: fatal error: boot/coreboot_tables.h: No such file or directory compilation terminated. cc -O2 -Wall -Werror -iquote ../../src/include -iquote ../../src/src/arch/x86 -c -o cbmem.o cbmem.c cc cbmem.o -o cbmem $ make make: Nothing to be done for `all'. $ make clean rm -f cbmem *.o *~ $ make cc -O2 -Wall -Werror -iquote ../../src/include -iquote ../../src/src/arch/x86 -c -o cbmem.o cbmem.c cc cbmem.o -o cbmem $ make distclean rm -f cbmem *.o *~ rm -f .dependencies $ make cbmem.c:37:34: fatal error: boot/coreboot_tables.h: No such file or directory compilation terminated. cc -O2 -Wall -Werror -iquote ../../src/include -iquote ../../src/src/arch/x86 -c -o cbmem.o cbmem.c cc cbmem.o -o cbmem I fixed that by adding the CPPFLAGS variable to the .dependencies recipe, just like Stefan Reinauer did in Chromium (Ia9d2e10a3ef122f30d681d16c2291eb108ead835), hence the split sign-off for this tiny change. :) Change-Id: Icd11b146ad762cbdf9774630b950f70e1253a072 Signed-off-by: Stefan Reinauer <reinauer@google.com> Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-on: http://review.coreboot.org/3548 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber <nico.huber@secunet.com>
2013-06-25abuild: Add xgcc tools to the pathMarc Jones
abuild checks the path for toolchains prior to building a mainboard. It didn't check xgcc/, which would be picked up by the coreboot make, and fail to build when it shouldn't. Change-Id: If0ca4238e8c57a6b015fdad623ccdbf237ef1ba6 Signed-off-by: Marc Jones <marc.jones@se-eng.com> Reviewed-on: http://review.coreboot.org/3350 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-06-24ifdfake - Create an IFD with just a section layoutNico Huber
This new tool called `ifdfake` just creates an empty Intel Firmware Descriptor (IFD) and writes the IFD signature plus the section layout given on the command line. usage: ifdfake [(-b|-m|-g|-p) <start>:<end>]... <output file> -b | --bios <start>:<end> BIOS region -m | --me <start>:<end> Intel ME region -g | --gbe <start>:<end> Gigabit Ethernet region -p | --platform <start>:<end> Platform Data region -h | --help print this help <start> and <end> bounds are given in Bytes, the <end> bound is inclusive. All regions must be multiples of 4K in size and 4K aligned. The descriptor region always resides in the first 4K. An IFD created with ifdfake won't work as a replacement for a real IFD. Never try to flash such an IFD to your board! The output of ifdfake can be utilized to build an image with just the later added sections (like coreboot itself) being valid. The resulting image can then be partially written to a machines flash ROM to just update coreboot (i.e. the BIOS section). Change-Id: I925b47cab5c6d490a79d684bdd7a7a45ac442640 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/3523 Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-06-24AMD: Drop empty root_complexKyösti Mälkki
There are no files to build left under AMD nortbridge/x/root_complex directories. For some cases, even the Kconfig file was no longer sourced. Remove all such references and empty files. For devicetree.cb treat component paths with "/root_complex" in them valid even when the directory does not exists. This is because AMD boards us this dummy chip component as the root node in their devicetree.cb. The generated devicetree file static.c remains unchanged. Change-Id: I9278ebb50a83cebbf149b06afb5669899a8e4d0b Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-on: http://review.coreboot.org/3434 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones <marc.jones@se-eng.com>
2013-06-23inteltool: add initial support for NehalemStefan Tauner
Also, add pretty printing of Westmere's DMI registers (tested on my t410s by staring at non-zero output values :) Apparently Nehalem does not have a MEMBAR? But there are some documented memory controller control registers in PCI configuration space... left out for now. The PCIEXBAR is not documented publicly AFAICT, but there is a similar register on a device on bus 0xFF. phcoder might know more... Change-Id: I5faadb6e4f701728f5290276c02809b4993bd86d Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-on: http://review.coreboot.org/3505 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-06-13util/inteltool: Add support for other 5 chipsetsStefan Tauner
e4e8e090fa36cb3a098e1ddf0ea44c796c140572 does add support for QM57, but there are many more that should work with that code(?). Does not explode on... CPU: Processor Type: 0, Family 6, Model 25, Stepping 2 Northbridge: 8086:0044 (1st generation (Westmere family) Core Processor) Southbridge: 8086:3b0f (QS57) Change-Id: I85e15ba45678a5bd635415a7a8d69c05bff8f7ef Signed-off-by: Stefan Tauner <stefan.tauner@gmx.at> Reviewed-on: http://review.coreboot.org/3321 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Anton Kochkov <anton.kochkov@gmail.com>
2013-06-12Add spkmodem receiverVladimir Serbinenko
This is spkmodem receiver counterpart. Change-Id: Id27d32608502029fb6fcc8154f508811bf5ca77b Signed-off-by: Vladimir Serbinenko <phcoder@gmail.com> Reviewed-on: http://review.coreboot.org/3411 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-06-09buildgcc: Re-add some break statementsPatrick Georgi
While some of the case .. break statement actually weren't needed, too are, since otherwise the option parsing loop hangs. Exit conditions for that endless loop: "--" or no more arguments, in line with GNU command line parsing rules. Change-Id: I0dbc35e530fb8c93a0f7de05ac47f325555ad4a4 Signed-off-by: Patrick Georgi <patrick@georgi-clan.de> Reviewed-on: http://review.coreboot.org/3418 Tested-by: build bot (Jenkins) Reviewed-by: David Hubbard <david.c.hubbard+coreboot@gmail.com>
2013-06-06Intel Atom cpu support to msrtoolOlivier Langlois
Added support for Intel Atom cpu to msrtool Fixed a cut&paste error in nehalem msr bits definition It has been tested with a N455 cpu and msrtool output can be review at: http://www.trillion01.com/coreboot/msrtool_atom.txt Change-Id: I0ecf455b559185e2d16fa1a655bf021efc2ef537 Signed-off-by: Olivier Langlois <olivier@olivierlanglois.net> Reviewed-on: http://review.coreboot.org/3351 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-06-04viatool: Add utility to read various configuration bits on VIA systemsAlexandru Gagniuc
viatool is a utility for extracting useful for extracting certain configuration bits on VIA chipsets and CPUs. It is a fork of inteltool. viatool is currently focused on "quirks". Quirks are device configurations that cannot be accessed directly. They are implemented as hierarchical configurations in the PCI or memory address spaces (index/data register pairs). Such configurations refer to hardware parameters that are board specific. Those parameters would otherwise be difficult to extract from a system running the vendor's firmware. viatool also preserves inteltool's MSR dumps. VIA CPU and Intel CPU MSRs are nearly identical. Change-Id: Icbd39eaf7c7da5568732d77dbf2aed135f835754 Signed-off-by: Alexandru Gagniuc <mr.nuke.me@gmail.com> Reviewed-on: http://review.coreboot.org/1430 Tested-by: build bot (Jenkins) Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2013-06-04superiotool: Add dump facility for HWM of W83627DHG-PNico Huber
Change-Id: I9355996a8cf1b7cb91cc415ec04f5108a1cc42a5 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/3358 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2013-06-04superiotool: Add dump facility for ITE IT8516 + I/O 0x20e/fNico Huber
Change-Id: Iaea08b7eb5aac9ff1e0756f1400a82641bb45b14 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: http://review.coreboot.org/3359 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-27 07:12:15 +0000