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2004-10-16- Bump MAX_LINKS to 4 I have actually found an i2c bridge that needs thisEric Biederman
- Fix the hdama Config.lb to not longer use the link keywords oops, and instead to have it nest everything properly. - Update config.g to not support the link keyword - update config.g to not support northbridge/southbridge/cpu/pmc noise words we can just use chip now. - Remove old link handling from the code - Detect and handle duplicate paths so we generate one device with multiple links git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1685 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-16- HDAMA boots!Eric Biederman
- Set the bootstrap processor flag in the mptable. - Implement 64bit support in our print statements - Fix the reporting of how many cpus we are waiting to stop. It is the 1 less than the actual number of cpus running. - Actually enable cpu_initialization. - Fix firstsiblingdevice in config.g - Add IORESOURCE_FIXED to all of the resources set by config.g - Fix the apic_cluster rule to add an apic_cluster path not an apic path. - Add a div64.h to assist in the 64bit printf. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1682 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-16- First stab at running linuxbios without the old static device tree.Eric Biederman
Things are close but not quite there yet. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1681 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-16- Fix config.g and the hdama config so everthing builds again.Eric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1680 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-15add back stuff from beforeRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1679 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-15fixes for apic, i2cRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1678 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-15closerRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1677 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-15this now works right.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1676 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14more or less more or less brokenRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1668 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14more breakage, thanks to RonRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1665 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-14- Add chip and a few other bug fixesEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1656 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-10-06epia-m supportRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1655 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-09-30support for sst firmware hubRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1651 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-09-28use hex print in id1, id2Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1650 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-09-28add support for ICH4. more i955pm stuff.Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1649 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-09-07code reformatLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1647 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-09-07seperate code generationLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1646 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-07-08added testbios for V2Li-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1624 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-29- Small bug fixes to romcc. The deep problems with not inlining functions ↵Eric Biederman
remain git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1615 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-06-03remove brain-dead verify codeGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1590 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-29- Don't confuse return statements with conditional branchesEric Biederman
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1587 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-28- Upgrade to romcc version 0.63Eric Biederman
This includes more test cases Lots of small bug fixes A built in C preprocessor Initial support for not inlining everything __attribute__((noinline)) works Better command line options and help Constants arrays can be read at compile time Asm statements that are not volatile will now be removed when their outputs go unused Loads and stores that are not volatile will be removed when their values go unused The number of FIXMES in the code is finally starting to go down. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1582 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-05-24minor reformatLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1569 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-29chaged chip_device_path::enable to chip_device_path::enabled,Li-Ta Lo
again, I am the only one who can't speak English. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1544 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-14seperate checksum and code generating code.Li-Ta Lo
use mmap instead of file io git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1504 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-13removed unused assignirq.c and aute generated irq_tables.cLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1502 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-13back out incorrect commit on config.gLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1501 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-13porting getpir to freebios2Li-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1500 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-04-13add missing return at 205Ronald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1496 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-27data tye consistenceLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1487 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-27removed false alarm of erase/write, use verify '-v' if you are not sure ↵Li-Ta Lo
about the integrity git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1486 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-23These changes tighten up rules for exporting options.Greg Watson
1. Exportable options ('export used') used to be exported if referred to in a 'uses' statement. These options will now only be exported if the option is set, or the default value is changed. 2. Options marked as 'export always' with no default value ('default none') used to generate defines with no values 'export k8:='. This behavior has changed so that the option will ONLY be exported if it has a value assigned using 'set' or 'default'. Otherwise it is an error. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1467 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-22fixed minor typoLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1465 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-22more jedec standard consolidatation.Li-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1464 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-20rmove unused #define and function declaretionLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1459 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-20I have no idea what i was trying to show off when I used the while loop ratherLi-Ta Lo
than for loop. Please forgive me, I was too young 4 years ago. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1458 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-20consolidate more jedec standard codeLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1457 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-19remove duplicated codeLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1456 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-18Added support for SST49LF0xxA parts.David W. Hendricks
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1439 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-18Added support for more SST 49lf0xxA partsDavid W. Hendricks
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1438 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-18forgot a semicolonLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1437 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-18removed unused code in pm49fl004, remove experimental delay in sst49lf040Li-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1436 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-18fixed stupid i++ evalution order bugLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1435 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-18fixed 32bit v.s. 64bit long int arithematicsLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1434 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-17removed spd_dump.c, it has nothing to do with flashing flash parts.Li-Ta Lo
use standard product ID exit method for w49f002u move udelay stuff into its own file git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1433 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-17move utility functions into new source filesLi-Ta Lo
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1428 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-17Added support for SST49LF040David W. Hendricks
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1422 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-11- Moved hlt() to it's own header.Eric Biederman
- Reworked pnp superio device support. Now complete superio support is less than 100 lines. - Added support for hard coding resource assignments in Config.lb - Minor bug fixes to romcc - Initial support for catching the x86 processor BIST error codes. I've only seen this trigger once in production during a very suspcious reset but... - added raminit_test to test the code paths in raminit.c for the Opteron - Removed the IORESOURCE_SET bit and added IORESOURCE_ASSIGNED and IORESOURCE_STORED so we can tell what we have really done. - Added generic AGP/IOMMU setting code to x86 - Added an implementation of memmove and removed reserved identifiers from memcpy - Added minimal support for booting on pre b3 stepping K8 cores - Moved the checksum on amd8111 boards because our default location was on top of extended RTC registers - On the Hdama added support for enabling i2c hub so we can get at the temperature sensors. Not that i2c bus was implemented well enough to make that useful. - Redid the Opteron port so we should only need one reset and most of memory initialization is done in cpu_fixup. This is much, much faster. - Attempted to make the VGA IO region assigment work. The code seems to work now... - Redid the error handling in amdk8/raminit.c to distinguish between a bad value and a smbus error, and moved memory clearing out to cpufixup. - Removed CONFIG_KEYBOARD as it was useless. See pc87360/superio.c for how to setup a legacy keyboard properly. - Reworked the register values for standard hardware, moving the defintions from chip.h into the headers of the initialization routines. This is much saner and is actually implemented. - Made the hdama port an under clockers BIOS. I debuged so many interesting problems. - On amd8111_lpc added setup of architectural/legacy hardware - Enabled PCI error reporting as much as possible. - Enhanded build_opt_tbl to generate a header of the cmos option locations so that romcc compiled code can query the cmos options. - In romcc gracefully handle function names that degenerate into function pointers - Bumped the version to 1.1.6 as we are getting closer to 2.0 TODO finish optimizing the HT links of non dual boards TODO make all Opteron board work again TODO convert all superio devices to use the new helpers TODO convert the via/epia to freebios2 conventions TODO cpu fixup/setup by cpu type git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1390 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-03-07config.gGreg Watson
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1383 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2004-02-13fix makefileRonald G. Minnich
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1376 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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