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2008-01-28Fix mptable util so the output will compileJon Dufresne
Signed-off-by: Jon Dufresne <jon.dufresne@gmail.com> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3084 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-27Make the vendor name optional in the -m flashrom parameter when there's onlyPeter Stuge
one board name that matches. The full syntax still works, and is required when two vendors have boards with the same names. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3082 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-27Forgot to add Spansion S25FL016A to README, trivial.Peter Stuge
Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Peter Stuge <peter@stuge.se> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3080 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-26Correctly disable the ROM area Write Protect bit in the Geode LX.Marc Jones
Signed-off-by: Marc Jones <marc.jones@amd.com> Acked-by: Peter Stuge <peter@stuge.se> Tested on the pcengines alix1c and works fine. Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3078 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-25Various small fixes and updates for lxbios (trivial).Uwe Hermann
- Update website URL to http://coreboot.org/Lxbios. - Use svn:keywords property to actually expand the $Id$ entries. - Update COPYING to the latest version from http://www.gnu.org/licenses/old-licenses/gpl-2.0.txt Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3075 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-25Add ids and chip entry for Spansion S25FL016A to flashrom, tested,Peter Stuge
working. Signed-off-by: Peter Stuge <peter@stuge.se> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3074 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-22Here is just a little and simple patch to get the MX25L3205D working.Harald Gutmann
I've tested and verified the chip myself, and it seems to work everything like supposted, since Carl-Daniel has patched flashrom to use the read funktion on verifying. "benchvice flashrom # ./flashrom -m gigabyte:m57sli -v test.4mb Calibrating delay loop... OK. No coreboot table found. Found chipset "NVIDIA MCP55", enabling flash write... OK. Found board "GIGABYTE GA-M57SLI-S4": enabling flash write... Serial flash segment 0xfffe0000-0xffffffff enabled Serial flash segment 0x000e0000-0x000fffff enabled Serial flash segment 0xffee0000-0xffefffff disabled Serial flash segment 0xfff80000-0xfffeffff enabled LPC write to serial flash enabled serial flash pin 29 OK. MX25L3205 found at physical address 0xffc00000. Flash part is MX25L3205 (4096 KB). Flash image seems to be a legacy BIOS. Disabling checks. Verifying flash... VERIFIED. benchvice flashrom # ls -l test.4mb -rw-r--r-- 1 root root 4194304 22. Jan 16:27 test.4mb Signed-off-by: Harald Gutmann <harald.gutmann@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3072 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-22Flashrom did not use the read function for verifying, it used direct memoryCarl-Daniel Hailfinger
access instead. That fails if the flash chip is not mapped completely. If the read function is set in struct flashchip, use it for verification as well. This fixes verification of all SPI flash chips >512 kByte behind an IT8716F flash translation chip. "MX25L8005 found at physical address 0xfff00000. Flash part is MX25L8005 (1024 KB). Flash image seems to be a legacy BIOS. Disabling checks. Verifying flash... VERIFIED." Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Harald Gutmann <harald.gutmann@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3070 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-22Make sure we delay writing the next byte long enough in SPI byteCarl-Daniel Hailfinger
programming. Minor formatting changes. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Harald Gutmann <harald.gutmann@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3069 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-21Omitting the wait for SPI ready when there is no data to be read, e.g.Ronald Hoogenboom
readcnt==0 saves 10 seconds with the unconditional 10us delay, reducing programming time for SST25VF016B to 40-45 secs. Signed-off-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3068 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-21This patch adds version information to flashrom. Because 'v' and 'V'Bernhard Walle
are already in use, the patch uses 'R' (for release) and, of course, '--version'. Signed-off-by: Bernhard Walle <bernhard.walle@gmx.de> Acked-by: Ulf Jordan <jordan@chalmers.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3067 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-19Add Bingxun Shi <bingxunshi@gmail.com> to the list of contributors (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3064 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-19Small superiotool fix to detect more Winbond W83627EHF chips. TheUwe Hermann
patch is tested on actual hardware. As per datasheet the ID should be 0x886? for those chips. Not mentioned in the datasheet, but sensors-detect says 0x8853 is also possible. Also, the ASUS A8V-E Deluxe (W83627EHF) has an ID of 0x8854 (verified on actual hardware). So assume all 0x88?? IDs to mean W83627EHF/EF/EHG/EG. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3063 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-19This patch is for winbond w83627DHG superio support in superiotool.Bingxun Shi
I have test that on my board, it works ;) Signed-off-by: Bingxun Shi <bingxunshi@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3062 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-19Support SPI flash chips bigger than 512 kByte sitting behind IT8716FRonald Hoogenboom
Super I/O performing LPC-to-SPI flash translation. Signed-off-by: Ronald Hoogenboom <hoogenboom30@zonnet.nl> Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3061 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-18Document the --list-supported option. Various small fixes (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3060 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-18Minor documentation improvements/fixes in the README and manpage (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3059 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-18rename linuxbios_* files in utils repository.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3058 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-18rename linuxbios_* files, too.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3057 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-18util/ renamesStefan Reinauer
Acked-by: Stefan Reinauer <stepan@coresystems.de> Signed-off-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3056 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-18rename linuxbios -> corebootStefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3055 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-18for some reasons the externals did not get committed.Stefan Reinauer
Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3054 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-18Rename almost all occurences of LinuxBIOS to coreboot. Stefan Reinauer
Due to the automatic nature of this update, I am self-acking. It worked in abuild. Signed-off-by: Stefan Reinauer <stepan@coresystems.de> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3053 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-15Add new --list-supported switch for printing the list of Super I/OsRobinson P. Tryon
supported by superiotool (closes #91). Signed-off-by: Robinson P. Tryon <bishop.robinson@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3050 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-11This patch removes '\n' from the help output since this looks a bit strange.Bernhard Walle
After the patch [...] The line length is still below 80 characters. Signed-off-by: Bernhard Walle <bernhard.walle@gmx.de> Acked-by: Torsten Duwe <duwe@lst.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3045 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-10Enable MX25L8005 support in flashrom. The #defines were already there.Harald Gutmann
Signed-off-by: Harald Gutmann <harald.gutmann@gmx.net> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3042 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-07Add support for the SST25VF040B 4 Mbit SPI flash chip.Carl-Daniel Hailfinger
Straight from the data sheet, not tested. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Stefan Reinauer <stepan@coresystems.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3036 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-04Add board enable for the gigabyte ga_2761gxdk boardRonald G. Minnich
Signed-off-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3033 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2008-01-04Print at least the vendor for SPI flash chips if the exact chip ID isCarl-Daniel Hailfinger
unknown. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3032 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-31Unfortunately, EN29F002T, EN29F002AT, EN29F002ANT, EN29F002NT all haveCarl-Daniel Hailfinger
exactly the same ID. Improve model number printing. Add EN29F002(A)(N)B support while I'm at it. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Markus Boas <bios@ryven.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3031 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-31Add continuation ID support to jedec.cCarl-Daniel Hailfinger
The continuation ID code does not go further than checking for IDs of the type 0x7fXX, but does this for vendor and product ID. The current published JEDEC spec has a list where the largest vendor ID is 7 bytes long, but all leading bytes are 0x7f. The list will grow in the future, and using a 64bit variable will not be enough anymore. Besides that, it seems that the location of the ID byte after the first continuation ID byte is very vendor specific, so we may have to revisit that code some time in the future. (Suggestion for a new encoding: Use a two-byte data type for the ID, the lower byte contains the only non-0x7f byte, the upper byte contains the number of 0x7f bytes used as prefix, which is the bank number minus 1 the vendor ID appears in.) Add support for EON EN29F002AT. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3030 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-31This fixes a few vendor IDs to conform with JEDEC publication 106WCarl-Daniel Hailfinger
(JEP106W), adds some device IDs and provides information about non-conforming IDs. The EON change is left to the patch adding EON chips. This patch should have no effect on code generation. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3029 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-29All SPI chips mentioned in flashchips.c had their sector size listed asCarl-Daniel Hailfinger
page size. Fix that. Page size is uniform 256 bytes for SPI. A sector/block size field in struct flashchip would be nice, though. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3027 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-29Print the chip status register for all SPI chips on probe if verboseCarl-Daniel Hailfinger
output is specified. Pretty-print the chip status register (including block lock information) for ST M25P family and Macronix MX25L family chips. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3026 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-29Add 25VF016B support to flashrom. Untested, but verified against theCarl-Daniel Hailfinger
data sheet. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3025 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-17Add support for ST M25P05-A, M25P10-A, M25P20, M25P40, M25P16, M25P32,Carl-Daniel Hailfinger
M25P64, M25P128 to flashrom. ST M25P80 support is already there. Not tested, but conforming to data sheets and double checked. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3012 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-17Add dump support for NSC PC87317.Ulf Jordan
Signed-off-by: Ulf Jordan <jordan@chalmers.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3011 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-17To make it easier to add new SPI chips to flashchips.c, rename functionsCarl-Daniel Hailfinger
with multiple possible opcodes from linear numbering at the end (_1, _2) to include the opcode at the end (_60, _c7). That way, you only have to take a short look at the data sheet and choose the right function by appending the opcode listed in the data sheet. No functional changes. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Ward Vandewege <ward@gnu.org> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3009 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-16Add support for ST M25P80 chips to flashrom. Detection was tested.Carl-Daniel Hailfinger
Print status register before erase to help debugging block locks. Signed-off-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3008 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-14Add dump support for SMSC LPC47M192.Ulf Jordan
Signed-off-by: Ulf Jordan <jordan@chalmers.se> Acked-by: Corey Osgood <corey.osgood@gmail.com> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3007 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-14Add dump support for NSC PC97317.Ulf Jordan
Signed-off-by: Ulf Jordan <jordan@chalmers.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3006 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-13Add detection and dump support for NSC PC97307.Ulf Jordan
Signed-off-by: Ulf Jordan <jordan@chalmers.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3005 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-13Add dump support for NSC PC8741x.Ulf Jordan
Signed-off-by: Ulf Jordan <jordan@chalmers.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3004 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-10Add support for more atmel chips:Frederico Silva
AT49F002 AT49F002N AT49F002T AT49F002NT Only tested the read function on AT49F002T. datasheet @ http://www.atmel.com/atmel/acrobat/doc1017.pdf Signed-off-by: Frederico Silva <frederico.silva@gmail.com> Acked-by: Carl-Daniel Hailfinger <c-d.hailfinger.devel.2006@gmx.net> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3003 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-08Add detection and dump support for NSC PC87309.Ulf Jordan
Signed-off-by: Ulf Jordan <jordan@chalmers.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3001 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-07Add/fix some LDN descriptions (trivial).Uwe Hermann
Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3000 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-07Fix typo. According to National's datasheet PC87317 has SID = 0xd0 andUlf Jordan
PC97317 has SID = 0xdf. PC87371/PC97371 do not seem to exist. Signed-off-by: Ulf Jordan <jordan@chalmers.se> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2999 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-04Various coding style fixes, constification, fixed typos (trivial).Uwe Hermann
Also, s/0xFF80/0xFFC0/ in the Acorp 6A815EPD board-enable, as per http://www.linuxbios.org/pipermail/linuxbios/2007-December/027750.html Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2997 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-12-02Add board-enable for Acorp 6A815EPD.Jonathan A. Kollasch
Signed-off-by: Jonathan A. Kollasch <jakllsch@kollasch.net> Acked-by: Ronald G. Minnich <rminnich@gmail.com> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2995 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
2007-11-29Various small fixes (trivial).Uwe Hermann
- Add missing contributors to the README. - Drop obsolete -D option from manpage. - Only list contributors who added non-trivial amounts of code as copyright holders (and do not list those who merely provided register dump support for Super I/Os). Those contributors are still listed in the README, of course. See discussion in the thread starting at http://www.linuxbios.org/pipermail/linuxbios/2007-October/025516.html - Make a function static. - Fix incorrect URL in code comment. Drop obsolete comments. Signed-off-by: Uwe Hermann <uwe@hermann-uwe.de> Acked-by: Uwe Hermann <uwe@hermann-uwe.de> git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2992 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
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