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2018-06-18cbfstool: Use endian.h and functions from commonlibWerner Zeh
The endian conversion function be32toh() is defined in src/include/endian.h, however this file is not used for cbfstool compilation. Currently the one provided by the host is used and if the host does not provide this endian.h file, the build will fail. However, we do have endian conversion functions in commonlib/endian.h which is available for cbfstool compilation. Switch from be32toh() to read_be32() in order to avoid relying on a host provided include file. We use functions from commonlib/endian.h already in cbfstool. Change-Id: I106274cf9c69e1849f848920d96a61188f895b36 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/27116 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-15util/cbfstool: Support FIT payloadsPatrick Rudolph
In order to support booting a GNU/Linux payload on non x86, the FIT format should be used, as it is the defacto standard on ARM. Due to greater complexity of FIT it is not converted to simple ELF format. Add support for autodecting FIT payloads and add them as new CBFS_TYPE 'fit'. The payload is included as is, with no special header. The code can determine the type at runtime using the CBFS_TYPE field. Support for parsing FIT payloads in coreboot is added in a follow on commit. Compression of FIT payloads is not supported, as the FIT sections might be compressed itself. Starting at this point a CBFS payload/ can be either of type FIT or SELF. Tested on Cavium SoC. Change-Id: Ic5fc30cd5419eb76c4eb50cca3449caea60270de Signed-off-by: Patrick Rudolph <patrick.rudolph@9elements.com> Reviewed-on: https://review.coreboot.org/25860 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-06-14src: Get rid of unneeded whitespaceElyes HAOUAS
Change-Id: I630d49ab504d9f6e052806b516a600fa41b9a8da Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26991 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-14src: Get rid of device_tElyes HAOUAS
Use of device_t is deprecated. Change-Id: I6adc0429ae9ecc8f726d6167a6458d9333dc515f Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/27036 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-14util/docker/coreboot.org-status: collect report generatorsPatrick Georgi
Move generators for the board status report and the kconfig options report into a common directory and wrap them in a docker container. Also rework to emit HTML not wiki syntax. Change-Id: If42e1dd312c5fa4e32f519865e3b551bc471bc72 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/26977 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2018-06-14util/lint: Run lint-extended-007-final-newlines checks in parallelMartin Roth
Instead of checking each directory in series, kick off the checks in parallel and then wait for them to finish. Failures print out with file information, so mixing output isn't a problem. This reduces the time it takes to run on lumberingbuilder by 60%. This could probably be sped up even more by splitting up src/mainboard into smaller sections. This method does skip a few control files at the top level - .gitignore, .checkpatch.conf, gnat.adc, etc. These could be added to the list of files to check, but I didn't think it was needed. Change-Id: I171977e713a9956cf4142cfc0a199e10040abb35 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/27011 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-13util/sconfig: Prepare sconfig to allow parsing multiple treesFurquan Shaikh
In preparation to allow devicetree overrides, it will be necessary to use the same parsing functions to prepare two separate parse trees. This change does the following things: 1. Updates root device and bus names to add base_ prefix. 2. Adds a function parse_devicetree that sets the root_parent and linenum before calling yyparse(). 3. Updates all uses of root_dev to refer to the next base_root_dev. BUG=b:80081934 TEST=Verified that static.c generated for all boards built using abuild is the same with and without this change. Change-Id: I403a90c1ebf07ac66115ddfe137daf0980dc1a18 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/27017 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-06-12util/lint: Run lint-extended-007-checkpatch checks in parallelMartin Roth
Instead of checking each directory in series, kick off all the checks in parallel and then wait for them to finish. Failures print out with file information, so mixing output isn't a problem. This reduces the time it takes to run on lumberingbuilder from 31 seconds to 6. Change-Id: I1252a68a723370389d399f3d1a2aff3fad64c365 Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/26995 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-12kconfig: add script to manipulate .config files on the command linePaul Menzel
Copy the script `scripts/config` from Linux (commit 427fbe89 (Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/rzhang/linux)) into the newly created directory `scripts`. Here is the original commit message from 2009. > commit 8e54701ea85b0ab0971637825a628f5aa2b678a4 > Author: Andi Kleen <andi@firstfloor.org> > Date: Sat Jan 3 03:21:41 2009 +0100 > > kconfig: add script to manipulate .config files on the command line > > I often change single options in .config files. Instead of using > an editor or one of the frontends it's convenient to do this from > the command line. It's also useful to do from automated build scripts > when building different variants from a base config file. > > I extracted most of the CONFIG manipulation code from one of my > build scripts into a new shell script scripts/config > > The script is not integrated with the normal Kconfig machinery > and doesn't do any checking against Kconfig files, but just manipulates > that text format. This is always done at make time anyways. > > I believe this script would be a useful standard addition for scripts/* > > Sample usage: > > ./scripts/config --disable smp > Disable SMP in .config file > > ./scripts/config --file otherdir/.config --module e1000e > Enable E1000E as module in otherdir/.config > > ./scripts/config --state smp > y > Check state of config option CONFIG_SMP > > After merging into git please make scripts/config executable > > Signed-off-by: Andi Kleen <ak@linux.intel.com> > Signed-off-by: Sam Ravnborg <sam@ravnborg.org> Change-Id: Ie32a4459398df8694956dd644f38692017a26388 Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/26243 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-11util/optionlist: show location of a commentPatrick Georgi
Change-Id: Ib417f435011f0331a1b0228734874ef0a62fb587 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/26945 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2018-06-11util/optionlist: move kconfig2wiki to kconfig2html and adapt to htmlPatrick Georgi
This also removes a "chapters mode" that we never used. Change-Id: Ib301e2f4db0b9678081fa987a5dcc7108bb103a4 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/26944 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2018-06-11inteltool: Add dumping of full PCR portsYouness Alaoui
SoCs from Skylake on have many settings as so called private con- figuration registers (PCRs). These are organized as 256 ports with a 64KiB space each. We use the Primary to Sideband (P2SB) bridge's BAR to access them. Change-Id: Iede4ac601355e2be377bc986d62d20098980ec35 Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/19593 Reviewed-by: Youness Alaoui <snifikino@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-11mediatek/mt8183: Add a stub implementation of the MT8183 SOCTristan Shieh
Most things still need to be filled in, but this will allow us to build boards which use this SOC. BUG=b:80501386 BRANCH=none TEST=timer and uart work fine Change-Id: Ie81fa56ffce85188e1f9e979f9b0e64b764c2627 Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com> Reviewed-on: https://review.coreboot.org/26659 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Hung-Te Lin <hungte@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-11{src,util}: Use NULL instead of 0 for pointerElyes HAOUAS
Change-Id: I75fa4577055f25dde0a8b1044c005bba72cabd92 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26857 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-11crossgcc: Update to clang 6.0 & cmake 3.11.3Martin Roth
Change-Id: I1a0db60b527c2f7ffe77743c0d75b78a7c8bc4cc Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/26877 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-08util/sconfig: Get rid of rescnt in struct deviceFurquan Shaikh
This change gets rid of rescnt member in struct device since it is redundant. "res" member can be used to determine if resource list is present or not. BUG=b:80081934 TEST=Verified that static.c generated with and without this CL is exactly the same for all boards built using abuild. Change-Id: I73a2361686ad1130716a7d29576f2d02b9ed33c1 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26806 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-08util/sconfig: Re-factor device structure in parse treeFurquan Shaikh
This change re-factors the device structure in parse tree to be able to support multidev devices just like non-multidev devices. With this change, every device has a bus under it which is the parent of all devices that fall on the bus. If there are duplicate entries in the devicetree, then there will be multiple buses under the device and each bus will have its own set of children. The tree starts out with a root device which has a root bus under it. This is a special device which is created statically and its parent is its own root bus. When parsing the device tree file, devices get added under the root bus as children. Since this change re-organizes the way devicetree is represented, it gets rid of latestchild and next_sibling pointers from struct device. Also, the tree traversal to generate static.c is changed to breadth-first walk instead of using the next_sibling. BUG=b:80081934 TEST=Verified using abuild that all boards compile successfully. Change-Id: Ic8c8a73a247e8e992ab6b1b2cc3131e06fa2e5a1 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26800 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-08util/sconfig: Make queue handling more generic within main.cFurquan Shaikh
This change updates queue handling routines to be more generic so that it can be used by more than just chip queue. Additionally, it provides functions to dequeue element from head and peek head of a queue which will be used in a follow-up commit. BUG=b:80081934 TEST=Verified that abuild compiles successfully for all boards. Change-Id: Ibd2de85b48c5d4e2790bf974ea3bb1bd387f66ee Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26802 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-08sconfig/main.c: Fix number of arguments in fprintfMaulik V Vaghela
During compilation sconfig/main.c gives an error regarding number of arguments passed in fprintf. BUG=none BRANCH=none TEST=check if compilation warning has been fixed Change-Id: Ia769cc606a1e3f7e1188cd82235442493d37f664 Signed-off-by: Maulik V Vaghela <maulik.v.vaghela@intel.com> Reviewed-on: https://review.coreboot.org/26972 Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com> Reviewed-by: Furquan Shaikh <furquan@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-08util/sconfig: Get rid of unused parameter to walk_device_treeFurquan Shaikh
This change gets rid of unused 3rd parameter chips to the function walk_device_tree. BUG=b:80081934 TEST=Verified that abuild compiles successfully for all boards. Change-Id: I255ff030562073b16310fc22a0981808bf2c062f Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26801 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-07util/docker/doc.coreboot.org: Add git to the imagePatrick Georgi
Required to get a current version string onto doc.coreboot.org Change-Id: Iac54c4be2d4e783b7bf9ed529a431e72c67abab7 Signed-off-by: Patrick Georgi <patrick@georgi.software> Reviewed-on: https://review.coreboot.org/26896 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-06-07util/docker: rename docs.c.o to doc.c.oPatrick Georgi
Make the directory name match the name of the subdomain. Change-Id: I2dcf2385e6d953b7fe02caef72413149a332ec24 Signed-off-by: Patrick Georgi <patrick@georgi.software> Reviewed-on: https://review.coreboot.org/26887 Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-07util/docker/docs.coreboot.org: reduce container sizePatrick Georgi
We don't need the .deb files in the image forever Change-Id: I67a56faf8f9466e5162f7662708a5abb2971d2f9 Signed-off-by: Patrick Georgi <patrick@georgi.software> Reviewed-on: https://review.coreboot.org/26895 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-06-07util/docker/docs.coreboot.org: Downgrade sphinxPatrick Georgi
Sphinx >= 1.6 can't use recommonmark. debian/stable is ancient enough to have an older version. Change-Id: I287deab9168ab6124b05d0c6d6e8cdbd7fdc2eec Signed-off-by: Patrick Georgi <patrick@georgi.software> Reviewed-on: https://review.coreboot.org/26699 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-06-07util/lint: Add filename checkerMartin Roth
Check that filenames have only alphanumeric characters plus underscore, dash, and period. Change-Id: I7bf0be15d588aa1a5ece628b56e871662d6af44b Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/26938 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-05util/sconfig: Get rid of nextdev member in struct deviceFurquan Shaikh
Now that chips and devices are treated differently and the device tree actually contains only devices, next and nextdev are exactly the same for all devices in the tree. This change gets rid of nextdev pointer and updates all uses of nextdev to next. BUG=b:80081934 TEST=Verified that static.c generated for all boards built by abuild is same with and without this change. Change-Id: Ie50b3d769a78fe0beddba2e5551441b43cb212a2 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26741 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-05util/sconfig: Get rid of struct headerFurquan Shaikh
Now that chips and devices are treated differently in sconfig, this change gets rid of struct header and add_header function which were responsible for maintaining list of headers that need to be added to static.c. Instead, struct chip is re-factored into struct chip and struct chip_instance, where chip is a list of unique chips required by the mainboard whereas chip_instance is an instance of the chip. One chip can have multiple instances dependending upon the devices in the system. Also, struct device is updated to hold a pointer to chip instance instead of the chip structure. This unique list of chips is then used to add appropriate headers to static.c BUG=b:80081934 TEST=Verified using abuild that all boards compile successfully. Change-Id: I6fccdf7c361b4f55a831195adcda9b21932755aa Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26739 Reviewed-by: Aaron Durbin <adurbin@chromium.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-05util/sconfig: Add helper function for allocating memoryFurquan Shaikh
Add a helper function s_alloc (sconfig alloc) that allocates memory using calloc to get 0 initialized memory and checks to ensure it is not NULL. BUG=b:80081934 Change-Id: I56a70cf4865c50ed238226ace86e867bb1ec53db Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26738 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-05util/sconfig: Get rid of bus pointer in device structureFurquan Shaikh
The only reason bus pointer existed in device structure in sconfig was to allow a node to point to the parent which could be a chip and bus which is the true parent in device tree hierarchy. Now that chip is no longer a device, there is no need for separate bus and parent pointers. This change gets rid of the redundant bus pointer in struct device in sconfig. BUG=b:80081934 TEST=Verified that static.c generated for all boards built by abuild is same with and without this change. Change-Id: I21f8fe1545a9ed53d66d6d4462df4a5d63023844 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26736 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-05util/sconfig: Re-factor emitting of headers to static.cFurquan Shaikh
This change removes call to add_header from parsing functions and moves it to a local function within main.c. It also adds a new function emit_headers that is responsible for creating the linked list for chip headers and emitting those to static.c BUG=b:80081934 TEST=Verified that static.c for all files compiled using abuild is the same with and without this change. Change-Id: I24d526e81323115d3cc927242a4b9e49414afbe0 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26726 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-05util/sconfig: Re-factor sconfig to not assume chip as deviceFurquan Shaikh
This change adds a new structure "struct chip" to identify elements of type chip rather than re-using the structure for device. Until now chip was treated as a device while generating the parse tree and then device tree postprocessing skipped over all the chip entries in children and sibling pointers of device nodes. With this change, the device tree will only contain struct device in the parsed tree. It helps by avoiding unnecessary pointers to chip structure as children or next_sibling and then skipping those elements in post processing. Every device can then hold a pointer to its chip. When generating static.c, chip structure is emitted before device structure to ensure that the device structure has chip within its scope. Externally, the only visible change in static.c should be the order in which chip/device elements are emitted i.e. previously all chips under a particular device were emitted to static.c and then the devices using those chips. Now, all chips are emitted before all the devices in static.c BUG=b:80081934 TEST=Verified that abuild is successful for all boards. Also, verified that static.c generated for eve, kahlee, scarlet, asrock imb_a180 is unchanged from before in node definitions. Change-Id: I255092f527c8eecb144385eb681df20e54caf8f5 Signed-off-by: Furquan Shaikh <furquan@google.com> Reviewed-on: https://review.coreboot.org/26720 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-06-04util/ifdtool: Remove .dependencies on make cleanWerner Zeh
The generated file .dependencies shall be removed on invocation of 'make clean' as the clean target aims to delete all generated files. Change-Id: I4ec291fe84136bbdf1c2563cc10195846652a36d Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/26600 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-04board_status: Abort if repository is in a dirty statePaul Menzel
Run `git status` to let the user spot what is going on. Change-Id: I154d964354872f922cd22b05a5d2231ca2504f25 Signed-off-by: Paul Menzel <paulepanter@users.sourceforge.net> Signed-off-by: Paul Menzel <pmenzel@molgen.mpg.de> Reviewed-on: https://review.coreboot.org/22016 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-06-04util/superiotool: Remove whitespace before tabElyes HAOUAS
Change-Id: Ie79cfb92cfb8b8f628aa4b12bba946b0479fc466 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26668 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-04util/cbfstool: Remove whitespace before tabElyes HAOUAS
Change-Id: I122acaf9129afaa7b3ae8fd50d8717138809132e Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26669 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-06-04util/inteltool: Add Pentium 4 model f6xElyes HAOUAS
Tested on Pentium 4, CPUID = 0F65 board: NEC 945G-M4. Change-Id: I27c4bb0aed3259aa332581384077e000c9fb4b4c Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/23521 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-06-04util/msrtool: Add Pentium D supportElyes HAOUAS
CPUID F6x will not support all MSRs on intel_pentium4_later. Removed from pentium4_later and added as Pentium D. Change-Id: Ic6ac0593607b6f87fe921ac52738dad5ee3457dc Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/26289 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
2018-06-03buildgcc: Update IASL to 20180531Iru Cai
Change-Id: I6c14f3aad59749896816bb8789788fc513e7176f Signed-off-by: Iru Cai <mytbk920423@gmail.com> Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/21156 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-06-02util/lint: Update lint-000-license-headers linterMartin Roth
- Add some directories and files to the ignore list - Add the LGPL as a recognized header. It's used in some files that were pulled into coreboot from other sources. Change-Id: I53423205f1cbf142a294ee5d24e885741a44dfcd Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/26572 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-06-01util/lint: use a more compact output formatPatrick Georgi
It now looks like this: Check that files have license headers (lint-stable-000-license-headers): success Check for superfluous whitespace in the tree (lint-stable-003-whitespace): success Check that C labels begin at start-of-line (lint-stable-004-style-labels): success Change-Id: I9d1f6adebae5b68a51e89c2833f8713f0ffcb616 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/26703 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2018-05-31util/lint: Add check that changes conform to clang-format stylePatrick Georgi
It's a white list (configured through $(top)/.clang-format-scope) with the expectation that the list will grow over time. Once everything is covered, we can turn off the white-listing and keep everything enforced. To not drive people crazy, only check the files their commit touched. Change-Id: I52c7ea73fd36aaa46c0bfce928158e1cd6304540 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/26514 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com>
2018-05-30util/docker: Fix file ownership when building with coreboot-sdkMartin Roth
Instead of requiring the user to enter their root password to set the created files to their user, create a new user inside the docker container with the correct UID & GID and build with that. Change-Id: Ibbeff00211e8cf653f48204d285e06bca39b5fd2 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/26594 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-05-30checkpatch: exclude util/crossgcc/patchesPatrick Georgi
These files are supposed to contain trailing whitespace due to the patch format. Also use the exclusion list in the pre-commit hook. Change-Id: I8816c05ea703964a332915a0675096836957b242 Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/26695 Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-30util/gitconfig: improve robustness of checkpatch in pre-commitPatrick Georgi
Users can have non-default configurations as to how git diff et al are presenting file names in diffs (default: a/ and b/ prefixes). checkpatch expects that and trims the first element, so enforce that configuration for the diff that's sent into it. Change-Id: I099795119456a73c900b31ce191c2d9e898a5c7e Signed-off-by: Patrick Georgi <pgeorgi@chromium.org> Reviewed-on: https://review.coreboot.org/26694 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: Martin Roth <martinroth@google.com>
2018-05-24buildgcc: Do not try to install GCC if build failedNico Huber
We didn't bail out if configuring or building of GCC failed but run `make install` and later steps instead. This resulted in very confusing logs that concealed the actual error. Change-Id: Ia064e0bfd96f0cbad391da3bb19e4dc304d988ff Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/26496 Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-23util/intelmetool: Add Makefile target for OLDARC definitionMatthias Gazzari
This allows one to compile intelmetool with support for older ME versions by setting the OLDARC preprocessor definition. For example, compiling with OLDARC enabled avoids the "ME: GET FW VERSION message failed:" error on the Lenovo X201i (ME version 6.0). Change-Id: I5eb0da7663e795f790e2723bb334447380724b56 Signed-off-by: Matthias Gazzari <mail@qtux.eu> Reviewed-on: https://review.coreboot.org/26450 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2018-05-22util/testing: Convert tegra124 and tegra210 builds to junitMartin Roth
Because the tegra124 & tegra201 lp0 builds weren't junit tests, the builds weren't actually picked up by jenkins, so any failures were not previously reported. Change-Id: Ie443ca713912d01ccf6921ce49f846d7297163ef Signed-off-by: Martin Roth <gaumless@gmail.com> Reviewed-on: https://review.coreboot.org/26422 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-22util/intelmetool: Fix missing commaMatthias Gazzari
Change-Id: I4cb70c2aa466ac71dc8fcd25a7c1824696f32909 Signed-off-by: Matthias Gazzari <mail@qtux.eu> Reviewed-on: https://review.coreboot.org/26449 Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-05-22util/lint: Make the non-ascii character check stableMartin Roth
Change-Id: I967f67a19a96cac8b7e0e98356e87d7d0610d4b2 Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/26435 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Nico Huber <nico.h@gmx.de>
2018-05-22cbfs-compression-tool: Add raw compression supportJulius Werner
This patch adds a new "rawcompress" command to cbfs-compression-tool, that works exactly the same as "compress" except that it doesn't add the custom 8-byte header to the file. This can be useful if you need to compress something into a format that coreboot's decompression routines can work with, but it's not supposed to go into CBFS. Change-Id: I18a97a35bb0b0f71f3226f97114936dc81d379eb Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/26337 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
generated by cgit v1.2.3 (git 2.25.1) at 2024-12-03 13:59:39 +0000