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2018-11-30broadcom: Remove SoC and board supportPhilipp Deppenwiese
The reason for this code cleanup is the legacy Google Purin board which isn't available anymore and AFAIK never made it into the stores. * Remove broadcom cygnus SoC support * Remove /util/broadcom tool * Remove Google Purin mainboard * Remove MAINTAINERS entries Change-Id: I148dd7eb0192d396cb69bc26c4062f88a764771a Signed-off-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-on: https://review.coreboot.org/c/29905 Reviewed-by: Julius Werner <jwerner@chromium.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-29util/inteltool: Add Apollo Lake LPC ID and allow to read PCRsNico Huber
The P2SB (PCI to Side-Band) bridge is on a different PCI device on APL. Hence, we have to decide based on the LPC ID which device to query. Also fix a comment. Change-Id: Ie20d7d2d246629d085bcf4740ba28b1e81e6a12a Signed-off-by: Nico Huber <nico.huber@secunet.com> Reviewed-on: https://review.coreboot.org/c/29896 Reviewed-by: Arthur Heymans <arthur@aheymans.xyz> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-28mb/*/*/Kconfig: Remove useless commentElyes HAOUAS
Change-Id: Ibdff50761a205d936b0ebe067f418be0a2051798 Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/29871 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Hellsenberg <th3fanbus@gmail.com> Reviewed-by: Nico Huber <nico.h@gmx.de> Reviewed-by: David Guckian Reviewed-by: Werner Zeh <werner.zeh@siemens.com>
2018-11-28romcc: Increase buffer size to fit max string sizeMartin Roth
On the updated builder image, the build is failing because the system compiler has been updated to GCC 8.2.0. It complains about the possibility of overflow when putting one 30 character buffer plus 2 characters into another 30 character buffer. To fix this, increase the recipient buffer size by 2. romcc.c:3645:2: note: 'sprintf' output between 3 and 32 bytes into a destination of size 30 [-Werror=format-overflow=] sprintf(buf, "\"%s\"", scratch); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ romcc.c:3649:2: note: 'sprintf' output between 3 and 32 bytes into a destination of size 30 [-Werror=format-overflow=] sprintf(buf, "\"%s\"", scratch); ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ Change-Id: I7879a7202cc3ff52301b10118fc49fcc601f133e Signed-off-by: Martin Roth <martinroth@google.com> Reviewed-on: https://review.coreboot.org/c/29850 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-11-27cbmem: Fix remaining mapped memory accesses to use aligned_memcpy()Julius Werner
aligned_memcpy() was introduced to fix issues with platforms that don't allow unaligned accesses to areas mapped with /dev/mem, but we missed a few spots. Fix them. Change-Id: I97ea953455b41a50023ceaca7eb148d60e6b8097 Signed-off-by: Julius Werner <jwerner@chromium.org> Reviewed-on: https://review.coreboot.org/c/29848 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-11-26util/crossgcc: Document how to build the toolchain for another locationPatrick Georgi
One common issue with the toolchain is that it takes a very long time to build while it's somewhat volatile inside the coreboot tree. Installing the toolchain elsewhere helps keep it safe but since there is no reliable default location outside the tree, keep the default as is. Change-Id: Ic414cddfd3c7097412f3f2c3c7ec7b7191fa32de Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/29826 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-11-24util/scripts/maintainers.go: drop special case for "THE REST"Patrick Georgi
It's not useful anymore. Change-Id: Iba7f10dc87301911ff5f73c182b41c268fba310a Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/c/29658 Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-23mb: Set coreboot as DSDT's manufacturer model IDElyes HAOUAS
Field 'OEMID' & "OEM Table ID" are related to DSDT table not to mainboard. So use macro to set them respectvely to "COREv4" and "COREBOOT". Change-Id: I060e07a730e721df4a86128ee89bfe168c69f31e Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/29790 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: David Guckian
2018-11-23util/cbfstool: Fix GCC error due to a shadowed declarationWerner Zeh
There is already a function with the name buffer_size(). Adding a local variable with the same name will lead to the following error on older GCC versions (e.g. version 4.4.7): declaration of 'buffer_size' shadows a global declaration To fix this rename the local variable to buffer_len. Change-Id: Ifae3a17152f2f9852d29a4ac038f7e5a75a41614 Signed-off-by: Werner Zeh <werner.zeh@siemens.com> Reviewed-on: https://review.coreboot.org/c/29776 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Joel Kitching <kitching@google.com> Reviewed-by: Mario Scheithauer <mario.scheithauer@siemens.com>
2018-11-22util/cbfstool/rmodule.{c,h}: Fix typo and correct headerFrans Hendriks
Header contains ':' in copyright line. rmdoule is a typo Remove the ';' and correct typo to rmodule. BUG=N/A TEST=N/A Change-Id: I05b1fb80a81682646c9fba3d234de235b6bc9e8c Signed-off-by: Frans Hendriks <fhendriks@eltan.com> Reviewed-on: https://review.coreboot.org/c/29794 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: HAOUAS Elyes <ehaouas@noos.fr>
2018-11-22riscv: fix bug of sifive-gpt.pyXiang Wang
The GPT version must be "00 00 01 00" and the little endian should be represented as 0x10000. Please refer to: https://en.wikipedia.org/wiki/GUID_Partition_Table Change-Id: Ib025197fc96f32823e687a89de0cee51c952b031 Signed-off-by: Xiang Wang <wxjstz@126.com> Reviewed-on: https://review.coreboot.org/c/29767 Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-21util/ifdtool: Add IceLake platform support under IFDv2Aamir Bohra
Change-Id: Ib69a2cbc3d8ab9f35c940e95b0edb4b04b50b716 Signed-off-by: Aamir Bohra <aamir.bohra@intel.com> Reviewed-on: https://chromium-review.googlesource.com/1162995 Commit-Ready: ChromeOS CL Exonerator Bot <chromiumos-cl-exonerator@appspot.gserviceaccount.com> Tested-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Subrata Banik <subrata.banik@intel.com> Reviewed-by: Shelley Chen <shchen@chromium.org> Reviewed-on: https://review.coreboot.org/c/29696 Reviewed-by: Rizwan Qureshi <rizwan.qureshi@intel.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-21ACPI: Fix DSDT's revision fieldElyes HAOUAS
DSDT revision is =1 for ACPI v1 and =2 for greater ACPI version. This will cause the AML interpreter to use 32-bit integers and math if the version is 1, and 64-bit if the version is >=2. Current spec version is 2 for ACPI 6.2-a. Change-Id: I77372882d5c77b7ed52dcdd88028403df6f6fa7f Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr> Reviewed-on: https://review.coreboot.org/c/29626 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-19util/bucts: Add tool to manipulate BUC.TS bit on Intel targetsArthur Heymans
The purpose of this tool is to manipulate and get information about the `Back Up Control, Top Swap` mechanism present on most Intel Southbridges. This tool is initially written by Peter Stuge. This tool makes it possible to have a backup mechanism for the bootblock by using the southbridges Back Up Control Top Swap. Sometimes it is also possible to circumvent vendor write protection mechanisms in order to flash coreboot. An example of where this would be useful would be the Lenovo Thinkpad X60 and T60. Change-Id: I12cc2e91396f096fc979e23848e1929cb6c44fc5 Signed-off-by: Arthur Heymans <arthur@aheymans.xyz> Reviewed-on: https://review.coreboot.org/18224 Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-18util/board_status: run dmesg with sudoPatrick Georgi
Newer kernels only allow root to access the kernel log buffer. In another case (cbmem) we use sudo to get past that, so we can expect sudo to be available here, too. Change-Id: I654422992e5ba1e98a786f65d50289efbcd46602 Signed-off-by: Patrick Georgi <patrick@georgi.software> Reviewed-on: https://review.coreboot.org/29670 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com>
2018-11-18util: Fix shebang for python2 scriptsAngel Pons
Python 3 is the default Python interpreter on most modern systems. Python 2 scripts must specify they should be run with Python 2 in their shebang. Solves issue raised in CB:28953. Change-Id: I9ace4afd668539c05e7ace30e255af50c7a069c2 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/29666 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-11-17treewide: use /usr/bin/env where appropriateYegor Timoshenko
Some Unix systems (GuixSD, NixOS) do not install programs like Bash and Python to /usr/bin, and /usr/bin/env has to be used to locate these instead. Change-Id: I7546bcb881c532adc984577ecb0ee2ec4f2efe00 Signed-off-by: Yegor Timoshenko <yegortimoshenko@riseup.net> Reviewed-on: https://review.coreboot.org/28953 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-11-16util/cbsftool: allow enabling verbose make outputVadim Bendebury
Sometimes it is necessary to be able to see exact command lines used when compiling and linking. Use the same scheme as some other Makefile's - enable verbose output when variable V is set to 1. TEST=tried building cbfstool with V=1, observed verbose output. Change-Id: Iff25439aabff79e69d1d94a2c51c60bb0e0d7b80 Signed-off-by: Vadim Bendebury <vbendeb@chromium.org> Reviewed-on: https://review.coreboot.org/29431 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-11-16util/gitconfig/test: Add commit-msg hook testAlex Thiessen
Add a test that, after cloning the repository to a temporary directory, installs git hooks and attempts to do a good and a bad commit, expecting the former to succeed and the latter to fail, thus testing the `commit-msg` hook. Change-Id: Icdaf0109c60cb5b6952b1a2468ab050a742e4201 Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com> Reviewed-on: https://review.coreboot.org/23281 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-16util/docker: Rename _CONTAINER_VERSION => _IMAGE_TAGNico Huber
This is so confusing, let's name it what it is ;) Change-Id: I6f87e2f6912d886e241e03998fb4136fb28bc7b1 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/29458 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-11-16util/docker: Use common .ccache for local buildsNico Huber
Bind a volume for .ccache to the `docker-run-local` targets. By default the current user's $(HOME)/.ccache will be used, it can be overridden via the DOCKER_CCACHE variable. Also rearrange some docker parameters to keep the target readable. Change-Id: I7d0bdb3861ac56361cacfa74aaf8b45c4f135e5c Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/29457 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-11-16cbfstool: add unprocessed flag for file exportingJoel Kitching
Add an unprocessed flag (-U) which modifies how files are exported. In the case of a compressed raw file, extract without decompressing. In the case of a stage or payload, extract without decompressing or converting to an ELF. This can be useful for verifying the integrity of a stage or payload, since converting to an ELF may not be a deterministic process on different platforms or coreboot versions. BUG=b:111577108 TEST=USE=cb_legacy_tianocore emerge-eve edk2 coreboot-utils chromeos-bootimage cd /build/eve/firmware /build/eve/usr/bin/cbfstool image.bin extract -r RW_LEGACY \ -n payload -f /tmp/payload_1 -U START=$((16#`xxd -s 20 -l 4 -p tianocore.cbfs`)) SIZE=$((16#`xxd -s 8 -l 4 -p tianocore.cbfs`)) dd if=tianocore.cbfs skip=$START count=$SIZE bs=1 > /tmp/payload_2 diff /tmp/payload_1 /tmp/payload_2 rm /tmp/payload_1 /tmp/payload_2 Change-Id: I351d471d699daedd51adf4a860661877f25607e6 Signed-off-by: Joel Kitching <kitching@chromium.org> Reviewed-on: https://review.coreboot.org/29616 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com> Reviewed-by: Julius Werner <jwerner@chromium.org>
2018-11-16util/docker: Unify local build targetsNico Huber
Add a `docker-run-local` target that is used as a template for the local build targets (`docker-build-coreboot`, `docker-abuild`, and `docker-what-jenkins-does`). Note this changes the user for `docker-what-jenkins-does` which has (ccache) issues if it's not `root`. Will be fixed in a follow-up. Change-Id: I9088fb9211726cddc37b17ddf70170c2c382679e Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/29456 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-11-16util/cbfstool/cbfs_image.c: Get rid of void pointer mathRichard Spiegel
Pointer math with void pointers is illegal in many compilers, though it works with GCC because it assumes size of void to be 1. Change the pointers or add parenthesis to force a proper order that will not cause compile errors if compiled with a different compiler, and more importantly, don't have unsuspected side effects. BUG=b:118484178 TEST=Build CBFS with original code, run objdump and saved output. Added modifications, build cbfs again, run objdump again, compared objdump outputs. Change-Id: I30187de8ea24adba41083f3bfbd24c0e363ee4b8 Signed-off-by: Richard Spiegel <richard.spiegel@silverbackltd.com> Reviewed-on: https://review.coreboot.org/29440 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marshall Dawson <marshalldawson3rd@gmail.com>
2018-11-15util/gitconfig: Add timeout testAlex Thiessen
Add a `util/gitconfig/test` subdirectory which will contain tests to run as executable files, add a helper script. Add a timeout test that verifies that gitconfig completes in under two seconds (typical run time is ~30 ms). Add gitconfig tests to the `testing` Makefile under the `test-tools` target. Change-Id: Id46f905b9f782e67be97a65d10045c3345dc996b Signed-off-by: Alex Thiessen <alex.thiessen.de+coreboot@gmail.com> Reviewed-on: https://review.coreboot.org/23280 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-13util/scripts/maintainers.go: Add Gerrit reviewers config emitterPatrick Georgi
The gerrit reviewers plugin has a certain configuration format. Teach maintainers to emit it when called with -print-gerrit-rules. Change-Id: I92cfc905e0c1b03b7cf793a4324c392140a22060 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/29607 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-11-13util/scripts/maintainers.go: Introduce command line argument handlingPatrick Georgi
First new option is -debug. Change-Id: Ia6e9b3675449a0b1e6f5d7526ee999f925eaadb2 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/29606 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-11-13util/scripts/maintainers.go: Provide delimiters between maintainersPatrick Georgi
Help automated tools make sense of the output. Instead of "[name 1 <email> name 2 <email>]", it now prints "name 1 <email>, name 2 <email>". As long as there are no commas in the maintainer names, they can be split easily. Change-Id: I4a254f566404b081a08923bc7ceb49f02039aa2a Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/29604 Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Ronald G. Minnich <rminnich@gmail.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-13util/scripts/maintainers.go: Use a full glob parserPatrick Georgi
Instead of checking only for three cases, just use a glob parser (that translates the glob to regex). After that, maintainers src/arch/x86/memlayout.h emits: src/arch/x86/memlayout.h is in subsystem X86 ARCHITECTURE Maintainers: [] src/arch/x86/memlayout.h is in subsystem MEMLAYOUT Maintainers: [Julius Werner <jwerner@chromium.org>] The latter entry was invisible to the maintainers tool because its path description wasn't in one of the supported formats. Change-Id: I7e5cf4269415269552e35f2c73952ce3dff487e1 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/29603 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-11-13util/scrips/maintainers.go: Allow file to appear in multiple componentsPatrick Georgi
Without this change, the tool only reports the first hit. We want to see all of them. Change-Id: Ib59b13c50b61c48e3cb200bf57e28c9453590819 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/29602 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-11-12util/scripts/maintainers.go: Stub support for website tagPatrick Georgi
ME Cleaner's component has an entry specifying its website, which this parser didn't know how to handle. Avoid the resulting warning. While at it, de-C the switch statement and make it work go-style. This also fixes "R" statements being ignored. Change-Id: Ifc23e28daba9d85bf690557a80134accea8bed21 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/29601 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-11-12util/intelvbttool: Cleanup and fixesPatrick Rudolph
* Clear remalloced memory * Fix check for invalid VBT offset in header * Fix VBIOS checksum generation * Fix VBIOS size field * Align VBIOS size to multiple of 512 * Reassign pointers after use of remalloc * Don't leak on error path Current version is enough to allow the proprietary Windows Intel GMA driver to find the VBT in the legacy VBIOS area and it doesn't BSOD any more. The LVDS screen remains black, due to an unknown issue with the proprietary driver, while the VGA works. Tested with libgfxinit and native graphics init. Change-Id: If07b1bb51d8fb3499d13102f70fedb36c020fb72 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/29099 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Patrick Georgi <pgeorgi@google.com>
2018-11-07board-status.html: improve instructionsPatrick Georgi
The foreword mentioned that you need a gerrit account, but not how to have git push with the right credentials. To ease onboarding, point out where to get them. Change-Id: I0b022bc064e3bc89568617c1a3a3e0e5236ba520 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/29240 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Angel Pons <th3fanbus@gmail.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-11-05coreboot-sdk: Build Clang first in a separate stepNico Huber
If we build one of the `all*` targets, build Clang first. Compiling Clang (just for the host arch, I assume) takes more than half of the time of the default build. When run as a separate step, we can make use of Docker's cache if any step after Clang fails. Change-Id: If67b458cde656f1dc6774215f6a575a48d12b797 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/29455 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com>
2018-11-05coreboot-sdk: Prefer gnat package over gnat-6Nico Huber
The choice of `gnat-6` was originally an optimization because the meta- package `gnat` installs not only the current GNAT version but also other unwanted (and hard to explain) dependencies. Later it was necessary because GCC 8 couldn't compile our older crossgcc. Now that we switched crossgcc to GCC 8.1, `gnat` should be fine. Change-Id: Ica8a1f9d6d71a74ffc4ec76aa0cfbe4b604cde1b Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/29454 Reviewed-by: Martin Roth <martinroth@google.com> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-11-05coreboot-sdk: Don't install libisl-devNico Huber
The current version in debian:sid is incompatible with our crossgcc version. But it turned out that we don't use the optimization features enabled by libisl at all: crossgcc builds with and without (a proper version of) libisl-dev installed generate the same coreboot binaries. Change-Id: I9f9115d8ab33cbe11aa77f16c98465e1c1dedeac Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/29453 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Martin Roth <martinroth@google.com>
2018-11-05coreboot-sdk: Don't install libelf-devNico Huber
As by afda56e1ad (buildgcc: Drop libelf/elfutils), it's not used (atm). Change-Id: I3124cb6db5975c21e635636babe700adb0f8cd8b Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/29452 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-by: Martin Roth <martinroth@google.com>
2018-10-24util/bincfg: code cleanup: convert sym_table to a local variableDenis 'GNUtoo' Carikli
Global variables are considered a bad practice. Change-Id: I652a8da75498f871a53eb7509f6145c4842e3373 Signed-off-by: Denis 'GNUtoo' Carikli <GNUtoo@no-log.org> Reviewed-on: https://review.coreboot.org/27810 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Stefan Reinauer <stefan.reinauer@coreboot.org>
2018-10-18util/inteltool: Fix LynxPoint (non-LP) GPIO register mapFehér Roland Ádám
The GPIO register dumper code for the LynxPoint family PCH chips (Intel 8 Series and C220 Series) was incorrectly using a shortened version of the LynxPoint-LP GPIO register map. Switched to the correct register map for the affected chipsets. Change-Id: I394a198bbb6628915cb73cabc5c8ff808579a07f Signed-off-by: Fehér Roland Ádám <feherneoh@gmail.com> Reviewed-on: https://review.coreboot.org/29167 Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-10-14cbfstool: make comments more consistentJoel Kitching
Fix a typo and make comments more consistent (start with capital letter). BUG=None TEST=None Change-Id: I97bff5e05596fc6973f0729e276a2e45b291120d Signed-off-by: Joel Kitching <kitching@google.com> Reviewed-on: https://review.coreboot.org/29025 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Marc Jones <marc@marcjonesconsulting.com>
2018-10-12util/abuild: When using blobs, enable 3rdparty/fsp by defaultPatrick Georgi
This is a no-op on non-FSP systems, but enables using it when supported. Change-Id: I66fe9b8587753ea017e13a752a7728e47287e9a0 Signed-off-by: Patrick Georgi <pgeorgi@google.com> Reviewed-on: https://review.coreboot.org/28776 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-10-10util/superiotool/smsc.c: Add SCH5504 register dumpAngel Pons
There is no datasheet available for this SuperIO, but dumping all possible registers on a Dell Optiplex GX520 resulted in data that was similar to other supported chips. Data also matches what is set in the BIOS, e.g. the parallel and serial ports' addresses. Change-Id: I768e4b5ec1e73c53e1a2355e0a0657b7a5ccbb89 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28958 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-10-09util/cbmem/Makefile: Remove .dependencies on `clean`Nico Huber
Change-Id: Ic122b3eaed54e29bbb3e11de84822169c81c04eb Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/28928 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Martin Roth <martinroth@google.com>
2018-10-08util/superiotool/smsc.c: Add some register dumpsAngel Pons
The SCH3112, SCH3116 and SCH5127 were lacking a pin dump. Since their datasheets are available, add their pin dumps. The SCH3112, SCH3114 and SCH3116 are almost identical, they only differ in the number of serial ports. Some values in the SCH3114 dump were inaccurate, that has been fixed as well. Datasheets used: - SCH311X: DS00001872A - SCH5127: DS00002081A Change-Id: Ic985526be9b09e0452eaf883904dfaf709b7e907 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28794 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
2018-10-08Move compiler.h to commonlibNico Huber
Its spreading copies got out of sync. And as it is not a standard header but used in commonlib code, it belongs into commonlib. While we are at it, always include it via GCC's `-include` switch. Some Windows and BSD quirk handling went into the util copies. We always guard from redefinitions now to prevent further issues. Change-Id: I850414e6db1d799dce71ff2dc044e6a000ad2552 Signed-off-by: Nico Huber <nico.h@gmx.de> Reviewed-on: https://review.coreboot.org/28927 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-10-08util/intelvbttool: Rewrite toolPatrick Rudolph
* Add Makefile dependency to source file * Add argument support * Add help support * Print usage on wrong arguments * Add support for parsing VBT binary file * Add support for parsing PCI Option ROM * Add support for writing VBT binary file * Add support for patching PCI Option ROM * Keep support for accessing legacy VGA area Option ROM * Keep support for dumping VBT contents to stdout Allows to extract VBT, analyse VBT and patch PCI Option ROMs as needed. The required arguments have been changed: ./intelvbttool --<SOURCECMD> [filename] --<DESTCMD> [filename] SOURCECMD set the VBT source. Supported: inlegacy : Legacy BIOS area at phys. memory 0xc0000 invbt : Read raw Intel VBT file inoprom : Read VBT from Intel Option ROM file DESTCMD set the VBT destination. Supported: outdump : Print VBT in human readable form outvbt : Write raw Intel VBT file patchoprom: Patch existing Intel Option ROM Any combination of SOURCECMD and DESTCMD is possible. Change-Id: I8cbde042c7f5632f36648419becd23e248ba6f76 Signed-off-by: Patrick Rudolph <siro@das-labor.org> Reviewed-on: https://review.coreboot.org/18902 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Philipp Deppenwiese <zaolin.daisuki@gmail.com>
2018-10-04util/autoport: Use romstage.c instead of early_southbridge.cAngel Pons
Until now, autoport used to create a dummy "romstage.c", then write romstage code to "early_southbridge.c". While it works, it makes more sense to write to "romstage.c" instead, as virtually all mainboards do. Change-Id: If9f9375f9a659e7e685de5f884163813261fa656 Signed-off-by: Angel Pons <th3fanbus@gmail.com> Reviewed-on: https://review.coreboot.org/28851 Reviewed-by: Patrick Rudolph <siro@das-labor.org> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net> Reviewed-by: Nico Huber <nico.h@gmx.de> Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
2018-10-04cbfstool: Clear entry being removed in all casesDaisuke Nojiri
Currently, an entry being removed is cleared only if the next entry is also null or deleted. This patch ensures the entry being removed is cleared regardless of the next entry type. BUG=chromium:889716 BRANCH=none TEST=Run cbfstool bios.bin remove -n ecrw. Verify bios.bin has 0xFF in the space of the removed entry. TEST=Run cbfstool bios.bin remove -n fallback/payload (located at the end). Verify fallback/payload is removed. TEST=Run sign_official_build.sh on recovery_image.bin. Extract firmware contents from chromeos-firmwareupdate in the resigned image. Run 'futility vbutil_firmware --verify' for vblock_A's and FW_MAIN_A extracted from bios.bin. See the bug for details. Change-Id: I62540483da6cc35d0a604ec49b2f2b7b11ba9ce5 Signed-off-by: Daisuke Nojiri <dnojiri@chromium.org> Reviewed-on: https://review.coreboot.org/28886 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Aaron Durbin <adurbin@chromium.org>
2018-10-04util/abuild/abuild.1: Fix references to CBROOT parameterJonathan Neuschäfer
One occurence of this parameter was changed from LBROOT to CBROOT in f8ee1806ac ("Rename almost all occurences of LinuxBIOS to coreboot."). Change the others, too. Change-Id: Ic0da24c32cd6d2f0577de037b5463c800f455786 Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net> Reviewed-on: https://review.coreboot.org/28828 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Martin Roth <martinroth@google.com> Reviewed-by: Paul Menzel <paulepanter@users.sourceforge.net>
2018-09-30Documentation: add description for util/pmh7toolEvgeny Zinoviev
Change-Id: Iab5daf101a9ff27aa49b7849bf6bf39362b8db09 Signed-off-by: Evgeny Zinoviev <me@ch1p.com> Reviewed-on: https://review.coreboot.org/28368 Tested-by: build bot (Jenkins) <no-reply@coreboot.org> Reviewed-by: Tom Hiller <thrilleratplay@gmail.com> Reviewed-by: Felix Held <felix-coreboot@felixheld.de>
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