From 0185d6d7604f0de5ea16c20860b25b8202a29d0a Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Fri, 29 Jan 2021 17:04:24 +0100 Subject: soc/intel/denverton_ns: Drop `pcidev_path_on_root_debug` usage MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Currently, this function is only invoked for the SPI device through common SoC code. Since both Intel Harcuvar and Scaleway Tagada have enabled the SPI device in the devicetree, there's no need to use the debug version of `pcidev_path_on_root`. Change-Id: I4340d5860d23c2fa230105f7a7d345c367b2b2aa Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/50128 Reviewed-by: Patrick Georgi Reviewed-by: Kyösti Mälkki Reviewed-by: Suresh Bellampalli Tested-by: build bot (Jenkins) --- src/soc/intel/denverton_ns/include/soc/pci_devs.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/soc/intel/denverton_ns/include/soc/pci_devs.h b/src/soc/intel/denverton_ns/include/soc/pci_devs.h index 5eac5bddbe..0cb4c98ced 100644 --- a/src/soc/intel/denverton_ns/include/soc/pci_devs.h +++ b/src/soc/intel/denverton_ns/include/soc/pci_devs.h @@ -10,7 +10,7 @@ #if !defined(__SIMPLE_DEVICE__) #include #include -#define _PCH_DEV(slot, func) pcidev_path_on_root_debug(_PCH_DEVFN(slot, func), __func__) +#define _PCH_DEV(slot, func) pcidev_path_on_root(_PCH_DEVFN(slot, func)) #else #define _PCH_DEV(slot, func) PCI_DEV(0, PCH_DEV_SLOT_##slot, func) #endif -- cgit v1.2.3