From 04d2601426b0633bc817e57f44e087098bab2f84 Mon Sep 17 00:00:00 2001 From: Nicola Corna Date: Thu, 21 Jun 2018 14:57:26 +0200 Subject: sb/intel/common/firmware: Enable me_cleaner for Nehalem Recent patches in coreboot have fixed the freeze issues related to the use of me_cleaner on Nehalem. However, at least on the Lenovo X201, with me_cleaner some PCIe devices (like the SATA and USB controllers) disappear. In particular, setting the AltMeDisable bit ("-S" or "-s" flag) makes them disappear completely, while unsetting it makes them disappear only during cold boots. This kind of behaviour was already observed by Youness Alaoui on the Purism Librem laptops ([1]), and it seems related to some required board-specific PCIe configuration in the ME's MFS partition. For this reason, on the Lenovo X201, "-w EFFS" has been added to the me_cleaner arguments, which whitelists the MFS-equivalent partition for ME generation 2. This fixes all the issues, and the PCIe devices work as expected. [1] https://puri.sm/posts/deep-dive-into-intel-me-disablement/ Change-Id: Ie77a80d2cb4945cf1c984bdb0fb1cc2f18e82ebc Signed-off-by: Nicola Corna Reviewed-on: https://review.coreboot.org/27178 Tested-by: build bot (Jenkins) Reviewed-by: Arthur Heymans --- src/mainboard/lenovo/x201/Kconfig | 6 ++++++ src/southbridge/intel/common/firmware/Kconfig | 3 ++- util/me_cleaner/man/me_cleaner.1 | 8 +++----- 3 files changed, 11 insertions(+), 6 deletions(-) diff --git a/src/mainboard/lenovo/x201/Kconfig b/src/mainboard/lenovo/x201/Kconfig index 235120915d..a689bbcd4d 100644 --- a/src/mainboard/lenovo/x201/Kconfig +++ b/src/mainboard/lenovo/x201/Kconfig @@ -48,4 +48,10 @@ config CPU_ADDR_BITS int default 36 +# Without the Intel ME's EFFS partition some PCIe devices (like the USB and SATA +# controllers) don't work as expected +config ME_CLEANER_ARGS + string + default "-S -w EFFS" + endif diff --git a/src/southbridge/intel/common/firmware/Kconfig b/src/southbridge/intel/common/firmware/Kconfig index 4b882bd553..30c9aaf262 100644 --- a/src/southbridge/intel/common/firmware/Kconfig +++ b/src/southbridge/intel/common/firmware/Kconfig @@ -73,7 +73,8 @@ config CHECK_ME config USE_ME_CLEANER bool "Strip down the Intel ME/TXE firmware" - depends on HAVE_ME_BIN && (NORTHBRIDGE_INTEL_SANDYBRIDGE || \ + depends on HAVE_ME_BIN && (NORTHBRIDGE_INTEL_NEHALEM || \ + NORTHBRIDGE_INTEL_SANDYBRIDGE || \ NORTHBRIDGE_INTEL_IVYBRIDGE || NORTHBRIDGE_INTEL_HASWELL || \ SOC_INTEL_BROADWELL || SOC_INTEL_SKYLAKE || \ SOC_INTEL_KABYLAKE || SOC_INTEL_BAYTRAIL || SOC_INTEL_BRASWELL) diff --git a/util/me_cleaner/man/me_cleaner.1 b/util/me_cleaner/man/me_cleaner.1 index 2a219bcb8e..8edd226278 100644 --- a/util/me_cleaner/man/me_cleaner.1 +++ b/util/me_cleaner/man/me_cleaner.1 @@ -1,4 +1,4 @@ -.TH me_cleaner 1 "MARCH 2018" +.TH me_cleaner 1 "JUNE 2018" .SH me_cleaner .PP me_cleaner \- Tool for partial deblobbing of Intel ME/TXE firmware images @@ -109,8 +109,8 @@ c c c c c c c c . PCH CPU ME SKU -Ibex Peak * Nehalem/Westmere 6.0 Ignition -Ibex Peak * Nehalem/Westmere 6.x 1.5/5 MB +Ibex Peak Nehalem/Westmere 6.0 Ignition +Ibex Peak Nehalem/Westmere 6.x 1.5/5 MB Cougar Point Sandy Bridge 7.x 1.5/5 MB Panther Point Ivy Bridge 8.x 1.5/5 MB Lynx/Wildcat Point Haswell/Broadwell 9.x 1.5/5 MB @@ -127,8 +127,6 @@ SoC TXE SKU Braswell/Cherry Trail 2.x 1.375 MB .TE .PP -* Not working on coreboot -.PP All the reports are available on the project's GitHub page \[la]https://github.com/corna/me_cleaner/issues/3\[ra]\&. .SH EXAMPLES .PP -- cgit v1.2.3