From 0df0c7e359b6e678cb6de8f946d4395259864391 Mon Sep 17 00:00:00 2001 From: Evgeny Zinoviev Date: Tue, 16 Jun 2020 03:53:37 +0300 Subject: nb/intel/sandybridge/gma.c: Remove useless if condition There's a useless check with both branches doing the same: enabling RC6 and disabling RC6p. In past, this condition would enable RC6p in IVB but not on SNB. Then, at some point, RC6p was considered unstable and was disabled, but the condition remained. It's not needed so let's remove it. Change-Id: I926bb682d1b9d21185048224490b966c33204b6a Signed-off-by: Evgeny Zinoviev Reviewed-on: https://review.coreboot.org/c/coreboot/+/42410 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph Reviewed-by: Angel Pons --- src/northbridge/intel/sandybridge/gma.c | 21 +++++++++------------ 1 file changed, 9 insertions(+), 12 deletions(-) diff --git a/src/northbridge/intel/sandybridge/gma.c b/src/northbridge/intel/sandybridge/gma.c index 83a0279b09..fee7513492 100644 --- a/src/northbridge/intel/sandybridge/gma.c +++ b/src/northbridge/intel/sandybridge/gma.c @@ -453,18 +453,15 @@ static void gma_pm_init_pre_vbios(struct device *dev) gtt_write(0xa06c, 0x000493e0); /* RP Down EI */ gtt_write(0xa070, 0x0000000a); /* RP Idle Hysteresis */ - /* 11a: Enable Render Standby (RC6) */ - if ((bridge_silicon_revision() & BASE_REV_MASK) == BASE_REV_IVB) { - /* - * IvyBridge should also support DeepRenderStandby. - * - * Unfortunately it does not work reliably on all SKUs so - * disable it here and it can be enabled by the kernel. - */ - gtt_write(0xa090, 0x88040000); /* HW RC Control */ - } else { - gtt_write(0xa090, 0x88040000); /* HW RC Control */ - } + /* + * 11a: Enable Render Standby (RC6) + * + * IvyBridge should also support DeepRenderStandby. + * + * Unfortunately it does not work reliably on all SKUs so + * disable it here and it can be enabled by the kernel. + */ + gtt_write(0xa090, 0x88040000); /* HW RC Control */ /* 12: Normal Frequency Request */ /* RPNFREQ_VAL comes from MCHBAR 0x5998 23:16 */ -- cgit v1.2.3