From 1bf55b4070bef2be8259f3153cade27121127b4a Mon Sep 17 00:00:00 2001 From: Martin Roth Date: Sat, 24 Jun 2017 14:16:38 -0600 Subject: src/lib: add IS_ENABLED() around Kconfig symbol references MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Some of these can be changed from #if to if(), but that will happen in a follow-on commmit. Change-Id: Idcea3f8b1a4246cb6b29999a84a191a3133e5c78 Signed-off-by: Martin Roth Reviewed-on: https://review.coreboot.org/20341 Tested-by: build bot (Jenkins) Reviewed-by: Philippe Mathieu-Daudé Reviewed-by: Patrick Georgi --- src/lib/cbfs.c | 2 +- src/lib/coreboot_table.c | 28 ++++++++++++++-------------- src/lib/gcov-glue.c | 14 +++++++------- src/lib/generic_sdram.c | 8 ++++---- src/lib/hardwaremain.c | 14 +++++++------- src/lib/malloc.c | 2 +- src/lib/ramtest.c | 4 ++-- src/lib/reg_script.c | 6 +++--- 8 files changed, 39 insertions(+), 39 deletions(-) diff --git a/src/lib/cbfs.c b/src/lib/cbfs.c index 11bce2c530..596abc5ad2 100644 --- a/src/lib/cbfs.c +++ b/src/lib/cbfs.c @@ -316,7 +316,7 @@ const struct cbfs_locator __attribute__((weak)) cbfs_master_header_locator = { extern const struct cbfs_locator vboot_locator; static const struct cbfs_locator *locators[] = { -#if CONFIG_VBOOT +#if IS_ENABLED(CONFIG_VBOOT) &vboot_locator, #endif &cbfs_master_header_locator, diff --git a/src/lib/coreboot_table.c b/src/lib/coreboot_table.c index 52c18d051e..131dde8b5b 100644 --- a/src/lib/coreboot_table.c +++ b/src/lib/coreboot_table.c @@ -33,17 +33,17 @@ #include #include #include -#if CONFIG_USE_OPTION_TABLE +#if IS_ENABLED(CONFIG_USE_OPTION_TABLE) #include #endif -#if CONFIG_CHROMEOS -#if CONFIG_HAVE_ACPI_TABLES +#if IS_ENABLED(CONFIG_CHROMEOS) +#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) #include #endif #include #include #endif -#if CONFIG_ARCH_X86 +#if IS_ENABLED(CONFIG_ARCH_X86) #include #endif #include @@ -159,7 +159,7 @@ void lb_add_gpios(struct lb_gpios *gpios, const struct lb_gpio *gpio_table, gpios->size += table_size; } -#if CONFIG_CHROMEOS +#if IS_ENABLED(CONFIG_CHROMEOS) static void lb_gpios(struct lb_header *header) { struct lb_gpios *gpios; @@ -200,7 +200,7 @@ static void lb_gpios(struct lb_header *header) static void lb_vdat(struct lb_header *header) { -#if CONFIG_HAVE_ACPI_TABLES +#if IS_ENABLED(CONFIG_HAVE_ACPI_TABLES) struct lb_range *vdat; vdat = (struct lb_range *)lb_new_record(header); @@ -212,7 +212,7 @@ static void lb_vdat(struct lb_header *header) static void lb_vbnv(struct lb_header *header) { -#if CONFIG_PC80_SYSTEM +#if IS_ENABLED(CONFIG_PC80_SYSTEM) struct lb_range *vbnv; vbnv = (struct lb_range *)lb_new_record(header); @@ -223,7 +223,7 @@ static void lb_vbnv(struct lb_header *header) #endif } -#if CONFIG_VBOOT +#if IS_ENABLED(CONFIG_VBOOT) static void lb_vboot_handoff(struct lb_header *header) { void *addr; @@ -246,7 +246,7 @@ static inline void lb_vboot_handoff(struct lb_header *header) {} static void lb_board_id(struct lb_header *header) { -#if CONFIG_BOARD_ID_AUTO || CONFIG_BOARD_ID_MANUAL +#if IS_ENABLED(CONFIG_BOARD_ID_AUTO) || IS_ENABLED(CONFIG_BOARD_ID_MANUAL) struct lb_board_id *bid; bid = (struct lb_board_id *)lb_new_record(header); @@ -359,7 +359,7 @@ static struct lb_mainboard *lb_mainboard(struct lb_header *header) return mainboard; } -#if CONFIG_USE_OPTION_TABLE +#if IS_ENABLED(CONFIG_USE_OPTION_TABLE) static struct cmos_checksum *lb_cmos_checksum(struct lb_header *header) { struct lb_record *rec; @@ -475,7 +475,7 @@ static uintptr_t write_coreboot_table(uintptr_t rom_table_end) head = lb_table_init(rom_table_end); -#if CONFIG_USE_OPTION_TABLE +#if IS_ENABLED(CONFIG_USE_OPTION_TABLE) { struct cmos_option_table *option_table = cbfs_boot_map_with_leak("cmos_layout.bin", @@ -506,10 +506,10 @@ static uintptr_t write_coreboot_table(uintptr_t rom_table_end) lb_mainboard(head); /* Record the serial ports and consoles */ -#if CONFIG_CONSOLE_SERIAL +#if IS_ENABLED(CONFIG_CONSOLE_SERIAL) uart_fill_lb(head); #endif -#if CONFIG_CONSOLE_USB +#if IS_ENABLED(CONFIG_CONSOLE_USB) lb_add_console(LB_TAG_CONSOLE_EHCI, head); #endif @@ -519,7 +519,7 @@ static uintptr_t write_coreboot_table(uintptr_t rom_table_end) /* Record our framebuffer */ lb_framebuffer(head); -#if CONFIG_CHROMEOS +#if IS_ENABLED(CONFIG_CHROMEOS) /* Record our GPIO settings (ChromeOS specific) */ lb_gpios(head); diff --git a/src/lib/gcov-glue.c b/src/lib/gcov-glue.c index a002ea790f..7edc90a221 100644 --- a/src/lib/gcov-glue.c +++ b/src/lib/gcov-glue.c @@ -41,7 +41,7 @@ static FILE *previous_file = NULL; static FILE *fopen(const char *path, const char *mode) { -#if CONFIG_DEBUG_COVERAGE +#if IS_ENABLED(CONFIG_DEBUG_COVERAGE) printk(BIOS_DEBUG, "fopen %s with mode %s\n", path, mode); #endif @@ -74,7 +74,7 @@ static FILE *fopen(const char *path, const char *mode) static int fclose(FILE *stream) { -#if CONFIG_DEBUG_COVERAGE +#if IS_ENABLED(CONFIG_DEBUG_COVERAGE) printk(BIOS_DEBUG, "fclose %s\n", stream->filename); #endif return 0; @@ -85,7 +85,7 @@ static int fseek(FILE *stream, long offset, int whence) /* fseek should only be called with offset==0 and whence==SEEK_SET * to a freshly opened file. */ gcc_assert(offset == 0 && whence == SEEK_SET); -#if CONFIG_DEBUG_COVERAGE +#if IS_ENABLED(CONFIG_DEBUG_COVERAGE) printk(BIOS_DEBUG, "fseek %s offset=%ld whence=%d\n", stream->filename, offset, whence); #endif @@ -96,7 +96,7 @@ static long ftell(FILE *stream) { /* ftell should currently not be called */ gcc_assert(0); -#if CONFIG_DEBUG_COVERAGE +#if IS_ENABLED(CONFIG_DEBUG_COVERAGE) printk(BIOS_DEBUG, "ftell %s\n", stream->filename); #endif return 0; @@ -104,7 +104,7 @@ static long ftell(FILE *stream) static size_t fread(void *ptr, size_t size, size_t nmemb, FILE *stream) { -#if CONFIG_DEBUG_COVERAGE +#if IS_ENABLED(CONFIG_DEBUG_COVERAGE) printk(BIOS_DEBUG, "fread: ptr=%p size=%zd nmemb=%zd FILE*=%p\n", ptr, size, nmemb, stream); #endif @@ -113,7 +113,7 @@ static size_t fread(void *ptr, size_t size, size_t nmemb, FILE *stream) static size_t fwrite(const void *ptr, size_t size, size_t nmemb, FILE *stream) { -#if CONFIG_DEBUG_COVERAGE +#if IS_ENABLED(CONFIG_DEBUG_COVERAGE) printk(BIOS_DEBUG, "fwrite: %zd * %zd bytes to file %s\n", nmemb, size, stream->filename); #endif @@ -145,7 +145,7 @@ static void coverage_init(void *unused) void __gcov_flush(void); static void coverage_exit(void *unused) { -#if CONFIG_DEBUG_COVERAGE +#if IS_ENABLED(CONFIG_DEBUG_COVERAGE) printk(BIOS_DEBUG, "Syncing coverage data.\n"); #endif __gcov_flush(); diff --git a/src/lib/generic_sdram.c b/src/lib/generic_sdram.c index 801ae61c32..6aa8d29962 100644 --- a/src/lib/generic_sdram.c +++ b/src/lib/generic_sdram.c @@ -1,7 +1,7 @@ #include /* Prototypes */ /* Setup SDRAM */ -#if CONFIG_RAMINIT_SYSINFO +#if IS_ENABLED(CONFIG_RAMINIT_SYSINFO) void sdram_initialize(int controllers, const struct mem_controller *ctrl, void *sysinfo) #else @@ -13,7 +13,7 @@ void sdram_initialize(int controllers, const struct mem_controller *ctrl) for (i = 0; i < controllers; i++) { printk(BIOS_DEBUG, "Ram1.%02x\n", i); - #if CONFIG_RAMINIT_SYSINFO + #if IS_ENABLED(CONFIG_RAMINIT_SYSINFO) sdram_set_registers(ctrl + i, sysinfo); #else sdram_set_registers(ctrl + i); @@ -24,7 +24,7 @@ void sdram_initialize(int controllers, const struct mem_controller *ctrl) for (i = 0; i < controllers; i++) { printk(BIOS_DEBUG, "Ram2.%02x\n", i); - #if CONFIG_RAMINIT_SYSINFO + #if IS_ENABLED(CONFIG_RAMINIT_SYSINFO) sdram_set_spd_registers(ctrl + i, sysinfo); #else sdram_set_spd_registers(ctrl + i); @@ -38,7 +38,7 @@ void sdram_initialize(int controllers, const struct mem_controller *ctrl) */ printk(BIOS_DEBUG, "Ram3\n"); - #if CONFIG_RAMINIT_SYSINFO + #if IS_ENABLED(CONFIG_RAMINIT_SYSINFO) sdram_enable(controllers, ctrl, sysinfo); #else sdram_enable(controllers, ctrl); diff --git a/src/lib/hardwaremain.c b/src/lib/hardwaremain.c index a56d68e3f5..0deab4bd0b 100644 --- a/src/lib/hardwaremain.c +++ b/src/lib/hardwaremain.c @@ -33,7 +33,7 @@ #include #include #include -#if CONFIG_HAVE_ACPI_RESUME +#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) #include #endif #include @@ -82,7 +82,7 @@ struct boot_state { boot_state_t (*run_state)(void *arg); void *arg; int complete : 1; -#if CONFIG_HAVE_MONOTONIC_TIMER +#if IS_ENABLED(CONFIG_HAVE_MONOTONIC_TIMER) struct boot_state_times times; #endif }; @@ -180,7 +180,7 @@ static boot_state_t bs_post_device(void *arg) static boot_state_t bs_os_resume_check(void *arg) { -#if CONFIG_HAVE_ACPI_RESUME +#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) void *wake_vector; wake_vector = acpi_find_wakeup_vector(); @@ -199,7 +199,7 @@ static boot_state_t bs_os_resume_check(void *arg) static boot_state_t bs_os_resume(void *wake_vector) { -#if CONFIG_HAVE_ACPI_RESUME +#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) arch_bootstate_coreboot_exit(); acpi_resume(wake_vector); #endif @@ -239,7 +239,7 @@ static boot_state_t bs_payload_boot(void *arg) return BS_PAYLOAD_BOOT; } -#if CONFIG_HAVE_MONOTONIC_TIMER +#if IS_ENABLED(CONFIG_HAVE_MONOTONIC_TIMER) static void bs_sample_time(struct boot_state *state) { struct mono_time *mt; @@ -268,7 +268,7 @@ static inline void bs_sample_time(struct boot_state *state) {} static inline void bs_report_time(struct boot_state *state) {} #endif -#if CONFIG_TIMER_QUEUE +#if IS_ENABLED(CONFIG_TIMER_QUEUE) static void bs_run_timers(int drain) { /* Drain all timer callbacks until none are left, if directed. @@ -473,7 +473,7 @@ void main(void) post_code(POST_ENTRY_RAMSTAGE); /* Handoff sleep type from romstage. */ -#if CONFIG_HAVE_ACPI_RESUME +#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) acpi_is_wakeup(); #endif diff --git a/src/lib/malloc.c b/src/lib/malloc.c index 9974b2cdfb..b881ed2747 100644 --- a/src/lib/malloc.c +++ b/src/lib/malloc.c @@ -2,7 +2,7 @@ #include #include -#if CONFIG_DEBUG_MALLOC +#if IS_ENABLED(CONFIG_DEBUG_MALLOC) #define MALLOCDBG(x...) printk(BIOS_SPEW, x) #else #define MALLOCDBG(x...) diff --git a/src/lib/ramtest.c b/src/lib/ramtest.c index 419d0eb75f..2b2c34437b 100644 --- a/src/lib/ramtest.c +++ b/src/lib/ramtest.c @@ -6,7 +6,7 @@ static void write_phys(unsigned long addr, u32 value) { // Assembler in lib/ is very ugly. But we properly guarded // it so let's obey this one for now -#if CONFIG_SSE2 +#if IS_ENABLED(CONFIG_SSE2) asm volatile( "movnti %1, (%0)" : /* outputs */ @@ -31,7 +31,7 @@ static u32 read_phys(unsigned long addr) static void phys_memory_barrier(void) { -#if CONFIG_SSE2 +#if IS_ENABLED(CONFIG_SSE2) // Needed for movnti asm volatile ( "sfence" diff --git a/src/lib/reg_script.c b/src/lib/reg_script.c index 8d813b6f8d..56285f1ce1 100644 --- a/src/lib/reg_script.c +++ b/src/lib/reg_script.c @@ -22,7 +22,7 @@ #include #include -#if CONFIG_ARCH_X86 +#if IS_ENABLED(CONFIG_ARCH_X86) #include #endif @@ -369,7 +369,7 @@ static void reg_script_write_iosf(struct reg_script_context *ctx) static uint64_t reg_script_read_msr(struct reg_script_context *ctx) { -#if CONFIG_ARCH_X86 +#if IS_ENABLED(CONFIG_ARCH_X86) const struct reg_script *step = reg_script_get_step(ctx); msr_t msr = rdmsr(step->reg); uint64_t value = msr.hi; @@ -382,7 +382,7 @@ static uint64_t reg_script_read_msr(struct reg_script_context *ctx) static void reg_script_write_msr(struct reg_script_context *ctx) { -#if CONFIG_ARCH_X86 +#if IS_ENABLED(CONFIG_ARCH_X86) const struct reg_script *step = reg_script_get_step(ctx); msr_t msr; msr.hi = step->value >> 32; -- cgit v1.2.3