From 216712ae01993e83265470de1e29744a0970e4fa Mon Sep 17 00:00:00 2001 From: Lee Leahy Date: Fri, 17 Mar 2017 11:23:32 -0700 Subject: drivers/intel/fsp1_1: Fix issues detected by checkpatch MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Fix the following error and warnings detected by checkpatch.pl: ERROR: "foo * bar" should be "foo *bar" WARNING: line over 80 characters WARNING: else is not generally useful after a break or return WARNING: braces {} are not necessary for single statement blocks WARNING: suspect code indent for conditional statements (16, 32) WARNING: Comparisons should place the constant on the right side of the test TEST=Build and run on Galileo Gen2 Change-Id: I9f56c0b0e3baf84989411e4a4b98f935725c013f Signed-off-by: Lee Leahy Reviewed-on: https://review.coreboot.org/18886 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin Reviewed-by: Philippe Mathieu-Daudé --- src/drivers/intel/fsp1_1/fsp_gop.c | 5 ++--- src/drivers/intel/fsp1_1/fsp_util.c | 15 ++++++--------- src/drivers/intel/fsp1_1/hob.c | 2 +- src/drivers/intel/fsp1_1/include/fsp/util.h | 14 +++++++------- src/drivers/intel/fsp1_1/raminit.c | 6 +++--- src/drivers/intel/fsp1_1/romstage.c | 8 ++++---- src/drivers/intel/fsp1_1/stack.c | 6 ++++-- 7 files changed, 27 insertions(+), 29 deletions(-) diff --git a/src/drivers/intel/fsp1_1/fsp_gop.c b/src/drivers/intel/fsp1_1/fsp_gop.c index 6d905b29da..28ed06d763 100644 --- a/src/drivers/intel/fsp1_1/fsp_gop.c +++ b/src/drivers/intel/fsp1_1/fsp_gop.c @@ -71,10 +71,9 @@ void lb_framebuffer(struct lb_header *header) if (vbt_hob == NULL) { printk(BIOS_ERR, "FSP_ERR: Graphics Data HOB is not present\n"); return; - } else { - printk(BIOS_DEBUG, "FSP_DEBUG: Graphics Data HOB present\n"); - vbt_gop = GET_GUID_HOB_DATA(vbt_hob); } + printk(BIOS_DEBUG, "FSP_DEBUG: Graphics Data HOB present\n"); + vbt_gop = GET_GUID_HOB_DATA(vbt_hob); framebuffer->physical_address = vbt_gop->FrameBufferBase; framebuffer->x_resolution = vbt_gop->GraphicsMode.HorizontalResolution; diff --git a/src/drivers/intel/fsp1_1/fsp_util.c b/src/drivers/intel/fsp1_1/fsp_util.c index 5ce753f4d4..0d09483f10 100644 --- a/src/drivers/intel/fsp1_1/fsp_util.c +++ b/src/drivers/intel/fsp1_1/fsp_util.c @@ -45,9 +45,8 @@ FSP_INFO_HEADER *find_fsp(uintptr_t fsp_base_address) fsp_ptr.u32 = fsp_base_address; /* Check the FV signature, _FVH */ - if (fsp_ptr.fvh->Signature != 0x4856465F) { + if (fsp_ptr.fvh->Signature != 0x4856465F) return (FSP_INFO_HEADER *)ERROR_NO_FV_SIG; - } /* Locate the file header which follows the FV header. */ fsp_ptr.u32 += fsp_ptr.fvh->ExtHeaderOffset; @@ -65,22 +64,19 @@ FSP_INFO_HEADER *find_fsp(uintptr_t fsp_base_address) /* Locate the Raw Section Header */ fsp_ptr.u32 += sizeof(EFI_FFS_FILE_HEADER); - if (fsp_ptr.rs->Type != EFI_SECTION_RAW) { + if (fsp_ptr.rs->Type != EFI_SECTION_RAW) return (FSP_INFO_HEADER *)ERROR_NO_INFO_HEADER; - } /* Locate the FSP INFO Header which follows the Raw Header. */ fsp_ptr.u32 += sizeof(EFI_RAW_SECTION); /* Verify that the FSP base address.*/ - if (fsp_ptr.fih->ImageBase != fsp_base_address) { + if (fsp_ptr.fih->ImageBase != fsp_base_address) return (FSP_INFO_HEADER *)ERROR_IMAGEBASE_MISMATCH; - } /* Verify the FSP Signature */ - if (fsp_ptr.fih->Signature != FSP_SIG) { + if (fsp_ptr.fih->Signature != FSP_SIG) return (FSP_INFO_HEADER *)ERROR_INFO_HEAD_SIG_MISMATCH; - } /* Verify the FSP ID */ image_id = (u32 *)&fsp_ptr.fih->ImageId[0]; @@ -290,7 +286,8 @@ void fsp_display_upd_value(const char *name, uint32_t size, uint64_t old, } } -size_t EFIAPI fsp_write_line(uint8_t *buffer, size_t number_of_bytes) +__attribute__((cdecl)) size_t fsp_write_line(uint8_t *buffer, + size_t number_of_bytes) { console_write_line(buffer, number_of_bytes); return number_of_bytes; diff --git a/src/drivers/intel/fsp1_1/hob.c b/src/drivers/intel/fsp1_1/hob.c index c0816e994a..85d0f35f91 100644 --- a/src/drivers/intel/fsp1_1/hob.c +++ b/src/drivers/intel/fsp1_1/hob.c @@ -69,7 +69,7 @@ void *get_first_hob(uint16_t type) } /* Returns the next instance of the matched GUID HOB from the starting HOB. */ -void *get_next_guid_hob(const EFI_GUID * guid, const void *hob_start) +void *get_next_guid_hob(const EFI_GUID *guid, const void *hob_start) { EFI_PEI_HOB_POINTERS hob; diff --git a/src/drivers/intel/fsp1_1/include/fsp/util.h b/src/drivers/intel/fsp1_1/include/fsp/util.h index eea0c33a76..32ac99ee28 100644 --- a/src/drivers/intel/fsp1_1/include/fsp/util.h +++ b/src/drivers/intel/fsp1_1/include/fsp/util.h @@ -92,12 +92,11 @@ int fsp_relocate(struct prog *fsp_relocd, const struct region_device *fsp_src); extern void *FspHobListPtr; #endif -/* TODO: Remove the EFI types and decorations from coreboot implementations. */ -VOID * EFIAPI get_hob_list(VOID); -VOID * EFIAPI get_next_hob(UINT16 type, CONST VOID *hob_start); -VOID * EFIAPI get_first_hob(UINT16 type); -VOID * EFIAPI get_next_guid_hob(CONST EFI_GUID * guid, CONST VOID *hob_start); -VOID * EFIAPI get_first_guid_hob(CONST EFI_GUID * guid); +void *get_hob_list(void); +void *get_next_hob(uint16_t type, const void *hob_start); +void *get_first_hob(uint16_t type); +void *get_next_guid_hob(const EFI_GUID *guid, const void *hob_start); +void *get_first_guid_hob(const EFI_GUID *guid); /* * Writes number_of_bytes data bytes from buffer to the console. @@ -106,6 +105,7 @@ VOID * EFIAPI get_first_guid_hob(CONST EFI_GUID * guid); * If number_of_bytes is zero, don't output any data but instead wait until * the console has output all data, then return 0. */ -size_t EFIAPI fsp_write_line(uint8_t *buffer, size_t number_of_bytes); +__attribute__((cdecl)) size_t fsp_write_line(uint8_t *buffer, + size_t number_of_bytes); #endif /* FSP1_1_UTIL_H */ diff --git a/src/drivers/intel/fsp1_1/raminit.c b/src/drivers/intel/fsp1_1/raminit.c index 4b07ede96a..6e2efcfabb 100644 --- a/src/drivers/intel/fsp1_1/raminit.c +++ b/src/drivers/intel/fsp1_1/raminit.c @@ -183,7 +183,7 @@ void raminit(struct romstage_params *params) /* Locate the FSP_SMBIOS_MEMORY_INFO HOB */ memory_info_hob = get_next_guid_hob(&memory_info_hob_guid, hob_list_ptr); - if (NULL == memory_info_hob) { + if (memory_info_hob == NULL) { printk(BIOS_ERR, "FSP_SMBIOS_MEMORY_INFO HOB missing!\n"); fsp_verification_failure = 1; } else { @@ -205,7 +205,7 @@ void raminit(struct romstage_params *params) * 7.5: EFI_PEI_GRAPHICS_INFO_HOB produced by SiliconInit * FSP_SMBIOS_MEMORY_INFO HOB verified above */ - if (NULL != cbmem_root) { + if (cbmem_root != NULL) { printk(BIOS_DEBUG, "7.4: FSP_BOOTLOADER_TOLUM_HOB: 0x%p\n", cbmem_root); @@ -215,7 +215,7 @@ void raminit(struct romstage_params *params) printk(BIOS_DEBUG, " 0x%016lx: ResourceLength\n", data); } hob_ptr.Raw = get_next_guid_hob(&mrc_guid, hob_list_ptr); - if (NULL == hob_ptr.Raw) { + if (hob_ptr.Raw == NULL) { printk(BIOS_ERR, "7.3: FSP_NON_VOLATILE_STORAGE_HOB missing!\n"); fsp_verification_failure = (params->pei_data->saved_data == NULL) ? 1 : 0; diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c index 3933b2e193..c2fc667dfd 100644 --- a/src/drivers/intel/fsp1_1/romstage.c +++ b/src/drivers/intel/fsp1_1/romstage.c @@ -161,10 +161,10 @@ void romstage_common(struct romstage_params *params) if ((params->pei_data->boot_mode != ACPI_S3) && (params->pei_data->data_to_save_size != 0) && (params->pei_data->data_to_save != NULL)) - mrc_cache_stash_data(MRC_TRAINING_DATA, - params->fsp_version, - params->pei_data->data_to_save, - params->pei_data->data_to_save_size); + mrc_cache_stash_data(MRC_TRAINING_DATA, + params->fsp_version, + params->pei_data->data_to_save, + params->pei_data->data_to_save_size); } /* Save DIMM information */ diff --git a/src/drivers/intel/fsp1_1/stack.c b/src/drivers/intel/fsp1_1/stack.c index 059f8ba4f1..639cf38211 100644 --- a/src/drivers/intel/fsp1_1/stack.c +++ b/src/drivers/intel/fsp1_1/stack.c @@ -71,7 +71,8 @@ void *setup_stack_and_mtrrs(void) /* Cache RAM as WB from 0 -> CACHE_TMP_RAMTOP. */ slot = stack_push32(slot, mtrr_mask_upper); /* upper mask */ - slot = stack_push32(slot, ~(CACHE_TMP_RAMTOP - 1) | MTRR_PHYS_MASK_VALID); + slot = stack_push32(slot, ~(CACHE_TMP_RAMTOP - 1) + | MTRR_PHYS_MASK_VALID); slot = stack_push32(slot, 0); /* upper base */ slot = stack_push32(slot, 0 | MTRR_TYPE_WRBACK); num_mtrrs++; @@ -136,7 +137,8 @@ void *setup_stack_and_mtrrs(void) /* Cache the ROM as WP just below 4GiB. */ slot = stack_push32(slot, mtrr_mask_upper); /* upper mask */ - slot = stack_push32(slot, ~(CONFIG_ROM_SIZE - 1) | MTRR_PHYS_MASK_VALID); + slot = stack_push32(slot, ~(CONFIG_ROM_SIZE - 1) + | MTRR_PHYS_MASK_VALID); slot = stack_push32(slot, 0); /* upper base */ slot = stack_push32(slot, ~(CONFIG_ROM_SIZE - 1) | MTRR_TYPE_WRPROT); num_mtrrs++; -- cgit v1.2.3