From 24f5164a261f31959fa44344b60024726fb1f597 Mon Sep 17 00:00:00 2001 From: David Imhoff Date: Sun, 10 May 2015 15:15:25 +0200 Subject: intel/fsp_baytrail: Always log PcdEnableLpe and PcdeMMCBootMode Log the values of PcdEnableLpe and PcdeMMCBootMode even if they are outside of the expected range. TEST=Intel/MinnowMax Change-Id: Ie0aea4287234b23d4e9852f3991dcc78ce8103d9 Signed-off-by: David Imhoff Reviewed-on: https://review.coreboot.org/10164 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Martin Roth --- src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c | 7 +++++++ 1 file changed, 7 insertions(+) diff --git a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c index fb179e65dc..640331bf41 100644 --- a/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c +++ b/src/soc/intel/fsp_baytrail/fsp/chipset_fsp_util.c @@ -209,10 +209,17 @@ static void ConfigureDefaultUpdData(FSP_INFO_HEADER *FspInfo, UPD_DATA_REGION *U if (UpdData->PcdEnableLpe < sizeof(acpi_pci_mode_strings) / sizeof (char *)) printk(FSP_INFO_LEVEL, "Lpe:\t\t\t%s\n", acpi_pci_mode_strings[UpdData->PcdEnableLpe]); + else + printk(FSP_INFO_LEVEL, "Lpe:\t\t\tUnknown (0x%02x)\n", + UpdData->PcdEnableLpe); if (UpdData->PcdeMMCBootMode < sizeof(emmc_mode_strings) / sizeof (char *)) printk(FSP_INFO_LEVEL, "eMMC Mode:\t\t%s\n", emmc_mode_strings[UpdData->PcdeMMCBootMode]); + else + printk(FSP_INFO_LEVEL, "eMMC Mode:\t\tUnknown (0x%02x)\n", + UpdData->PcdeMMCBootMode); + if (UpdData->PcdEnableSata) printk(FSP_INFO_LEVEL, "SATA Mode:\t\t%s\n", -- cgit v1.2.3