From 2910a2b5454f8de76c281739ae84814a4a1b47e3 Mon Sep 17 00:00:00 2001
From: Greg Watson <jarrah@users.sourceforge.net>
Date: Wed, 23 Jul 2003 18:20:17 +0000
Subject: static devices

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1009 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
---
 src/boot/hardwaremain.c           |  7 +++++++
 src/include/device/chip.h         | 18 +++++++++---------
 src/superio/NSC/pc97307/Config.lb |  1 +
 src/superio/NSC/pc97307/superio.c |  2 +-
 4 files changed, 18 insertions(+), 10 deletions(-)

diff --git a/src/boot/hardwaremain.c b/src/boot/hardwaremain.c
index 0477253ec4..4bb23fde80 100644
--- a/src/boot/hardwaremain.c
+++ b/src/boot/hardwaremain.c
@@ -35,6 +35,7 @@ it with the version available from LANL.
 #include <part/sizeram.h>
 #include <device/device.h>
 #include <device/pci.h>
+#include <device/chip.h>
 #include <delay.h>
 #if 0
 #include <part/mainboard.h>
@@ -146,6 +147,9 @@ void hardwaremain(int boot_complete)
 	unsigned long totalmem;
 
 	post_code(0x80);
+	
+	CONFIGURE(CONF_PASS_PRE_CONSOLE);
+
 	/* displayinit MUST PRECEDE ALL PRINTK! */
 	console_init();
 	
@@ -163,6 +167,7 @@ void hardwaremain(int boot_complete)
 	}
 #endif
 	init_timer();
+	CONFIGURE(CONF_PASS_PRE_PCI);
 
 	/* pick how to scan the bus. This is first so we can get at memory size. */
 	printk_info("Finding PCI configuration type.\n");
@@ -215,6 +220,8 @@ void hardwaremain(int boot_complete)
 	 */
 	lb_mem = write_tables(mem, processor_map);
 
+	CONFIGURE(CONF_PASS_PRE_PCI);
+
 	elfboot(lb_mem);
 }
 
diff --git a/src/include/device/chip.h b/src/include/device/chip.h
index 574df1d4e0..20247b9209 100644
--- a/src/include/device/chip.h
+++ b/src/include/device/chip.h
@@ -7,9 +7,9 @@
 
 /* some of the types of resources chips can control */
 #ifndef CONFIG_CHIP_CONFIGURE
-#define CHIP_CONFIGURE(chip, pass) chip_configure(chip, pass)
+#define CONFIGURE(dev, pass) chip_configure(chip, pass)
 #else
-#define CHIP_CONFIGURE(chip, pass)
+#define CONFIGURE(dev, pass)
 #endif
 
 struct com_ports {
@@ -28,13 +28,13 @@ struct lpt_ports {
 };
 
 enum chip_pass {
-	CHIP_PASS_PRE_CONSOLE,
-	CHIP_PASS_PRE_PCI,
-	CHIP_PASS_PRE_DEVICE_ENUMERATE,
-	CHIP_PASS_PRE_DEVICE_CONFIGURE,
-	CHIP_PASS_PRE_DEVICE_ENABLE,
-	CHIP_PASS_PRE_DEVICE_INITIALIZE,
-	CHIP_PASS_PRE_BOOT
+	CONF_PASS_PRE_CONSOLE,
+	CONF_PASS_PRE_PCI,
+	CONF_PASS_PRE_DEVICE_ENUMERATE,
+	CONF_PASS_PRE_DEVICE_CONFIGURE,
+	CONF_PASS_PRE_DEVICE_ENABLE,
+	CONF_PASS_PRE_DEVICE_INITIALIZE,
+	CONF_PASS_PRE_BOOT
 };
 
 
diff --git a/src/superio/NSC/pc97307/Config.lb b/src/superio/NSC/pc97307/Config.lb
index eac204154e..94a888e767 100644
--- a/src/superio/NSC/pc97307/Config.lb
+++ b/src/superio/NSC/pc97307/Config.lb
@@ -1 +1,2 @@
+config chip.h
 object superio.c
diff --git a/src/superio/NSC/pc97307/superio.c b/src/superio/NSC/pc97307/superio.c
index 100fa146d9..1f7a3b1d98 100644
--- a/src/superio/NSC/pc97307/superio.c
+++ b/src/superio/NSC/pc97307/superio.c
@@ -17,7 +17,7 @@ void sio_enable(struct chip *chip, enum chip_pass pass)
 	struct superio_NSC_pc97307_config *conf = (struct superio_NSC_pc97307_config *)chip->chip_info;
 
 	switch (pass) {
-	case CHIP_PRE_CONSOLE:
+	case CONF_PASS_PRE_CONSOLE:
 		/* Enable Super IO Chip */
 		pnp_output(0x07, 6); /* LD 6 = UART1 */
 		pnp_output(0x30, 0); /* Dectivate */
-- 
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