From 2ee4c0d7f4f39b1eed53e4f6770879c76a2d6eab Mon Sep 17 00:00:00 2001
From: Subrata Banik <subrata.banik@intel.com>
Date: Wed, 9 Sep 2020 12:59:24 +0530
Subject: vendorcode/intel/fsp/alderlake: Fix FSPS_ARCH_UPD redefinition issue

FSPS_ARCH_UPD struct is part of edk2-stable202005 branch (FspApi.h)
hence local definition of FSPS_ARCH_UPD inside FspsUpd.h is causing
compilation issue.

Change-Id: Id5b3637d9ab6d87aab6da810f9c83d3258900a29
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/45191
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: Tim Wawrzynczak <twawrzynczak@chromium.org>
Reviewed-by: Maulik V Vaghela <maulik.v.vaghela@intel.com>
---
 .../intel/fsp/fsp2_0/alderlake/FspsUpd.h           | 30 ----------------------
 1 file changed, 30 deletions(-)

diff --git a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h
index 39c360ddd6..7ec577a7b5 100644
--- a/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h
+++ b/src/vendorcode/intel/fsp/fsp2_0/alderlake/FspsUpd.h
@@ -80,36 +80,6 @@ typedef struct {
 
 #define SI_PCH_MAX_DEVICE_INTERRUPT_CONFIG  64       ///< Number of all PCH devices
 
-
-/** FSPS_ARCH_UPD
-**/
-typedef struct {
-
-/** Offset 0x0020 - Reserved
-**/
-  UINT8                       Revision;
-
-/** Offset 0x0021 - Reserved
-**/
-  UINT8                       Reserved[3];
-
-/** Offset 0x0024 - Reserved
-**/
-  UINT32                      Length;
-
-/** Offset 0x0028 - Reserved
-**/
-  UINT32                      FspEventHandler;
-
-/** Offset 0x002C - Reserved
-**/
-  UINT8                       EnableMultiPhaseSiliconInit;
-
-/** Offset 0x002D - Reserved
-**/
-  UINT8                       Reserved1[19];
-} FSPS_ARCH_UPD;
-
 /** Fsp S Configuration
 **/
 typedef struct {
-- 
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