From 3286848a7a013b4d4effc4e50b4b7b552236cf73 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Fri, 1 Feb 2019 13:07:42 +0100 Subject: cpu/x86/msr: Move IA32_MISC_ENABLE bits to common place Change-Id: I51aa300358013cb0e76704feb2115d2a7e260f8a Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/31193 Reviewed-by: Angel Pons Reviewed-by: David Guckian Reviewed-by: Vanny E Tested-by: build bot (Jenkins) --- src/include/cpu/x86/msr.h | 2 ++ src/soc/intel/denverton_ns/include/soc/msr.h | 4 ---- 2 files changed, 2 insertions(+), 4 deletions(-) diff --git a/src/include/cpu/x86/msr.h b/src/include/cpu/x86/msr.h index 5c6cae3a0e..8c558ce8ac 100644 --- a/src/include/cpu/x86/msr.h +++ b/src/include/cpu/x86/msr.h @@ -37,6 +37,8 @@ #define IA32_PERF_CTL 0x199 #define IA32_THERM_INTERRUPT 0x19b #define IA32_MISC_ENABLE 0x1a0 +#define FAST_STRINGS_ENABLE_BIT (1 << 0) +#define SPEED_STEP_ENABLE_BIT (1 << 16) #define IA32_ENERGY_PERF_BIAS 0x1b0 #define ENERGY_POLICY_PERFORMANCE 0 #define ENERGY_POLICY_NORMAL 6 diff --git a/src/soc/intel/denverton_ns/include/soc/msr.h b/src/soc/intel/denverton_ns/include/soc/msr.h index 1b27eefcaa..0d469c4871 100644 --- a/src/soc/intel/denverton_ns/include/soc/msr.h +++ b/src/soc/intel/denverton_ns/include/soc/msr.h @@ -96,10 +96,6 @@ #define SMRR_SUPPORTED (1 << 11) #define PRMRR_SUPPORTED (1 << 12) -/* IA32_MISC_ENABLE bits */ -#define FAST_STRINGS_ENABLE_BIT (1 << 0) -#define SPEED_STEP_ENABLE_BIT (1 << 16) - /* Read BCLK from MSR */ unsigned int bus_freq_khz(void); -- cgit v1.2.3