From 370b8b6ceff588fc8616fc6ce4d3715c1a0d22b6 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20B=C3=BCchler?= Date: Mon, 1 Jun 2020 20:51:58 +0200 Subject: superio/ite: Distinguish between chips for PECI readings MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Some chips can read external temperature sensor values only to TMPIN3. These use EC register 0x55, bit 7 to enable that. This patch adds support for this. It is called "old PECI" by lm_sensors [0]. Other chips can read to any TMPIN[1-3] which is configured in EC register 0x51 like the other temperature sources. This was the only supported method. This patch adds a Kconfig option to indicate this variant. This patch was tested on an Acer Aspire M3800 which has an IT8720F that reads the CPU temperature via PECI. It allows the automatic fan control feature of the Super I/O to work. Overview of support per chip in the coreboot tree, determined from reading the publicly available datasheets or lm_sensors, if noted: Old PECI: * IT8718F * IT8720F * IT8781F, IT8782F, IT8783E/F Normal PECI: * IT8721F (exception: no PECI to TMPIN2) * IT8728F * IT8772E (uses separate code in coreboot, not superio/ite/common) * IT8786E * IT8613E, IT8623E (lm_sensors) [0] Linux kernel 5.4.48, drivers/hwmon/it87.c Signed-off-by: Michael Büchler Change-Id: Iab7115852437d46c9b1269bba61ffcf680fe5a6a Reviewed-on: https://review.coreboot.org/c/coreboot/+/44168 Tested-by: build bot (Jenkins) Reviewed-by: Angel Pons --- src/superio/ite/common/Kconfig | 6 ++++++ src/superio/ite/common/env_ctrl.c | 29 ++++++++++++++++++++++++++--- src/superio/ite/common/env_ctrl.h | 1 + src/superio/ite/it8613e/Kconfig | 1 + src/superio/ite/it8623e/Kconfig | 1 + src/superio/ite/it8721f/Kconfig | 4 ++++ src/superio/ite/it8728f/Kconfig | 1 + src/superio/ite/it8786e/Kconfig | 1 + 8 files changed, 41 insertions(+), 3 deletions(-) diff --git a/src/superio/ite/common/Kconfig b/src/superio/ite/common/Kconfig index 13c8ff53d4..36c1496db0 100644 --- a/src/superio/ite/common/Kconfig +++ b/src/superio/ite/common/Kconfig @@ -42,4 +42,10 @@ config SUPERIO_ITE_ENV_CTRL_7BIT_SLOPE_REG Slope PWM registers have no separate BIT6 and are set directly by 7-bit values instead. +config SUPERIO_ITE_ENV_CTRL_EXT_ANY_TMPIN + bool + help + Temperature can be read to any TMPIN from an external sensor via SST/PECI + (instead of TMPIN3 only). + endif diff --git a/src/superio/ite/common/env_ctrl.c b/src/superio/ite/common/env_ctrl.c index c87f32d3e0..9149c5828c 100644 --- a/src/superio/ite/common/env_ctrl.c +++ b/src/superio/ite/common/env_ctrl.c @@ -61,17 +61,40 @@ static void enable_tmpin(const u16 base, const u8 tmpin, const struct ite_ec_thermal_config *const conf) { u8 reg; + u8 reg_extra; reg = pnp_read_hwm5_index(base, ITE_EC_ADC_TEMP_CHANNEL_ENABLE); + reg_extra = pnp_read_hwm5_index(base, ITE_EC_ADC_TEMP_EXTRA_CHANNEL_ENABLE); switch (conf->mode) { case THERMAL_PECI: - if (reg & ITE_EC_ADC_TEMP_EXT_REPORTS_TO_MASK) { - printk(BIOS_WARNING, "PECI specified for multiple TMPIN\n"); + /* Some chips can set any TMPIN as the target for PECI readings + while others can only read to TMPIN3. In the latter case a + different register is used for enabling it. */ + if (CONFIG(SUPERIO_ITE_ENV_CTRL_EXT_ANY_TMPIN)) { + /* IT8721F is an exception, it cannot use TMPIN2 for PECI. */ + if (CONFIG(SUPERIO_ITE_IT8721F) && tmpin == 2) { + printk(BIOS_WARNING, + "PECI to TMPIN2 not supported on IT8721F\n"); + return; + } + if (reg & ITE_EC_ADC_TEMP_EXT_REPORTS_TO_MASK) { + printk(BIOS_WARNING, + "PECI specified for multiple TMPIN\n"); + return; + } + reg |= ITE_EC_ADC_TEMP_EXT_REPORTS_TO(tmpin); + } else if (tmpin == 3) { + reg_extra |= ITE_EC_ADC_TEMP_EXTRA_TMPIN3_EXT; + pnp_write_hwm5_index(base, ITE_EC_ADC_TEMP_EXTRA_CHANNEL_ENABLE, + reg_extra); + } else { + printk(BIOS_WARNING, "PECI to TMPIN%d not supported on this Super I/O", + tmpin); return; } enable_peci(base); - reg |= ITE_EC_ADC_TEMP_EXT_REPORTS_TO(tmpin); + break; case THERMAL_DIODE: reg |= ITE_EC_ADC_TEMP_DIODE_MODE(tmpin); diff --git a/src/superio/ite/common/env_ctrl.h b/src/superio/ite/common/env_ctrl.h index 145c6c13e9..5a31e7cfbc 100644 --- a/src/superio/ite/common/env_ctrl.h +++ b/src/superio/ite/common/env_ctrl.h @@ -129,6 +129,7 @@ #define ITE_EC_ADC_TEMP_RESISTOR_MODE(x) (1 << ((x)+2)) #define ITE_EC_ADC_TEMP_DIODE_MODE(x) (1 << ((x)-1)) #define ITE_EC_ADC_TEMP_EXTRA_CHANNEL_ENABLE 0x55 +#define ITE_EC_ADC_TEMP_EXTRA_TMPIN3_EXT (1 << 7) /* Matches length of ITE_EC_TMPIN_CNT */ static const u8 ITE_EC_TEMP_ADJUST[] = { 0x56, 0x57, 0x59 }; diff --git a/src/superio/ite/it8613e/Kconfig b/src/superio/ite/it8613e/Kconfig index d5ccb65f60..e6f01c4cac 100644 --- a/src/superio/ite/it8613e/Kconfig +++ b/src/superio/ite/it8613e/Kconfig @@ -8,3 +8,4 @@ config SUPERIO_ITE_IT8613E select SUPERIO_ITE_ENV_CTRL_8BIT_PWM select SUPERIO_ITE_ENV_CTRL_5FANS select SUPERIO_ITE_ENV_CTRL_NO_ONOFF + select SUPERIO_ITE_ENV_CTRL_EXT_ANY_TMPIN diff --git a/src/superio/ite/it8623e/Kconfig b/src/superio/ite/it8623e/Kconfig index ea57a35e0a..44a79ec723 100644 --- a/src/superio/ite/it8623e/Kconfig +++ b/src/superio/ite/it8623e/Kconfig @@ -7,3 +7,4 @@ config SUPERIO_ITE_IT8623E select SUPERIO_ITE_ENV_CTRL_PWM_FREQ2 select SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG select SUPERIO_ITE_ENV_CTRL_8BIT_PWM + select SUPERIO_ITE_ENV_CTRL_EXT_ANY_TMPIN diff --git a/src/superio/ite/it8721f/Kconfig b/src/superio/ite/it8721f/Kconfig index 2c3051bce6..ec22a2d5a0 100644 --- a/src/superio/ite/it8721f/Kconfig +++ b/src/superio/ite/it8721f/Kconfig @@ -3,3 +3,7 @@ config SUPERIO_ITE_IT8721F bool select SUPERIO_ITE_COMMON_PRE_RAM + select SUPERIO_ITE_ENV_CTRL + select SUPERIO_ITE_ENV_CTRL_FAN16_CONFIG + select SUPERIO_ITE_ENV_CTRL_PWM_FREQ2 + select SUPERIO_ITE_ENV_CTRL_EXT_ANY_TMPIN diff --git a/src/superio/ite/it8728f/Kconfig b/src/superio/ite/it8728f/Kconfig index be0c20717e..6d02c0b424 100644 --- a/src/superio/ite/it8728f/Kconfig +++ b/src/superio/ite/it8728f/Kconfig @@ -9,3 +9,4 @@ config SUPERIO_ITE_IT8728F select SUPERIO_ITE_ENV_CTRL_8BIT_PWM select SUPERIO_ITE_ENV_CTRL_5FANS select SUPERIO_ITE_ENV_CTRL_7BIT_SLOPE_REG + select SUPERIO_ITE_ENV_CTRL_EXT_ANY_TMPIN diff --git a/src/superio/ite/it8786e/Kconfig b/src/superio/ite/it8786e/Kconfig index 332f6020c6..216d6f5bf8 100644 --- a/src/superio/ite/it8786e/Kconfig +++ b/src/superio/ite/it8786e/Kconfig @@ -7,3 +7,4 @@ config SUPERIO_ITE_IT8786E select SUPERIO_ITE_ENV_CTRL_PWM_FREQ2 select SUPERIO_ITE_ENV_CTRL_8BIT_PWM select SUPERIO_ITE_ENV_CTRL_7BIT_SLOPE_REG + select SUPERIO_ITE_ENV_CTRL_EXT_ANY_TMPIN -- cgit v1.2.3