From 48d11d557f725ecf89678a1b9df440417b8da225 Mon Sep 17 00:00:00 2001 From: Li-Ta Lo Date: Tue, 27 Apr 2004 17:00:40 +0000 Subject: Fixed the device on bus 0 problem for IBM/E325. The structure mainboard_ibm_e325_control is not actually defined in the mainboard.c. It was only declared in chip.h. Why gcc did not tell me this mistake and why gcc does not complain about define a structure twice ? git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1539 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/mainboard/ibm/e325/auto.c | 26 +++++++++++++++++++++++--- src/mainboard/ibm/e325/mainboard.c | 2 +- src/mainboard/ibm/e325/resourcemap.c | 6 +++--- src/northbridge/amd/amdk8/northbridge.c | 11 +++++++++-- 4 files changed, 36 insertions(+), 9 deletions(-) diff --git a/src/mainboard/ibm/e325/auto.c b/src/mainboard/ibm/e325/auto.c index ed78fe3d7a..ad04f94363 100644 --- a/src/mainboard/ibm/e325/auto.c +++ b/src/mainboard/ibm/e325/auto.c @@ -30,7 +30,7 @@ static void hard_reset(void) set_bios_reset(); /* enable cf9 */ - pci_write_config8(PCI_DEV(1, 0x04, 3), 0x41, 0xf1); + pci_write_config8(PCI_DEV(0, 0x04, 3), 0x41, 0xf1); /* reset */ outb(0x0e, 0x0cf9); } @@ -38,7 +38,7 @@ static void hard_reset(void) static void soft_reset(void) { set_bios_reset(); - pci_write_config8(PCI_DEV(1, 0x04, 0), 0x47, 1); + pci_write_config8(PCI_DEV(0, 0x04, 0), 0x47, 1); } static void memreset_setup(void) @@ -171,18 +171,37 @@ static void main(void) pc87366_enable_serial(SERIAL_DEV, TTYS0_BASE); uart_init(); console_init(); + +#if 0 + print_pci_devices(); +#endif + setup_ibm_e325_resource_map(); + +#if 0 + print_debug("after setting resource\n"); + print_pci_devices(); +#endif + needs_reset = setup_coherent_ht_domain(); needs_reset |= ht_setup_chain(PCI_DEV(0, 0x18, 0), 0xA0); + +#if 0 + print_debug("after ht stuff\n"); + print_pci_devices(); +#endif + if (needs_reset) { print_info("ht reset -\r\n"); soft_reset(); } -#if 1 +#if 0 print_pci_devices(); #endif + enable_smbus(); + #if 0 dump_spd_registers(&cpu[0]); #endif @@ -193,6 +212,7 @@ static void main(void) #if 0 dump_pci_devices(); #endif + #if 0 dump_pci_device(PCI_DEV(0, 0x18, 2)); #endif diff --git a/src/mainboard/ibm/e325/mainboard.c b/src/mainboard/ibm/e325/mainboard.c index e526a78a75..cfe239343c 100644 --- a/src/mainboard/ibm/e325/mainboard.c +++ b/src/mainboard/ibm/e325/mainboard.c @@ -279,7 +279,7 @@ static void enumerate(struct chip *chip) child->bus = &dev_root.link[0]; } } -struct chip_control mainboard_arima_hdama_control = { +struct chip_control mainboard_ibm_e325_control = { .enumerate = enumerate, .name = "IBM E325 mainboard ", }; diff --git a/src/mainboard/ibm/e325/resourcemap.c b/src/mainboard/ibm/e325/resourcemap.c index 044a5d96f4..52e85d5995 100644 --- a/src/mainboard/ibm/e325/resourcemap.c +++ b/src/mainboard/ibm/e325/resourcemap.c @@ -260,10 +260,10 @@ static void setup_ibm_e325_resource_map(void) * [31:24] Bus Number Limit i * This field defines the highest bus number in configuration regin i */ - PCI_ADDR(0, 0x18, 1, 0xec), 0x0000FC88, 0xff000103, - PCI_ADDR(0, 0x18, 1, 0xe8), 0x0000FC88, 0, + PCI_ADDR(0, 0x18, 1, 0xe0), 0x0000FC88, 0xff040103, PCI_ADDR(0, 0x18, 1, 0xe4), 0x0000FC88, 0, - PCI_ADDR(0, 0x18, 1, 0xe0), 0x0000FC88, 0, + PCI_ADDR(0, 0x18, 1, 0xe8), 0x0000FC88, 0, + PCI_ADDR(0, 0x18, 1, 0xec), 0x0000FC88, 0, }; int max; max = sizeof(register_values)/sizeof(register_values[0]); diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index 26bfdcc6f5..d6b99a6c4e 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -488,11 +488,19 @@ static void amdk8_set_resources(device_t dev) unsigned int amdk8_scan_root_bus(device_t root, unsigned int max) { unsigned reg; + + printk_debug("amdk8_scan_root_bus\n"); + /* Unmap all of the HT chains */ for (reg = 0xe0; reg <= 0xec; reg += 4) { + printk_debug("amdk8_scan_root: clearing register %x\n", reg); f1_write_config32(reg, 0); } + + printk_debug("amdk8_scan_root_bus: start scan pci bus\n"); max = pci_scan_bus(&root->link[0], PCI_DEVFN(0x18, 0), 0xff, max); + + printk_debug("amdk8_scan_root_bus: done\n"); return max; } @@ -529,12 +537,11 @@ static void amdk8_enable_resources(struct device *dev) ctrl = pci_read_config16(dev, PCI_BRIDGE_CONTROL); ctrl |= dev->link[0].bridge_ctrl; printk_debug("%s bridge ctrl <- %04x\n", dev_path(dev), ctrl); - printk_err("%s bridge ctrl <- %04x\n", dev_path(dev), ctrl); pci_write_config16(dev, PCI_BRIDGE_CONTROL, ctrl); #if 0 /* let's see what link VGA is on */ - for(link = 0; link < dev->links; link++) { + for (link = 0; link < dev->links; link++) { device_t child; printk_err("Kid %d of k8: bridge ctrl says: 0x%x\n", link, dev->link[link].bridge_ctrl); -- cgit v1.2.3