From 4ea66e6b6fd04308a0864ebc21cdf814a57f83ac Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Fri, 8 Sep 2017 23:56:29 +0200 Subject: device/dram/ddr2: Fix decoding tRR Bit 7 is set on all options so only the default option in the switch statement is returned. Change-Id: I6a698ec9c15a2611a34c5965edf93638553775f0 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/21457 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Martin Roth --- src/device/dram/ddr2.c | 15 +++++++++------ 1 file changed, 9 insertions(+), 6 deletions(-) diff --git a/src/device/dram/ddr2.c b/src/device/dram/ddr2.c index 326b1410fa..76524ceada 100644 --- a/src/device/dram/ddr2.c +++ b/src/device/dram/ddr2.c @@ -181,17 +181,20 @@ static u32 spd_decode_tRR_time(u8 c) { switch (c) { default: - case 0: + printk(BIOS_WARNING, + "Unknown tRR value, using default of 15.6us."); + /* Fallthrough */ + case 0x80: return 15625 << 8; - case 1: + case 0x81: return 15625 << 6; - case 2: + case 0x82: return 15625 << 7; - case 3: + case 0x83: return 15625 << 9; - case 4: + case 0x84: return 15625 << 10; - case 5: + case 0x85: return 15625 << 11; } } -- cgit v1.2.3