From 6a089e3b18ebb5561ae7233d28ff53fff9fbe676 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Fri, 27 Jun 2014 13:32:59 +0300 Subject: AGESA boards: Use acpi_is_wakeup_s3() MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Ib76ec433710b3a7c26360329a9403585d6f4fe4c Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/6143 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan --- src/mainboard/amd/olivehill/mainboard.c | 10 ++-------- src/mainboard/amd/parmer/mainboard.c | 10 ++-------- src/mainboard/amd/persimmon/mainboard.c | 8 -------- src/mainboard/amd/thatcher/mainboard.c | 10 +--------- src/mainboard/asrock/imb-a180/mainboard.c | 10 ++-------- src/mainboard/asus/f2a85-m/mainboard.c | 10 +--------- src/mainboard/gizmosphere/gizmo/mainboard.c | 8 -------- src/mainboard/hp/pavilion_m6_1035dx/mainboard.c | 10 ++-------- src/mainboard/jetway/nf81-t56n-lf/mainboard.c | 8 -------- src/mainboard/lippert/frontrunner-af/mainboard.c | 8 -------- src/mainboard/lippert/toucan-af/mainboard.c | 8 -------- 11 files changed, 10 insertions(+), 90 deletions(-) diff --git a/src/mainboard/amd/olivehill/mainboard.c b/src/mainboard/amd/olivehill/mainboard.c index 3913898b53..cc6d9f8519 100644 --- a/src/mainboard/amd/olivehill/mainboard.c +++ b/src/mainboard/amd/olivehill/mainboard.c @@ -35,15 +35,9 @@ static void mainboard_enable(device_t dev) { printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); - /* - * The mainboard is the first place that we get control in ramstage. Check - * for S3 resume and call the appropriate AGESA/CIMx resume functions. - */ -#if CONFIG_HAVE_ACPI_RESUME - acpi_slp_type = acpi_get_sleep_type(); - if (acpi_slp_type == 3) + + if (acpi_is_wakeup_s3()) agesawrapper_fchs3earlyrestore(); -#endif } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/amd/parmer/mainboard.c b/src/mainboard/amd/parmer/mainboard.c index 8aa76ffb0e..214cb21368 100644 --- a/src/mainboard/amd/parmer/mainboard.c +++ b/src/mainboard/amd/parmer/mainboard.c @@ -35,15 +35,9 @@ static void mainboard_enable(device_t dev) { printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); - /* - * The mainboard is the first place that we get control in ramstage. Check - * for S3 resume and call the appropriate AGESA/CIMx resume functions. - */ -#if CONFIG_HAVE_ACPI_RESUME - acpi_slp_type = acpi_get_sleep_type(); - if (acpi_slp_type == 3) + + if (acpi_is_wakeup_s3()) agesawrapper_fchs3earlyrestore(); -#endif } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/amd/persimmon/mainboard.c b/src/mainboard/amd/persimmon/mainboard.c index db0dbe0ead..d3c5b8fec6 100644 --- a/src/mainboard/amd/persimmon/mainboard.c +++ b/src/mainboard/amd/persimmon/mainboard.c @@ -155,14 +155,6 @@ static void mainboard_enable(device_t dev) { printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); -/* - * The mainboard is the first place that we get control in ramstage. Check - * for S3 resume and call the appropriate AGESA/CIMx resume functions. - */ -#if CONFIG_HAVE_ACPI_RESUME - acpi_slp_type = acpi_get_sleep_type(); -#endif - /* enable GPP CLK0 thru CLK1 */ /* disable GPP CLK2 thru SLT_GFX_CLK */ u8 *misc_mem_clk_cntrl = (u8 *)(ACPI_MMIO_BASE + MISC_BASE); diff --git a/src/mainboard/amd/thatcher/mainboard.c b/src/mainboard/amd/thatcher/mainboard.c index bfb664f4b3..2eacf76ef8 100644 --- a/src/mainboard/amd/thatcher/mainboard.c +++ b/src/mainboard/amd/thatcher/mainboard.c @@ -51,16 +51,8 @@ static void mainboard_enable(device_t dev) msr.lo &= ~(1 << 23); wrmsr(0xC0011023, msr); - /* - * The mainboard is the first place that we get control in ramstage. Check - * for S3 resume and call the appropriate AGESA/CIMx resume functions. - */ -#if CONFIG_HAVE_ACPI_RESUME - acpi_slp_type = acpi_get_sleep_type(); - if (acpi_slp_type == 3) + if (acpi_is_wakeup_s3()) agesawrapper_fchs3earlyrestore(); - -#endif } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/asrock/imb-a180/mainboard.c b/src/mainboard/asrock/imb-a180/mainboard.c index 3913898b53..cc6d9f8519 100644 --- a/src/mainboard/asrock/imb-a180/mainboard.c +++ b/src/mainboard/asrock/imb-a180/mainboard.c @@ -35,15 +35,9 @@ static void mainboard_enable(device_t dev) { printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); - /* - * The mainboard is the first place that we get control in ramstage. Check - * for S3 resume and call the appropriate AGESA/CIMx resume functions. - */ -#if CONFIG_HAVE_ACPI_RESUME - acpi_slp_type = acpi_get_sleep_type(); - if (acpi_slp_type == 3) + + if (acpi_is_wakeup_s3()) agesawrapper_fchs3earlyrestore(); -#endif } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/asus/f2a85-m/mainboard.c b/src/mainboard/asus/f2a85-m/mainboard.c index c37fd769d7..1a64874064 100644 --- a/src/mainboard/asus/f2a85-m/mainboard.c +++ b/src/mainboard/asus/f2a85-m/mainboard.c @@ -51,16 +51,8 @@ static void mainboard_enable(device_t dev) msr.lo &= ~(1 << 23); wrmsr(0xC0011023, msr); - /* - * The mainboard is the first place that we get control in ramstage. Check - * for S3 resume and call the appropriate AGESA/CIMx resume functions. - */ -#if CONFIG_HAVE_ACPI_RESUME - acpi_slp_type = acpi_get_sleep_type(); - if (acpi_slp_type == 3) + if (acpi_is_wakeup_s3()) agesawrapper_fchs3earlyrestore(); - -#endif } struct chip_operations mainboard_ops = { diff --git a/src/mainboard/gizmosphere/gizmo/mainboard.c b/src/mainboard/gizmosphere/gizmo/mainboard.c index e24b01619f..78bb6fa04d 100755 --- a/src/mainboard/gizmosphere/gizmo/mainboard.c +++ b/src/mainboard/gizmosphere/gizmo/mainboard.c @@ -59,14 +59,6 @@ static void mainboard_enable(device_t dev) { printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); -/* - * The mainboard is the first place that we get control in ramstage. Check - * for S3 resume and call the appropriate AGESA/CIMx resume functions. - */ -#if CONFIG_HAVE_ACPI_RESUME - acpi_slp_type = acpi_get_sleep_type(); -#endif - /* enable GPP CLK0 thru CLK1 */ /* disable GPP CLK2 thru SLT_GFX_CLK */ u8 *misc_mem_clk_cntrl = (u8 *)(ACPI_MMIO_BASE + MISC_BASE); diff --git a/src/mainboard/hp/pavilion_m6_1035dx/mainboard.c b/src/mainboard/hp/pavilion_m6_1035dx/mainboard.c index 60a8a554f7..53c5342579 100644 --- a/src/mainboard/hp/pavilion_m6_1035dx/mainboard.c +++ b/src/mainboard/hp/pavilion_m6_1035dx/mainboard.c @@ -47,16 +47,10 @@ static void mainboard_enable(device_t dev) hudson_configure_gevent_smi(EC_SMI_GEVENT, SMI_MODE_SMI, SMI_LVL_HIGH); hudson_enable_smi_generation(); - /* - * The mainboard is the first place that we get control in ramstage. Check - * for S3 resume and call the appropriate AGESA/CIMx resume functions. - */ -#if CONFIG_HAVE_ACPI_RESUME - acpi_slp_type = acpi_get_sleep_type(); - if (acpi_slp_type == 3) + + if (acpi_is_wakeup_s3()) agesawrapper_fchs3earlyrestore(); else -#endif pavilion_cold_boot_init(); } diff --git a/src/mainboard/jetway/nf81-t56n-lf/mainboard.c b/src/mainboard/jetway/nf81-t56n-lf/mainboard.c index 56f6c43dfb..5f08149b10 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/mainboard.c +++ b/src/mainboard/jetway/nf81-t56n-lf/mainboard.c @@ -157,14 +157,6 @@ static void mainboard_enable(device_t dev) { printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); -/* - * The mainboard is the first place that we get control in ramstage. Check - * for S3 resume and call the appropriate AGESA/CIMx resume functions. - */ -#if CONFIG_HAVE_ACPI_RESUME - acpi_slp_type = acpi_get_sleep_type(); -#endif /* CONFIG_HAVE_ACPI_RESUME */ - /* enable GPP CLK0 thru CLK3 (interleaved) */ /* disable GPP CLK4 thru SLT_GFX_CLK */ u8 *misc_mem_clk_cntrl = (u8 *)(ACPI_MMIO_BASE + MISC_BASE); diff --git a/src/mainboard/lippert/frontrunner-af/mainboard.c b/src/mainboard/lippert/frontrunner-af/mainboard.c index 4e16b3ee0c..f8133583a3 100644 --- a/src/mainboard/lippert/frontrunner-af/mainboard.c +++ b/src/mainboard/lippert/frontrunner-af/mainboard.c @@ -167,14 +167,6 @@ static void mainboard_enable(device_t dev) printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); dev->ops->init = init; -/* - * The mainboard is the first place that we get control in ramstage. Check - * for S3 resume and call the appropriate AGESA/CIMx resume functions. - */ -#if CONFIG_HAVE_ACPI_RESUME - acpi_slp_type = acpi_get_sleep_type(); -#endif - /* enable GPP CLK0 */ /* disable GPP CLK1 thru SLT_GFX_CLK */ u8 *misc_mem_clk_cntrl = (u8 *)(ACPI_MMIO_BASE + MISC_BASE); diff --git a/src/mainboard/lippert/toucan-af/mainboard.c b/src/mainboard/lippert/toucan-af/mainboard.c index 7518203bf7..660893079a 100644 --- a/src/mainboard/lippert/toucan-af/mainboard.c +++ b/src/mainboard/lippert/toucan-af/mainboard.c @@ -134,14 +134,6 @@ static void mainboard_enable(device_t dev) printk(BIOS_INFO, "Mainboard " CONFIG_MAINBOARD_PART_NUMBER " Enable.\n"); dev->ops->init = init; -/* - * The mainboard is the first place that we get control in ramstage. Check - * for S3 resume and call the appropriate AGESA/CIMx resume functions. - */ -#if CONFIG_HAVE_ACPI_RESUME - acpi_slp_type = acpi_get_sleep_type(); -#endif - /* enable GPP CLK0 thru CLK1 */ /* disable GPP CLK2 thru SLT_GFX_CLK */ u8 *misc_mem_clk_cntrl = (u8 *)(ACPI_MMIO_BASE + MISC_BASE); -- cgit v1.2.3