From 737253bf12b4903613233913621ff750cf74d398 Mon Sep 17 00:00:00 2001
From: Jason Schildt <jschildt@gmail.com>
Date: Tue, 25 Oct 2005 21:50:06 +0000
Subject: - See Issue Tracker id-15 "lnxi-patch-15".

git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2078 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
---
 src/mainboard/tyan/s2875/Options.lb | 4 ++--
 src/mainboard/tyan/s2881/Options.lb | 4 ++--
 src/mainboard/tyan/s2882/Options.lb | 4 ++--
 src/mainboard/tyan/s2885/Options.lb | 4 ++--
 src/mainboard/tyan/s2891/Options.lb | 4 ++--
 src/mainboard/tyan/s2892/Options.lb | 4 ++--
 src/mainboard/tyan/s2895/Options.lb | 4 ++--
 src/mainboard/tyan/s4880/Options.lb | 4 ++--
 src/mainboard/tyan/s4882/Options.lb | 4 ++--
 9 files changed, 18 insertions(+), 18 deletions(-)

diff --git a/src/mainboard/tyan/s2875/Options.lb b/src/mainboard/tyan/s2875/Options.lb
index a584d1b436..88a737bf14 100644
--- a/src/mainboard/tyan/s2875/Options.lb
+++ b/src/mainboard/tyan/s2875/Options.lb
@@ -130,10 +130,10 @@ default CONFIG_PCI_ROM_RUN=1
 ##
 ## enable CACHE_AS_RAM specifics
 ##
-default USE_DCACHE_RAM=1
+default USE_DCACHE_RAM=0
 default DCACHE_RAM_BASE=0xcf000
 default DCACHE_RAM_SIZE=0x1000
-default CONFIG_USE_INIT=1
+default CONFIG_USE_INIT=0
 
 ##
 ## Build code to setup a generic IOAPIC
diff --git a/src/mainboard/tyan/s2881/Options.lb b/src/mainboard/tyan/s2881/Options.lb
index 38eb3be4ef..9f59394d39 100644
--- a/src/mainboard/tyan/s2881/Options.lb
+++ b/src/mainboard/tyan/s2881/Options.lb
@@ -130,10 +130,10 @@ default CONFIG_PCI_ROM_RUN=1
 ##
 ## enable CACHE_AS_RAM specifics
 ##
-default USE_DCACHE_RAM=1
+default USE_DCACHE_RAM=0
 default DCACHE_RAM_BASE=0xcf000
 default DCACHE_RAM_SIZE=0x1000
-default CONFIG_USE_INIT=1
+default CONFIG_USE_INIT=0
 
 ##
 ## Build code to setup a generic IOAPIC
diff --git a/src/mainboard/tyan/s2882/Options.lb b/src/mainboard/tyan/s2882/Options.lb
index ffa34c4f08..9e8c5c6602 100644
--- a/src/mainboard/tyan/s2882/Options.lb
+++ b/src/mainboard/tyan/s2882/Options.lb
@@ -130,10 +130,10 @@ default CONFIG_PCI_ROM_RUN=1
 ##
 ## enable CACHE_AS_RAM specifics
 ##
-default USE_DCACHE_RAM=1
+default USE_DCACHE_RAM=0
 default DCACHE_RAM_BASE=0xcf000
 default DCACHE_RAM_SIZE=0x1000
-default CONFIG_USE_INIT=1
+default CONFIG_USE_INIT=0
 
 ##
 ## Build code to setup a generic IOAPIC
diff --git a/src/mainboard/tyan/s2885/Options.lb b/src/mainboard/tyan/s2885/Options.lb
index 79d60a3e3b..99ae422e00 100644
--- a/src/mainboard/tyan/s2885/Options.lb
+++ b/src/mainboard/tyan/s2885/Options.lb
@@ -130,10 +130,10 @@ default CONFIG_PCI_ROM_RUN=1
 ##
 ## enable CACHE_AS_RAM specifics
 ##
-default USE_DCACHE_RAM=1
+default USE_DCACHE_RAM=0
 default DCACHE_RAM_BASE=0xcf000
 default DCACHE_RAM_SIZE=0x1000
-default CONFIG_USE_INIT=1
+default CONFIG_USE_INIT=0
 
 ##
 ## Build code to setup a generic IOAPIC
diff --git a/src/mainboard/tyan/s2891/Options.lb b/src/mainboard/tyan/s2891/Options.lb
index 58b052e33d..80313a1cff 100644
--- a/src/mainboard/tyan/s2891/Options.lb
+++ b/src/mainboard/tyan/s2891/Options.lb
@@ -139,10 +139,10 @@ default K8_E0_MEM_HOLE_SIZEK=0x100000
 ##
 ## enable CACHE_AS_RAM specifics
 ##
-default USE_DCACHE_RAM=1
+default USE_DCACHE_RAM=0
 default DCACHE_RAM_BASE=0xcf000
 default DCACHE_RAM_SIZE=0x1000
-default CONFIG_USE_INIT=1
+default CONFIG_USE_INIT=0
 
 
 ##
diff --git a/src/mainboard/tyan/s2892/Options.lb b/src/mainboard/tyan/s2892/Options.lb
index 8a229a1269..5d860bddae 100644
--- a/src/mainboard/tyan/s2892/Options.lb
+++ b/src/mainboard/tyan/s2892/Options.lb
@@ -139,10 +139,10 @@ default CONFIG_PCI_ROM_RUN=1
 ##
 ## enable CACHE_AS_RAM specifics
 ##
-default USE_DCACHE_RAM=1
+default USE_DCACHE_RAM=0
 default DCACHE_RAM_BASE=0xcf000
 default DCACHE_RAM_SIZE=0x1000
-default CONFIG_USE_INIT=1
+default CONFIG_USE_INIT=0
 
 
 ##
diff --git a/src/mainboard/tyan/s2895/Options.lb b/src/mainboard/tyan/s2895/Options.lb
index fc63823480..261b328781 100644
--- a/src/mainboard/tyan/s2895/Options.lb
+++ b/src/mainboard/tyan/s2895/Options.lb
@@ -136,10 +136,10 @@ default CONFIG_PCI_ROM_RUN=1
 ##
 ## enable CACHE_AS_RAM specifics
 ##
-default USE_DCACHE_RAM=1
+default USE_DCACHE_RAM=0
 default DCACHE_RAM_BASE=0xcf000
 default DCACHE_RAM_SIZE=0x1000
-default CONFIG_USE_INIT=1
+default CONFIG_USE_INIT=0
 
 ##
 ## Build code to setup a generic IOAPIC
diff --git a/src/mainboard/tyan/s4880/Options.lb b/src/mainboard/tyan/s4880/Options.lb
index fc98b83255..502e71e380 100644
--- a/src/mainboard/tyan/s4880/Options.lb
+++ b/src/mainboard/tyan/s4880/Options.lb
@@ -130,10 +130,10 @@ default CONFIG_PCI_ROM_RUN=1
 ##
 ## enable CACHE_AS_RAM specifics
 ##
-default USE_DCACHE_RAM=1
+default USE_DCACHE_RAM=0
 default DCACHE_RAM_BASE=0xcf000
 default DCACHE_RAM_SIZE=0x1000
-default CONFIG_USE_INIT=1
+default CONFIG_USE_INIT=0
 
 ##
 ## Build code to setup a generic IOAPIC
diff --git a/src/mainboard/tyan/s4882/Options.lb b/src/mainboard/tyan/s4882/Options.lb
index 0c5571aa07..2411f0f384 100644
--- a/src/mainboard/tyan/s4882/Options.lb
+++ b/src/mainboard/tyan/s4882/Options.lb
@@ -130,10 +130,10 @@ default CONFIG_PCI_ROM_RUN=1
 ##
 ## enable CACHE_AS_RAM specifics
 ##
-default USE_DCACHE_RAM=1
+default USE_DCACHE_RAM=0
 default DCACHE_RAM_BASE=0xcf000
 default DCACHE_RAM_SIZE=0x1000
-default CONFIG_USE_INIT=1
+default CONFIG_USE_INIT=0
 
 ##
 ## Build code to setup a generic IOAPIC
-- 
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