From 8a1f095e50e068e42d378f47c79467e7b6295b7b Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Wed, 24 Jan 2018 13:14:33 -0800 Subject: mb/google/poppy/variants/nautilus: Update camera power enable GPIOs This change updates the camera power enable GPIOs as per the latest schematics. With this update, since one of the enable GPIOs is using a UART0 pin, set UART0 to PchSerialIoSkipInit in devicetree so that FSP-S does not re-configure the UART0 GPIOs. BUG=b:68964831 Change-Id: I5d9126ed8ca2b714f6276f4d3a24c243d7654774 Signed-off-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/23414 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- src/mainboard/google/poppy/variants/nautilus/devicetree.cb | 2 +- src/mainboard/google/poppy/variants/nautilus/gpio.c | 6 +++--- src/mainboard/google/poppy/variants/nautilus/include/variant/gpio.h | 4 ++++ 3 files changed, 8 insertions(+), 4 deletions(-) diff --git a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb index d408688d39..d5aed6e85b 100644 --- a/src/mainboard/google/poppy/variants/nautilus/devicetree.cb +++ b/src/mainboard/google/poppy/variants/nautilus/devicetree.cb @@ -261,7 +261,7 @@ chip soc/intel/skylake [PchSerialIoIndexI2C5] = PchSerialIoPci, [PchSerialIoIndexSpi0] = PchSerialIoDisabled, [PchSerialIoIndexSpi1] = PchSerialIoDisabled, - [PchSerialIoIndexUart0] = PchSerialIoPci, + [PchSerialIoIndexUart0] = PchSerialIoSkipInit, [PchSerialIoIndexUart1] = PchSerialIoDisabled, [PchSerialIoIndexUart2] = PchSerialIoSkipInit, }" diff --git a/src/mainboard/google/poppy/variants/nautilus/gpio.c b/src/mainboard/google/poppy/variants/nautilus/gpio.c index 2a76fd1e01..fea9da3542 100644 --- a/src/mainboard/google/poppy/variants/nautilus/gpio.c +++ b/src/mainboard/google/poppy/variants/nautilus/gpio.c @@ -127,13 +127,13 @@ static const struct pad_config gpio_table[] = { PAD_CFG_GPI(GPP_C6, 20K_PU, DEEP), /* C7 : SM1DATA ==> NC */ PAD_CFG_NC(GPP_C7), - /* C8 : UART0_RXD ==> NC */ - PAD_CFG_NC(GPP_C8), + /* C8 : UART0_RXD ==> CHP3_P3.3V_DX_WFCAM_EN */ + PAD_CFG_GPO(GPP_C8, 0, DEEP), /* C9 : UART0_TXD ==> CHP3_P3.3V_DX_DIG_EN */ PAD_CFG_GPO(GPP_C9, 0, DEEP), /* C10 : UART0_RTS# ==> CHP3_CAM_PMIC_RST_L */ PAD_CFG_GPO(GPP_C10, 1, DEEP), - /* C11 : UART0_CTS# ==> CHP3_P3.3V_DX_CAM_EN */ + /* C11 : UART0_CTS# ==> CHP3_P3.3V_DX_UFCAM_EN */ PAD_CFG_GPO(GPP_C11, 1, DEEP), /* C12 : UART1_RXD ==> PCH_MEM_CONFIG[0] */ PAD_CFG_GPI(GPP_C12, NONE, DEEP), diff --git a/src/mainboard/google/poppy/variants/nautilus/include/variant/gpio.h b/src/mainboard/google/poppy/variants/nautilus/include/variant/gpio.h index 4f79495e4f..7482e74374 100644 --- a/src/mainboard/google/poppy/variants/nautilus/include/variant/gpio.h +++ b/src/mainboard/google/poppy/variants/nautilus/include/variant/gpio.h @@ -18,4 +18,8 @@ #include +/* Nautilus differs from baseboard in the GPIO used for EN_PP3300_DX_CAM. */ +#undef EN_PP3300_DX_CAM +#define EN_PP3300_DX_CAM GPP_C8 + #endif /* __MAINBOARD_GPIO_H__ */ -- cgit v1.2.3