From 8a64ad09a100adf478d65e42e4cc10a18ccc2d16 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Michael=20Niew=C3=B6hner?= Date: Fri, 2 Oct 2020 19:10:39 +0200 Subject: soc/intel/{skl,cnl}: drop duplicate PM ACPI timer disabling MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit FSP already disables the PM ACPI timer, when EnableTcoTimer=0. Test: clevo/l140cu and supermicro/x11ssm-f have the PM ACPI timer disable bit set when EnableTcoTimer=0. Change-Id: If370d3acf87ae6d1d7c64bf27228877cdd92ab2d Signed-off-by: Michael Niewöhner Reviewed-on: https://review.coreboot.org/c/coreboot/+/45954 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/soc/intel/cannonlake/Kconfig | 1 - src/soc/intel/cannonlake/finalize.c | 13 ------------- src/soc/intel/skylake/Kconfig | 1 - src/soc/intel/skylake/finalize.c | 10 ---------- 4 files changed, 25 deletions(-) diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig index 2b862e7e86..d61435aaa6 100644 --- a/src/soc/intel/cannonlake/Kconfig +++ b/src/soc/intel/cannonlake/Kconfig @@ -98,7 +98,6 @@ config CPU_SPECIFIC_OPTIONS select PLATFORM_USES_FSP2_0 select REG_SCRIPT select PMC_GLOBAL_RESET_ENABLE_LOCK - select PMC_LOW_POWER_MODE_PROGRAM select SOC_INTEL_COMMON select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_BLOCK diff --git a/src/soc/intel/cannonlake/finalize.c b/src/soc/intel/cannonlake/finalize.c index 3fe00ba8cc..8387bb86f7 100644 --- a/src/soc/intel/cannonlake/finalize.c +++ b/src/soc/intel/cannonlake/finalize.c @@ -56,21 +56,8 @@ static void pch_finalize(void) */ pch_thermal_configuration(); - /* - * Disable ACPI PM timer based on dt policy - * - * Disabling ACPI PM timer is necessary for XTAL OSC shutdown. - * Disabling ACPI PM timer also switches off TCO - * - * SA_DEV_ROOT device is used here instead of PCH_DEV_PMC since it is - * just required to get to chip config. PCH_DEV_PMC is hidden by this - * point and hence removed from the root bus. pcidev_path_on_root thus - * returns NULL for PCH_DEV_PMC device. - */ config = config_of_soc(); pmcbase = pmc_mmio_regs(); - if (config->PmTimerDisabled) - pmc_disable_acpi_timer(); if (config->s0ix_enable && config->cppmvric2_adsposcdis) { /* Enable Audio DSP OSC qualification for S0ix */ diff --git a/src/soc/intel/skylake/Kconfig b/src/soc/intel/skylake/Kconfig index 20b302db14..f71beaed52 100644 --- a/src/soc/intel/skylake/Kconfig +++ b/src/soc/intel/skylake/Kconfig @@ -43,7 +43,6 @@ config CPU_SPECIFIC_OPTIONS select REG_SCRIPT select SA_ENABLE_DPR select PMC_GLOBAL_RESET_ENABLE_LOCK - select PMC_LOW_POWER_MODE_PROGRAM select SOC_INTEL_COMMON select SOC_INTEL_COMMON_ACPI_WAKE_SOURCE select SOC_INTEL_COMMON_BLOCK diff --git a/src/soc/intel/skylake/finalize.c b/src/soc/intel/skylake/finalize.c index 6b8576a593..f8b36a48bd 100644 --- a/src/soc/intel/skylake/finalize.c +++ b/src/soc/intel/skylake/finalize.c @@ -62,16 +62,6 @@ static void pch_finalize_script(struct device *dev) */ pch_thermal_configuration(); - /* - * Disable ACPI PM timer based on dt policy - * - * Disabling ACPI PM timer is necessary for XTAL OSC shutdown. - * Disabling ACPI PM timer also switches off TCO - */ - - if (config->PmTimerDisabled) - pmc_disable_acpi_timer(); - /* we should disable Heci1 based on the devicetree policy */ if (config->HeciEnabled == 0) pch_disable_heci(); -- cgit v1.2.3