From 923d200d1656df8ae1d8c79c6f0e1cf014d2ad1f Mon Sep 17 00:00:00 2001 From: Alec Ari Date: Wed, 9 May 2012 19:12:27 -0500 Subject: Unmark source files as executables Change source file modes from 755 to 644 The following files have been grepped for changes: *.c *.h *Kconfig* *Makefile* Change-Id: I275f42ac7c4df894380d0492bca65c16a057376c Signed-off-by: Alec Ari Reviewed-on: http://review.coreboot.org/1023 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/arch/x86/Makefile.inc | 0 src/mainboard/advansus/a785e-i/Makefile.inc | 0 src/mainboard/amd/inagua/Makefile.inc | 0 src/mainboard/amd/tilapia_fam10/Kconfig | 0 src/mainboard/amd/torpedo/Kconfig | 0 src/mainboard/amd/torpedo/Makefile.inc | 0 src/mainboard/supermicro/Kconfig | 0 src/mainboard/supermicro/h8scm_fam10/Kconfig | 0 src/southbridge/amd/cimx/cimx_util.c | 0 src/southbridge/amd/cimx/cimx_util.h | 0 src/southbridge/amd/sb700/Makefile.inc | 0 src/superio/fintek/f71859/Makefile.inc | 0 src/vendorcode/amd/agesa/f10/AGESA.h | 0 src/vendorcode/amd/agesa/f10/AMD.h | 0 src/vendorcode/amd/agesa/f10/Dispatcher.h | 0 src/vendorcode/amd/agesa/f10/Include/AdvancedApi.h | 0 src/vendorcode/amd/agesa/f10/Include/CommonReturns.h | 0 src/vendorcode/amd/agesa/f10/Include/DanubeInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/DragonInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/Filecode.h | 0 src/vendorcode/amd/agesa/f10/Include/GeneralServices.h | 0 src/vendorcode/amd/agesa/f10/Include/GnbInterface.h | 0 src/vendorcode/amd/agesa/f10/Include/GnbInterfaceStub.h | 0 src/vendorcode/amd/agesa/f10/Include/Ids.h | 0 src/vendorcode/amd/agesa/f10/Include/IdsHt.h | 0 src/vendorcode/amd/agesa/f10/Include/LynxInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/MaranelloInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/NileInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionC6Install.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionCpuCacheFlushOnHaltInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionCpuCoreLevelingInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionCpuFeaturesInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionDanubeMicrocodeInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionDmi.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionDmiInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionDragonMicrocodeInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionFamily10h.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionFamily10hBlInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionFamily10hDaInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionFamily10hHyInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionFamily10hInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionFamily10hRbInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionHtAssistInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionHtInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionHwC1eInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionIdsInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionLynxMicrocodeInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionMaranelloMicrocodeInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionMemory.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionMemoryInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionMemoryRecovery.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionMemoryRecoveryInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionMsgBasedC1eInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionMultiSocket.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionMultiSocketInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionNileMicrocodeInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionPreserveMailboxInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionPstate.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionPstateInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionS3ScriptInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionSanMarinoMicrocodeInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionSlit.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionSlitInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionSrat.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionSratInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionTigrisMicrocodeInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionWhea.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionWheaInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/Options.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionsHt.h | 0 src/vendorcode/amd/agesa/f10/Include/OptionsPage.h | 0 src/vendorcode/amd/agesa/f10/Include/PlatformMemoryConfiguration.h | 0 src/vendorcode/amd/agesa/f10/Include/SanMarinoInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/TigrisInstall.h | 0 src/vendorcode/amd/agesa/f10/Include/Topology.h | 0 src/vendorcode/amd/agesa/f10/Include/gcc-intrin.h | 0 src/vendorcode/amd/agesa/f10/Legacy/Proc/Dispatcher.c | 0 src/vendorcode/amd/agesa/f10/Legacy/Proc/agesaCallouts.c | 0 src/vendorcode/amd/agesa/f10/Legacy/Proc/hobTransfer.c | 0 src/vendorcode/amd/agesa/f10/Lib/amdlib.c | 0 src/vendorcode/amd/agesa/f10/Lib/amdlib.h | 0 src/vendorcode/amd/agesa/f10/MainPage.h | 0 src/vendorcode/amd/agesa/f10/Porting.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10MultiLinkPciTables.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PackageType.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PmNbCofVidInit.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PmNbCofVidInit.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PmNbPstateInit.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PmNbPstateInit.h | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/F10SingleLinkPciTables.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlCacheFlushOnHalt.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlEquivalenceTable.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlHtPhyTables.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlLogicalIdTables.c | 0 .../agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlMicrocodePatchTables.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlMsrTables.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlPciTables.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaCacheFlushOnHalt.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaEquivalenceTable.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaHtPhyTables.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaLogicalIdTables.c | 0 .../agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaMicrocodePatchTables.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaMsrTables.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaPciTables.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000086.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000098.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000b6.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCHtPhyTables.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCHwC1e.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCMsrTables.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCPciTables.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCUtilities.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbEquivalenceTable.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbHtPhyTables.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbLogicalIdTables.c | 0 .../agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbMicrocodePatchTables.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbMsrTables.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbPciTables.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevDHtAssist.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevDMsgBasedC1e.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevDUtilities.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyEquivalenceTable.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyHtPhyTables.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyInitEarlyTable.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyLogicalIdTables.c | 0 .../agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyMicrocodePatchTables.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyMsrTables.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyPciTables.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuCommonF10Utilities.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuCommonF10Utilities.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandId.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdAm3.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdAsb2.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdC32.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdFr1207.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdG34.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdS1g3.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdS1g4.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10CacheDefaults.c | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10CacheFlushOnHalt.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Dmi.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10EarlyInit.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10EarlyInit.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10FeatureLeveling.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10FeatureLeveling.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10HtPhyTables.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10MsrTables.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PciTables.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerCheck.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerCheck.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerMgmt.h | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerMgmtSystemTables.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerPlane.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerPlane.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Pstate.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10SoftwareThermal.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10SoftwareThermal.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Utilities.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Utilities.h | 0 .../amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/cpuFamRegisters.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/PreserveMailbox.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/PreserveMailbox.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuC6State.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuC6State.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuCacheFlushOnHalt.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuCacheInit.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuCacheInit.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuCoreLeveling.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuDmi.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuFeatureLeveling.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuFeatures.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuFeatures.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuHtAssist.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuHtAssist.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuHwC1e.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuHwC1e.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuMsgBasedC1e.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuMsgBasedC1e.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuPstateGather.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuPstateLeveling.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuPstateTables.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuPstateTables.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuSlit.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuSrat.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuWhea.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/S3.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/S3.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Table.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/Table.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cahalt.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuApicUtilities.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuApicUtilities.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuBist.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuBrandId.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuEarlyInit.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuEarlyInit.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuEnvInit.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuEventLog.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuFamilyTranslation.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuFamilyTranslation.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuGeneralServices.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuInitEarlyTable.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuLateInit.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuLateInit.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuMicrocodePatch.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPage.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPostInit.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPostInit.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmt.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtMultiSocket.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtMultiSocket.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtSingleSocket.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtSingleSocket.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtSystemTables.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuRegisters.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuServices.h | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuWarmReset.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/heapManager.c | 0 src/vendorcode/amd/agesa/f10/Proc/CPU/heapManager.h | 0 src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitEarly.c | 0 src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitEnv.c | 0 src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitLate.c | 0 src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitMid.c | 0 src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitPost.c | 0 src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitRecovery.c | 0 src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitReset.c | 0 src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitResume.c | 0 src/vendorcode/amd/agesa/f10/Proc/Common/AmdLateRunApTask.c | 0 src/vendorcode/amd/agesa/f10/Proc/Common/AmdS3LateRestore.c | 0 src/vendorcode/amd/agesa/f10/Proc/Common/AmdS3Save.c | 0 src/vendorcode/amd/agesa/f10/Proc/Common/CommonInits.c | 0 src/vendorcode/amd/agesa/f10/Proc/Common/CommonInits.h | 0 src/vendorcode/amd/agesa/f10/Proc/Common/CommonPage.h | 0 src/vendorcode/amd/agesa/f10/Proc/Common/CommonReturns.c | 0 src/vendorcode/amd/agesa/f10/Proc/Common/CreateStruct.c | 0 src/vendorcode/amd/agesa/f10/Proc/Common/CreateStruct.h | 0 src/vendorcode/amd/agesa/f10/Proc/Common/S3RestoreState.c | 0 src/vendorcode/amd/agesa/f10/Proc/Common/S3SaveState.c | 0 src/vendorcode/amd/agesa/f10/Proc/Common/S3SaveState.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbCoherentFam10.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbCoherentFam10.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbFam10.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbNonCoherentFam10.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbNonCoherentFam10.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbOptimizationFam10.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbOptimizationFam10.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbSystemFam10.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbSystemFam10.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbUtilitiesFam10.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbUtilitiesFam10.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatDynamicDiscovery.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatDynamicDiscovery.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatGanging.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatGanging.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatNoncoherent.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatNoncoherent.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatOptimization.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatOptimization.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatRouting.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatRouting.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatSets.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatSublinks.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatSublinks.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatTrafficDistribution.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatTrafficDistribution.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htIds.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbCoherent.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbCoherent.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbNonCoherent.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbNonCoherent.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbOptimization.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbOptimization.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbUtilities.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbUtilities.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htFeat.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htFeat.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph1.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph2.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph3Line.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph3Triangle.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph4Degenerate.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph4FullyConnected.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph4Kite.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph4Line.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph4Square.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph4Star.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph5FullyConnected.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph5TwistedLadder.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph6DoubloonLower.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph6DoubloonUpper.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph6FullyConnected.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph6TwinTriangles.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph6TwistedLadder.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph7FullyConnected.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph7TwistedLadder.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph8DoubloonM.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph8FullyConnected.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph8Ladder.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph8TwinFullyFourWays.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph8TwistedLadder.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htInterface.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htInterface.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htInterfaceCoherent.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htInterfaceCoherent.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htInterfaceGeneral.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htInterfaceGeneral.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htInterfaceNonCoherent.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htInterfaceNonCoherent.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htMain.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htNb.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htNb.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htNbHardwareFam10.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htNotify.c | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htNotify.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htPage.h | 0 src/vendorcode/amd/agesa/f10/Proc/HT/htTopologies.h | 0 src/vendorcode/amd/agesa/f10/Proc/IDS/Control/IdsCtrl.c | 0 src/vendorcode/amd/agesa/f10/Proc/IDS/Control/IdsLib.c | 0 src/vendorcode/amd/agesa/f10/Proc/IDS/Debug/IdsDebug.c | 0 src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/BL/IdsF10BLService.c | 0 src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/BL/IdsF10BLService.h | 0 src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/DA/IdsF10DAService.c | 0 src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/DA/IdsF10DAService.h | 0 src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/HY/IdsF10HYService.c | 0 src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/HY/IdsF10HYService.h | 0 src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/IdsF10AllService.c | 0 src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/IdsF10AllService.h | 0 src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/RB/IdsF10RBService.c | 0 src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/RB/IdsF10RBService.h | 0 src/vendorcode/amd/agesa/f10/Proc/IDS/IdsLib.h | 0 src/vendorcode/amd/agesa/f10/Proc/IDS/IdsPage.h | 0 src/vendorcode/amd/agesa/f10/Proc/IDS/OptionsIds.h | 0 src/vendorcode/amd/agesa/f10/Proc/IDS/Perf/IdsPerf.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/C32/marc32_3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/C32/mauc32_3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/DA/masda2.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/DA/masda3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/DA/mauda3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/DR/mardr2.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/DR/mardr3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/DR/maudr3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/HY/marhy3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/HY/mauhy3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/NI/masNi3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/NI/mauNi3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/ma.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/CHINTLV/mfchi.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/CHINTLV/mfchi.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/CSINTLV/mfcsi.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/CSINTLV/mfcsi.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/DMI/mfDMI.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/ECC/mfecc.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/ECC/mfecc.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/ECC/mfemp.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/EXCLUDIMM/mfdimmexclud.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/IDENDIMM/mfidendimm.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/IDENDIMM/mfidendimm.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/INTLVRN/mfintlvrn.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/INTLVRN/mfintlvrn.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/LVDDR3/mflvddr3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/LVDDR3/mflvddr3.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/MEMCLR/mfmemclr.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/NDINTLV/mfndi.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/NDINTLV/mfndi.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/ODTHERMAL/mfodthermal.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/ODTHERMAL/mfodthermal.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/OLSPARE/mfspr.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/OLSPARE/mfspr.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/PARTRN/mfParallelTraining.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/PARTRN/mfStandardTraining.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/S3/mfs3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/TABLE/mftds.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/C32/mmflowC32.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/DA/mmflowda.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/DR/mmflowdr.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/HY/mmflowhy.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mdef.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/merrhdl.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/minit.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mm.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmConditionalPso.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmEcc.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmExcludeDimm.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmLvDdr3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmMemClr.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmMemRestore.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmNodeInterleave.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmOnlineSpare.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmParallelTraining.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmStandardTraining.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmUmaAlloc.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmflow.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mu.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/muc.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnParTrainc32.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnS3c32.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnS3c32.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnc32.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnc32.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mndctc32.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnflowc32.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnidendimmc32.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnmctc32.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnotc32.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnphyc32.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnprotoc32.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnregc32.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnParTrainDa.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnS3da.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnS3da.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnda.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnda.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mndctda.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnflowda.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnidendimmda.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnmctda.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnotda.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnprotoda.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnregda.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnParTrainDr.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnS3dr.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnS3dr.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mndctdr.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mndr.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mndr.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnflowdr.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnidendimmdr.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnmctdr.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnotdr.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnprotodr.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnregdr.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnParTrainHy.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnS3hy.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnS3hy.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mndcthy.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnflowhy.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnhy.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnhy.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnidendimmhy.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnmcthy.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnothy.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnphyhy.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnprotohy.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnreghy.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/NI/mnNi.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/NI/mnNi.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/NI/mnS3Ni.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/NI/mnS3Ni.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mn.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnS3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mndct.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnfeat.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnflow.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnmct.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnphy.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnreg.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mntrain2.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mntrain3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/C32/mprc32_3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/C32/mpuc32_3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DA/mpsda2.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DA/mpsda3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DA/mpuda3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DR/mprdr2.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DR/mprdr3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DR/mpsdr3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DR/mpudr2.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DR/mpudr3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/HY/mprhy3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/HY/mpshy3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/HY/mpuhy3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/NI/mpsNi3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/NI/mpuNi3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/mp.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR2/mt2.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR2/mt2.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR2/mtot2.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR2/mtot2.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR2/mtspd2.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR2/mtspd2.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mt3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mt3.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtot3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtot3.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtrci3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtrci3.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtsdi3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtsdi3.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtspd3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtspd3.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mttecc3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mttwl3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mt.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mthdi.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttEdgeDetect.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttEdgeDetect.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttdimbt.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttecc.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mtthrc.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttml.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttoptsrc.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttsrc.c | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/ma.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/memPage.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/merrhdl.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/mfParallelTraining.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/mfStandardTraining.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/mfmemclr.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/mfs3.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/mftds.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/mm.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/mn.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/mp.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/mport.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/mt.h | 0 src/vendorcode/amd/agesa/f10/Proc/Mem/mu.h | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/CPU/cpuRecovery.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/CPU/cpuRecovery.h | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/HT/htInitRecovery.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/HT/htInitReset.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnc32.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnc32.h | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnmctc32.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnprotoc32.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DA/mrnda.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DA/mrnda.h | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DA/mrnmctda.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DR/mrndr.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DR/mrndr.h | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DR/mrnmctdr.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrndcthy.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnhy.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnhy.h | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnmcthy.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnprotohy.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/NI/mrnNi.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/NI/mrnNi.h | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrn.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrndct.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrnmct.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrntrain3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrt3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtrci3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtsdi3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtspd3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtspd3.h | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrttwl3.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/mrttpos.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/mrttsrc.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrdef.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrinit.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrm.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrport.h | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrt3.h | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mru.h | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mruc.c | 0 src/vendorcode/amd/agesa/f10/Proc/Recovery/recoveryPage.h | 0 src/vendorcode/amd/agesa/f10/errno.h | 0 src/vendorcode/amd/agesa/f12/AGESA.h | 0 src/vendorcode/amd/agesa/f12/AMD.h | 0 src/vendorcode/amd/agesa/f12/Dispatcher.h | 0 src/vendorcode/amd/agesa/f12/Include/AdvancedApi.h | 0 src/vendorcode/amd/agesa/f12/Include/BrazosInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/CommonReturns.h | 0 src/vendorcode/amd/agesa/f12/Include/DanNiInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/DanubeInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/DevTestInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/DragonInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/Filecode.h | 0 src/vendorcode/amd/agesa/f12/Include/GeneralServices.h | 0 src/vendorcode/amd/agesa/f12/Include/GnbInterface.h | 0 src/vendorcode/amd/agesa/f12/Include/GnbInterfaceStub.h | 0 src/vendorcode/amd/agesa/f12/Include/Ids.h | 0 src/vendorcode/amd/agesa/f12/Include/IdsHt.h | 0 src/vendorcode/amd/agesa/f12/Include/LynxInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/MaranelloInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/NileInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionC6Install.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionCpbInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionCpuCacheFlushOnHaltInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionCpuCoreLevelingInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionCpuFamiliesInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionCpuFeaturesInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionDmi.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionDmiInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionFamily10hInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionFamily12hEarlySample.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionFamily12hInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionFamily14hInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionFamily15hInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionFchInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionGfxRecovery.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionGfxRecoveryInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionGnb.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionGnbInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionHtInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionHwC1eInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionIdsInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionIoCstateInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionL3FeaturesInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionLowPwrPstateInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionMemory.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionMemoryInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionMemoryRecovery.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionMemoryRecoveryInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionMsgBasedC1eInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionMultiSocket.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionMultiSocketInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionPreserveMailboxInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionPstate.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionPstateInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionS3ScriptInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionSlit.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionSlitInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionSrat.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionSratInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionSwC1eInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionWhea.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionWheaInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/Options.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionsHt.h | 0 src/vendorcode/amd/agesa/f12/Include/OptionsPage.h | 0 src/vendorcode/amd/agesa/f12/Include/PlatformInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/PlatformMemoryConfiguration.h | 0 src/vendorcode/amd/agesa/f12/Include/SabineInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/SanMarinoInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/ScorpiusInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/TigrisInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/Topology.h | 0 src/vendorcode/amd/agesa/f12/Include/VirgoInstall.h | 0 src/vendorcode/amd/agesa/f12/Include/gcc-intrin.h | 0 src/vendorcode/amd/agesa/f12/Legacy/Proc/Dispatcher.c | 0 src/vendorcode/amd/agesa/f12/Legacy/Proc/agesaCallouts.c | 0 src/vendorcode/amd/agesa/f12/Legacy/Proc/hobTransfer.c | 0 src/vendorcode/amd/agesa/f12/Lib/amdlib.c | 0 src/vendorcode/amd/agesa/f12/Lib/amdlib.h | 0 src/vendorcode/amd/agesa/f12/Lib/helper.c | 0 src/vendorcode/amd/agesa/f12/MainPage.h | 0 src/vendorcode/amd/agesa/f12/Porting.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10InitEarlyTable.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10IoCstate.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10MultiLinkPciTables.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PackageType.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmAsymBoostInit.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmAsymBoostInit.h | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/F10PmDualPlaneOnlySupport.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/F10PmDualPlaneOnlySupport.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmNbCofVidInit.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmNbCofVidInit.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmNbPstateInit.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmNbPstateInit.h | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/F10SingleLinkPciTables.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlCacheFlushOnHalt.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlEquivalenceTable.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlHtPhyTables.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlLogicalIdTables.c | 0 .../agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlMicrocodePatchTables.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlMsrTables.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlPciTables.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaCacheFlushOnHalt.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaEquivalenceTable.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaHtPhyTables.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaLogicalIdTables.c | 0 .../agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaMicrocodePatchTables.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaMsrTables.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaPciTables.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10RevCHtPhyTables.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10RevCHwC1e.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10RevCMsrTables.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10RevCPciTables.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10RevCSwC1e.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10RevCUtilities.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbEquivalenceTable.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbHtPhyTables.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbLogicalIdTables.c | 0 .../agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbMicrocodePatchTables.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbMsrTables.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbPciTables.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10RevDL3Features.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10RevDMsgBasedC1e.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10RevDUtilities.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyEquivalenceTable.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyHtPhyTables.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyInitEarlyTable.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyLogicalIdTables.c | 0 .../agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyMicrocodePatchTables.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyMsrTables.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyPciTables.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10RevEHtPhyTables.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10RevEMsrTables.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10RevEPciTables.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10RevEUtilities.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevE/PH/F10PhEquivalenceTable.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevE/PH/F10PhHtPhyTables.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/RevE/PH/F10PhLogicalIdTables.c | 0 .../agesa/f12/Proc/CPU/Family/0x10/RevE/PH/F10PhMicrocodePatchTables.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuCommonF10Utilities.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuCommonF10Utilities.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandId.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdAm3.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdAsb2.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdC32.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdFr1207.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdG34.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdS1g3.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdS1g4.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10CacheDefaults.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10CacheFlushOnHalt.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10Cpb.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10Dmi.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10EarlyInit.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10EarlyInit.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10FeatureLeveling.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10FeatureLeveling.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10HtPhyTables.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10MsrTables.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PciTables.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PowerCheck.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PowerCheck.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PowerMgmt.h | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PowerMgmtSystemTables.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PowerPlane.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PowerPlane.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10Pstate.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10SoftwareThermal.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10SoftwareThermal.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10Utilities.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10Utilities.h | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10WorkaroundsTable.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12C6State.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12Cpb.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12IoCstate.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch03000002.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000e.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000f.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12PackageType.h | 0 .../amd/agesa/f12/Proc/CPU/Family/0x12/LN/F12LnEquivalenceTable.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x12/LN/F12LnLogicalIdTables.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x12/LN/F12LnMicrocodePatchTables.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuCommonF12Utilities.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuCommonF12Utilities.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12BrandId.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12BrandIdFm1.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12BrandIdFs1.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12CacheDefaults.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12Dmi.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12EarlyNbPstateInit.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12EarlyNbPstateInit.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12MsrTables.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PciTables.c | 0 .../amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PerCorePciTables.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PowerCheck.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PowerCheck.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PowerMgmt.h | 0 .../amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PowerMgmtSystemTables.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PowerPlane.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PowerPlane.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12Pstate.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12SoftwareThermal.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12SoftwareThermal.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12Utilities.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12Utilities.h | 0 .../amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12WheaInitDataTables.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/cpuFamRegisters.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/PreserveMailbox.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/PreserveMailbox.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuC6State.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuC6State.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuCacheFlushOnHalt.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuCacheInit.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuCacheInit.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuCoreLeveling.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuCpb.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuCpb.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuDmi.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuFeatureLeveling.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuFeatures.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuFeatures.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuHwC1e.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuHwC1e.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuIoCstate.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuIoCstate.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuL3Features.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuL3Features.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuLowPwrPstate.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuLowPwrPstate.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuMsgBasedC1e.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuMsgBasedC1e.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuPstateGather.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuPstateLeveling.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuPstateTables.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuPstateTables.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuSlit.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuSrat.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuSwC1e.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuSwC1e.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuWhea.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/S3.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/S3.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Table.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/Table.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cahalt.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuApicUtilities.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuApicUtilities.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuBist.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuBrandId.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuEarlyInit.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuEarlyInit.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuEnvInit.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuEventLog.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuFamilyTranslation.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuFamilyTranslation.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuGeneralServices.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuInitEarlyTable.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuLateInit.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuLateInit.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuMicrocodePatch.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPage.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPostInit.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPostInit.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPowerMgmt.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPowerMgmtMultiSocket.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPowerMgmtMultiSocket.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPowerMgmtSingleSocket.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPowerMgmtSingleSocket.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPowerMgmtSystemTables.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuRegisters.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuServices.h | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuWarmReset.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/heapManager.c | 0 src/vendorcode/amd/agesa/f12/Proc/CPU/heapManager.h | 0 src/vendorcode/amd/agesa/f12/Proc/Common/AmdFch.h | 0 src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitEarly.c | 0 src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitPost.c | 0 src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitRecovery.c | 0 src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitReset.c | 0 src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitResume.c | 0 src/vendorcode/amd/agesa/f12/Proc/Common/AmdLateRunApTask.c | 0 src/vendorcode/amd/agesa/f12/Proc/Common/AmdS3LateRestore.c | 0 src/vendorcode/amd/agesa/f12/Proc/Common/AmdS3Save.c | 0 src/vendorcode/amd/agesa/f12/Proc/Common/CommonInits.c | 0 src/vendorcode/amd/agesa/f12/Proc/Common/CommonInits.h | 0 src/vendorcode/amd/agesa/f12/Proc/Common/CommonPage.h | 0 src/vendorcode/amd/agesa/f12/Proc/Common/CommonReturns.c | 0 src/vendorcode/amd/agesa/f12/Proc/Common/CreateStruct.c | 0 src/vendorcode/amd/agesa/f12/Proc/Common/CreateStruct.h | 0 src/vendorcode/amd/agesa/f12/Proc/Common/S3RestoreState.c | 0 src/vendorcode/amd/agesa/f12/Proc/Common/S3SaveState.c | 0 src/vendorcode/amd/agesa/f12/Proc/Common/S3SaveState.h | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Azalia/AzaliaEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Azalia/AzaliaLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Azalia/AzaliaMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Azalia/AzaliaReset.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Common/AcpiLib.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Common/AcpiLib.h | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchBiosRamUsage.h | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchCommon.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchCommonCfg.h | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchCommonSmm.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchDef.h | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchLib.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchPeLib.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Common/MemLib.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Common/PciLib.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Fch.h | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/FchPlatform.h | 0 .../amd/agesa/f12/Proc/Fch/Gec/Family/Hudson2/Hudson2GecEnvService.c | 0 .../amd/agesa/f12/Proc/Fch/Gec/Family/Hudson2/Hudson2GecService.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Gec/GecEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Gec/GecLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Gec/GecMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Gec/GecReset.c | 0 .../agesa/f12/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2HwAcpiEnvService.c | 0 .../agesa/f12/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2HwAcpiLateService.c | 0 .../agesa/f12/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2HwAcpiMidService.c | 0 .../amd/agesa/f12/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2SSService.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/HwAcpiEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/HwAcpiLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/HwAcpiMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/HwAcpiReset.c | 0 .../amd/agesa/f12/Proc/Fch/Hwm/Family/Hudson2/Hudson2HwmEnvService.c | 0 .../amd/agesa/f12/Proc/Fch/Hwm/Family/Hudson2/Hudson2HwmLateService.c | 0 .../amd/agesa/f12/Proc/Fch/Hwm/Family/Hudson2/Hudson2HwmMidService.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/HwmEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/HwmLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/HwmMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/HwmReset.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Ide/IdeEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Ide/IdeLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Ide/IdeMid.c | 0 .../amd/agesa/f12/Proc/Fch/Imc/Family/Hudson2/Hudson2ImcService.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/FchEcEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/FchEcLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/FchEcMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/FchEcReset.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcLib.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcReset.c | 0 .../amd/agesa/f12/Proc/Fch/Interface/Family/Hudson2/EnvDefHudson2.c | 0 .../amd/agesa/f12/Proc/Fch/Interface/Family/Hudson2/ResetDefHudson2.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchInitEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchInitLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchInitMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchInitReset.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchInitS3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchTaskLauncher.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchTaskLauncher.h | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/InitEnvDef.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/InitResetDef.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Ir/IrEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Ir/IrLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Ir/IrMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Oem.h | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcib/PcibEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcib/PcibLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcib/PcibMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcib/PcibReset.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/AbEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/AbLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/AbMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/AbReset.c | 0 .../amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2AbEnvService.c | 0 .../amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2AbResetService.c | 0 .../amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2AbService.c | 0 .../amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2GppResetService.c | 0 .../amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2GppService.c | 0 .../amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2PcieEnvService.c | 0 .../amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2PcieService.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/GppEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/GppHp.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/GppLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/GppLib.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/GppMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/GppReset.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/PcieEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/PcieLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/PcieMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/PcieReset.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciLib.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciMid.c | 0 .../amd/agesa/f12/Proc/Fch/Sata/Family/Hudson2/Hudson2SataEnvService.c | 0 .../amd/agesa/f12/Proc/Fch/Sata/Family/Hudson2/Hudson2SataResetService.c | 0 .../amd/agesa/f12/Proc/Fch/Sata/Family/Hudson2/Hudson2SataService.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciLib.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidLib.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataEnvLib.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeLib.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataLib.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataReset.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sd/SdEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sd/SdLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Sd/SdMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcReset.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiReset.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/EhciEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/EhciLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/EhciMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/EhciReset.c | 0 .../amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2EhciEnvService.c | 0 .../amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2EhciLateService.c | 0 .../amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2EhciMidService.c | 0 .../amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2OhciEnvService.c | 0 .../amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2OhciLateService.c | 0 .../amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2OhciMidService.c | 0 .../amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2XhciEnvService.c | 0 .../amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2XhciLateService.c | 0 .../amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2XhciMidService.c | 0 .../amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2XhciResetService.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/OhciEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/OhciLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/OhciMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/OhciReset.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/UsbEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/UsbLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/UsbMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/UsbReset.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/XhciEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/XhciLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/XhciMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/XhciRecovery.c | 0 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/XhciReset.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Common/Gnb.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbFamServices.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbFuseTable.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbGfx.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbGfxFamServices.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbLibFeatures.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbLibFeatures.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbPcie.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbPcieFamServices.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbRegistersLN.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/Family/GfxFamilyServices.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/Family/LN/F12GfxServices.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxConfigData.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxConfigData.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxGmcInit.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxGmcInit.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxInitAtEnvPost.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxInitAtEnvPost.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxInitAtMidPost.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxInitAtMidPost.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxInitAtPost.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxInitAtPost.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxIntegratedInfoTableInit.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxIntegratedInfoTableInit.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxLib.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxLib.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxRegisterAcc.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxRegisterAcc.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxStrapsInit.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxStrapsInit.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/GnbInitAtEarly.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/GnbInitAtEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/GnbInitAtLate.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/GnbInitAtMid.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/GnbInitAtPost.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/GnbInitAtReset.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/GnbPage.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCableSafe/GnbCableSafe.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbCableSafe/GnbCableSafeDefs.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbCommonLib.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLib.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLib.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibStall.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibStall.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbTable.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbTable.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbFamTranslation/GnbPcieTranslation.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxConfig/GfxConfigEnv.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxConfig/GnbGfxConfig.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GfxCardInfo.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GfxCardInfo.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GfxEnumConnectors.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GfxEnumConnectors.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GfxPowerPlayTable.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GfxPowerPlayTable.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GnbGfxInitLibV1.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GnbGfxInitLibV1.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbIommuIvrs/GnbIommuIvrs.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbIommuIvrs/GnbIommuIvrs.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbIvrsLib/GnbIvrsLib.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbIvrsLib/GnbIvrsLib.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbNbInitLibV1/GnbNbInitLibV1.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbNbInitLibV1/GnbNbInitLibV1.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/GnbPcieConfig.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieConfigLib.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieConfigLib.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieMapTopology.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieMapTopology.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/GnbPcieInitLibV1.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspm.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspm.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmBlackList.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmBlackList.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmExitLatency.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmExitLatency.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePhyServices.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePhyServices.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePifServices.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePifServices.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortRegAcc.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortRegAcc.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortServices.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortServices.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePowerMgmt.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePowerMgmt.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSiliconServices.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSiliconServices.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTimer.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTimer.h | 0 .../agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTopologyServices.c | 0 .../agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTopologyServices.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieUtilityLib.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieUtilityLib.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieWrapperRegAcc.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieWrapperRegAcc.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieTrainingV1/GnbPcieTrainingV1.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieTrainingV1/PcieTraining.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieTrainingV1/PcieTraining.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieTrainingV1/PcieWorkarounds.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbPcieTrainingV1/PcieWorkarounds.h | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbSbIommuLib/GnbSbIommuLib.c | 0 .../amd/agesa/f12/Proc/GNB/Modules/GnbSbIommuLib/GnbSbIommuLib.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbSbLib/GnbSbLib.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbSbLib/GnbSbLib.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbSbLib/GnbSbPcie.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbLclkDpm.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbPowerGate.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbPowerGate.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbServices.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbSmu.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbSmuFirmware.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/NbFamilyServices.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbFuseTable.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbFuseTable.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbLclkDpm.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbLclkDpm.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbConfigData.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbConfigData.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInit.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInit.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEarly.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEarly.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEnv.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtLatePost.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtLatePost.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtPost.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtPost.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtReset.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtReset.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbPowerMgmt.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbPowerMgmt.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbSmuLib.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbSmuLib.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieAlib.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieAlibSsdt.h | 0 .../amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieComplexConfig.c | 0 .../amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieComplexServices.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PciePhyServices.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PciePifServices.c | 0 .../amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieWrapperServices.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/LlanoComplexData.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/LlanoDefinitions.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/PcieFamilyServices.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Feature/PciePowerGate.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Feature/PciePowerGate.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInit.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInit.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtEarlyPost.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtEarlyPost.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtEnv.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtEnv.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtLatePost.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtLatePost.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtPost.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtPost.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieLateInit.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieLateInit.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PciePortInit.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PciePortInit.h | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PciePortLateInit.c | 0 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PciePortLateInit.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbCoherentFam10.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbCoherentFam10.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbFam10.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbNonCoherentFam10.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbNonCoherentFam10.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbOptimizationFam10.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbOptimizationFam10.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbSystemFam10.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbSystemFam10.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbUtilitiesFam10.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbUtilitiesFam10.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Fam12/htNbFam12.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Fam12/htNbUtilitiesFam12.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Fam12/htNbUtilitiesFam12.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatDynamicDiscovery.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatDynamicDiscovery.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatGanging.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatGanging.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatNoncoherent.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatNoncoherent.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatOptimization.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatOptimization.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatRouting.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatRouting.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatSets.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatSublinks.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatSublinks.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatTrafficDistribution.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatTrafficDistribution.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htIds.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbCoherent.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbCoherent.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbNonCoherent.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbNonCoherent.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbOptimization.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbOptimization.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbUtilities.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbUtilities.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htFeat.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htFeat.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph1.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph2.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph3Line.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph3Triangle.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph4Degenerate.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph4FullyConnected.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph4Kite.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph4Line.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph4Square.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph4Star.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph5FullyConnected.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph5TwistedLadder.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph6DoubloonLower.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph6DoubloonUpper.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph6FullyConnected.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph6TwinTriangles.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph6TwistedLadder.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph7FullyConnected.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph7TwistedLadder.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph8DoubloonM.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph8FullyConnected.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph8Ladder.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph8TwinFullyFourWays.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph8TwistedLadder.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htInterface.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htInterface.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htInterfaceCoherent.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htInterfaceCoherent.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htInterfaceGeneral.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htInterfaceGeneral.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htInterfaceNonCoherent.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htInterfaceNonCoherent.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htMain.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htNb.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htNb.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htNbCommonHardware.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htNotify.c | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htNotify.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htPage.h | 0 src/vendorcode/amd/agesa/f12/Proc/HT/htTopologies.h | 0 src/vendorcode/amd/agesa/f12/Proc/IDS/IdsLib.h | 0 src/vendorcode/amd/agesa/f12/Proc/IDS/IdsPage.h | 0 src/vendorcode/amd/agesa/f12/Proc/IDS/OptionsIds.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/C32/marc32_3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/C32/mauc32_3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/DA/masda2.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/DA/masda3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/DA/mauda3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/DR/mardr2.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/DR/mardr3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/DR/maudr3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/HY/marhy3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/HY/mauhy3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/LN/masln3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/LN/mauln3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/NI/masNi3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/NI/mauNi3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/PH/masph3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/PH/mauPh3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/RB/masRb3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/RB/mauRb3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/ma.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/CHINTLV/mfchi.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/CHINTLV/mfchi.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/CSINTLV/mfcsi.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/CSINTLV/mfcsi.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/DMI/mfDMI.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/ECC/mfecc.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/ECC/mfecc.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/ECC/mfemp.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/EXCLUDIMM/mfdimmexclud.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/IDENDIMM/mfidendimm.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/IDENDIMM/mfidendimm.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/INTLVRN/mfintlvrn.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/INTLVRN/mfintlvrn.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/LVDDR3/mflvddr3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/LVDDR3/mflvddr3.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/MEMCLR/mfmemclr.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/NDINTLV/mfndi.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/NDINTLV/mfndi.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/ODTHERMAL/mfodthermal.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/ODTHERMAL/mfodthermal.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/OLSPARE/mfspr.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/OLSPARE/mfspr.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/PARTRN/mfParallelTraining.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/PARTRN/mfStandardTraining.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/S3/mfs3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/TABLE/mftds.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/C32/mmflowC32.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/DA/mmflowda.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/DR/mmflowdr.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/HY/mmflowhy.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/LN/mmflowln.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/PH/mmflowPh.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/RB/mmflowRb.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mdef.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/merrhdl.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/minit.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mm.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmConditionalPso.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmEcc.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmExcludeDimm.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmLvDdr3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmMemClr.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmMemRestore.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmNodeInterleave.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmOnlineSpare.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmParallelTraining.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmStandardTraining.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmUmaAlloc.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmflow.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmlvddr3.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mu.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/muc.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnParTrainc32.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnS3c32.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnS3c32.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnc32.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnc32.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mndctc32.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnflowc32.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnidendimmc32.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnmctc32.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnotc32.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnphyc32.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnprotoc32.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnParTrainDa.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnS3da.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnS3da.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnda.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnda.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mndctda.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnflowda.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnidendimmda.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnmctda.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnotda.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnprotoda.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnParTrainDr.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnS3dr.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnS3dr.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mndctdr.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mndr.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mndr.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnflowdr.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnidendimmdr.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnmctdr.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnotdr.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnprotodr.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnParTrainHy.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnS3hy.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnS3hy.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mndcthy.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnflowhy.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnhy.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnhy.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnidendimmhy.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnmcthy.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnothy.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnphyhy.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnprotohy.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnS3ln.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnS3ln.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mndctln.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnflowln.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnidendimmln.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnln.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnln.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnmctln.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnotln.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnphyln.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnprotoln.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/NI/mnNi.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/NI/mnNi.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/NI/mnS3Ni.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/NI/mnS3Ni.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/NI/mnflowNi.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/PH/mnPh.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/PH/mnPh.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/PH/mnS3Ph.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/PH/mnS3Ph.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/PH/mnflowPh.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/PH/mnidendimmPh.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/RB/mnRb.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/RB/mnRb.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/RB/mnS3Rb.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/RB/mnS3Rb.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/RB/mnflowRb.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/RB/mnidendimmRb.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mn.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnS3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mndct.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnfeat.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnflow.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnmct.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnphy.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnreg.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mntrain2.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mntrain3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/C32/mprc32_3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/C32/mpuc32_3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DA/mpsda2.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DA/mpsda3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DA/mpuda3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DR/mprdr2.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DR/mprdr3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DR/mpsdr3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DR/mpudr2.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DR/mpudr3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/HY/mprhy3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/HY/mpshy3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/HY/mpuhy3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/LN/mprln3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/LN/mpsln3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/LN/mpuln3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/NI/mpsNi3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/NI/mpuNi3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/PH/mpsph3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/PH/mpuph3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/RB/mpsRb3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/RB/mpuRb3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mp.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mplribt.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mplrnlr.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mplrnpr.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mpmaxfreq.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mpmr0.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mpodtpat.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mprc10opspd.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mprc2ibt.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mprtt.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mpsao.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR2/mt2.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR2/mt2.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR2/mtot2.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR2/mtot2.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR2/mtspd2.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR2/mtspd2.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mt3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mt3.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtlrdimm3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtlrdimm3.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtot3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtot3.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtrci3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtrci3.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtsdi3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtsdi3.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtspd3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtspd3.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mttecc3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mttwl3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mt.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mthdi.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttEdgeDetect.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttEdgeDetect.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttdimbt.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttecc.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mtthrc.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mtthrcSeedTrain.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttml.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttoptsrc.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttsrc.c | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/ma.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/memPage.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/merrhdl.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/mfParallelTraining.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/mfStandardTraining.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/mfmemclr.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/mfs3.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/mftds.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/mm.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/mn.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/mp.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/mport.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/mt.h | 0 src/vendorcode/amd/agesa/f12/Proc/Mem/mu.h | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/CPU/cpuRecovery.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/CPU/cpuRecovery.h | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/GNB/GnbRecovery.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/GNB/NbInitRecovery.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/GNB/NbInitRecovery.h | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/HT/htInitRecovery.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/HT/htInitReset.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/C32/mrnc32.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/C32/mrnc32.h | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/C32/mrnmctc32.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/C32/mrnprotoc32.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/DA/mrnda.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/DA/mrnda.h | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/DA/mrnmctda.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/DR/mrndr.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/DR/mrndr.h | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/DR/mrnmctdr.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/HY/mrndcthy.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/HY/mrnhy.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/HY/mrnhy.h | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/HY/mrnmcthy.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/HY/mrnprotohy.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/LN/mrndctln.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/LN/mrnln.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/LN/mrnln.h | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/LN/mrnmctln.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/NI/mrnNi.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/NI/mrnNi.h | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/PH/mrnPh.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/PH/mrnPh.h | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/RB/mrnRb.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/RB/mrnRb.h | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/mrn.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/mrndct.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/mrnmct.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/mrntrain3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrp.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrplribt.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrplrnlr.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrplrnpr.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrpmr0.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrpodtpat.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrprc10opspd.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrprc2ibt.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrprtt.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrpsao.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/DDR3/mrt3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/DDR3/mrtrci3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/DDR3/mrtsdi3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/DDR3/mrtspd3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/DDR3/mrtspd3.h | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/DDR3/mrttwl3.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/mrtthrc.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/mrtthrcSeedTrain.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/mrttpos.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/mrttsrc.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mrdef.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mrinit.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mrm.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mrport.h | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mrt3.h | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mru.h | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mruc.c | 0 src/vendorcode/amd/agesa/f12/Proc/Recovery/recoveryPage.h | 0 src/vendorcode/amd/agesa/f12/errno.h | 0 src/vendorcode/amd/cimx/sb900/AcpiLib.c | 0 src/vendorcode/amd/cimx/sb900/AcpiLib.h | 0 src/vendorcode/amd/cimx/sb900/AmdLib.c | 0 src/vendorcode/amd/cimx/sb900/AmdSbLib.c | 0 src/vendorcode/amd/cimx/sb900/AmdSbLib.h | 0 src/vendorcode/amd/cimx/sb900/Azalia.c | 0 src/vendorcode/amd/cimx/sb900/Debug.c | 0 src/vendorcode/amd/cimx/sb900/Dispatcher.c | 0 src/vendorcode/amd/cimx/sb900/Ec.c | 0 src/vendorcode/amd/cimx/sb900/EcFan.h | 0 src/vendorcode/amd/cimx/sb900/EcFanLib.c | 0 src/vendorcode/amd/cimx/sb900/EcFanc.c | 0 src/vendorcode/amd/cimx/sb900/EcLib.c | 0 src/vendorcode/amd/cimx/sb900/Gec.c | 0 src/vendorcode/amd/cimx/sb900/Gpp.c | 0 src/vendorcode/amd/cimx/sb900/GppHp.c | 0 src/vendorcode/amd/cimx/sb900/Hudson-2.h | 0 src/vendorcode/amd/cimx/sb900/Hwm.c | 0 src/vendorcode/amd/cimx/sb900/IoLib.c | 0 src/vendorcode/amd/cimx/sb900/Legacy.c | 0 src/vendorcode/amd/cimx/sb900/MemLib.c | 0 src/vendorcode/amd/cimx/sb900/Oem.h | 0 src/vendorcode/amd/cimx/sb900/PciLib.c | 0 src/vendorcode/amd/cimx/sb900/Pmio2Lib.c | 0 src/vendorcode/amd/cimx/sb900/PmioLib.c | 0 src/vendorcode/amd/cimx/sb900/Sata.c | 0 src/vendorcode/amd/cimx/sb900/SbBiosRamUsage.h | 0 src/vendorcode/amd/cimx/sb900/SbCmn.c | 0 src/vendorcode/amd/cimx/sb900/SbDef.h | 0 src/vendorcode/amd/cimx/sb900/SbMain.c | 0 src/vendorcode/amd/cimx/sb900/SbModInf.c | 0 src/vendorcode/amd/cimx/sb900/SbPeLib.c | 0 src/vendorcode/amd/cimx/sb900/SbPor.c | 0 src/vendorcode/amd/cimx/sb900/SbSubFun.h | 0 src/vendorcode/amd/cimx/sb900/SbType.h | 0 src/vendorcode/amd/cimx/sb900/Smm.c | 0 src/vendorcode/amd/cimx/sb900/Usb.c | 0 1627 files changed, 0 insertions(+), 0 deletions(-) mode change 100755 => 100644 src/arch/x86/Makefile.inc mode change 100755 => 100644 src/mainboard/advansus/a785e-i/Makefile.inc mode change 100755 => 100644 src/mainboard/amd/inagua/Makefile.inc mode change 100755 => 100644 src/mainboard/amd/tilapia_fam10/Kconfig mode change 100755 => 100644 src/mainboard/amd/torpedo/Kconfig mode change 100755 => 100644 src/mainboard/amd/torpedo/Makefile.inc mode change 100755 => 100644 src/mainboard/supermicro/Kconfig mode change 100755 => 100644 src/mainboard/supermicro/h8scm_fam10/Kconfig mode change 100755 => 100644 src/southbridge/amd/cimx/cimx_util.c mode change 100755 => 100644 src/southbridge/amd/cimx/cimx_util.h mode change 100755 => 100644 src/southbridge/amd/sb700/Makefile.inc mode change 100755 => 100644 src/superio/fintek/f71859/Makefile.inc mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/AGESA.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/AMD.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Dispatcher.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/AdvancedApi.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/CommonReturns.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/DanubeInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/DragonInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/Filecode.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/GeneralServices.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/GnbInterface.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/GnbInterfaceStub.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/Ids.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/IdsHt.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/LynxInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/MaranelloInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/NileInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionC6Install.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionCpuCacheFlushOnHaltInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionCpuCoreLevelingInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionCpuFeaturesInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionDanubeMicrocodeInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionDmi.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionDmiInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionDragonMicrocodeInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionFamily10h.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionFamily10hBlInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionFamily10hDaInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionFamily10hHyInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionFamily10hInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionFamily10hRbInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionHtAssistInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionHtInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionHwC1eInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionIdsInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionLynxMicrocodeInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionMaranelloMicrocodeInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionMemory.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionMemoryInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionMemoryRecovery.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionMemoryRecoveryInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionMsgBasedC1eInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionMultiSocket.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionMultiSocketInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionNileMicrocodeInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionPreserveMailboxInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionPstate.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionPstateInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionS3ScriptInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionSanMarinoMicrocodeInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionSlit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionSlitInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionSrat.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionSratInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionTigrisMicrocodeInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionWhea.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionWheaInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/Options.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionsHt.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/OptionsPage.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/PlatformMemoryConfiguration.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/SanMarinoInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/TigrisInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/Topology.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Include/gcc-intrin.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Legacy/Proc/Dispatcher.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Legacy/Proc/agesaCallouts.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Legacy/Proc/hobTransfer.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Lib/amdlib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Lib/amdlib.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/MainPage.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Porting.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10MultiLinkPciTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PackageType.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PmNbCofVidInit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PmNbCofVidInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PmNbPstateInit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PmNbPstateInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10SingleLinkPciTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlCacheFlushOnHalt.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlEquivalenceTable.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlHtPhyTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlLogicalIdTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlMicrocodePatchTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlMsrTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlPciTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaCacheFlushOnHalt.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaEquivalenceTable.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaHtPhyTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaLogicalIdTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaMicrocodePatchTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaMsrTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaPciTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000086.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000098.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000b6.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCHtPhyTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCHwC1e.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCMsrTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCPciTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCUtilities.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbEquivalenceTable.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbHtPhyTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbLogicalIdTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbMicrocodePatchTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbMsrTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbPciTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevDHtAssist.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevDMsgBasedC1e.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevDUtilities.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyEquivalenceTable.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyHtPhyTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyInitEarlyTable.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyLogicalIdTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyMicrocodePatchTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyMsrTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyPciTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuCommonF10Utilities.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuCommonF10Utilities.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandId.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdAm3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdAsb2.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdC32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdFr1207.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdG34.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdS1g3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdS1g4.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10CacheDefaults.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10CacheFlushOnHalt.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Dmi.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10EarlyInit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10EarlyInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10FeatureLeveling.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10FeatureLeveling.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10HtPhyTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10MsrTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PciTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerCheck.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerCheck.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerMgmt.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerMgmtSystemTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerPlane.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerPlane.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Pstate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10SoftwareThermal.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10SoftwareThermal.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Utilities.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Utilities.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Family/cpuFamRegisters.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/PreserveMailbox.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/PreserveMailbox.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuC6State.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuC6State.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuCacheFlushOnHalt.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuCacheInit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuCacheInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuCoreLeveling.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuDmi.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuFeatureLeveling.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuFeatures.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuFeatures.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuHtAssist.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuHtAssist.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuHwC1e.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuHwC1e.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuMsgBasedC1e.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuMsgBasedC1e.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuPstateGather.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuPstateLeveling.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuPstateTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuPstateTables.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuSlit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuSrat.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuWhea.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/S3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/S3.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Table.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/Table.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cahalt.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuApicUtilities.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuApicUtilities.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuBist.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuBrandId.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuEarlyInit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuEarlyInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuEnvInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuEventLog.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuFamilyTranslation.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuFamilyTranslation.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuGeneralServices.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuInitEarlyTable.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuLateInit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuLateInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuMicrocodePatch.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPage.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPostInit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPostInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmt.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtMultiSocket.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtMultiSocket.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtSingleSocket.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtSingleSocket.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtSystemTables.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuRegisters.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuServices.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/cpuWarmReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/heapManager.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/CPU/heapManager.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitEarly.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitPost.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitRecovery.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitResume.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Common/AmdLateRunApTask.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Common/AmdS3LateRestore.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Common/AmdS3Save.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Common/CommonInits.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Common/CommonInits.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Common/CommonPage.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Common/CommonReturns.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Common/CreateStruct.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Common/CreateStruct.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Common/S3RestoreState.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Common/S3SaveState.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Common/S3SaveState.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbCoherentFam10.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbCoherentFam10.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbFam10.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbNonCoherentFam10.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbNonCoherentFam10.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbOptimizationFam10.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbOptimizationFam10.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbSystemFam10.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbSystemFam10.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbUtilitiesFam10.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbUtilitiesFam10.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatDynamicDiscovery.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatDynamicDiscovery.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatGanging.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatGanging.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatNoncoherent.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatNoncoherent.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatOptimization.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatOptimization.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatRouting.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatRouting.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatSets.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatSublinks.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatSublinks.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatTrafficDistribution.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatTrafficDistribution.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/Features/htIds.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbCoherent.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbCoherent.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbNonCoherent.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbNonCoherent.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbOptimization.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbOptimization.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbUtilities.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbUtilities.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htFeat.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htFeat.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph1.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph2.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph3Line.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph3Triangle.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph4Degenerate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph4FullyConnected.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph4Kite.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph4Line.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph4Square.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph4Star.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph5FullyConnected.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph5TwistedLadder.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph6DoubloonLower.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph6DoubloonUpper.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph6FullyConnected.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph6TwinTriangles.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph6TwistedLadder.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph7FullyConnected.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph7TwistedLadder.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph8DoubloonM.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph8FullyConnected.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph8Ladder.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph8TwinFullyFourWays.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph8TwistedLadder.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htInterface.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htInterface.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htInterfaceCoherent.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htInterfaceCoherent.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htInterfaceGeneral.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htInterfaceGeneral.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htInterfaceNonCoherent.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htInterfaceNonCoherent.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htMain.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htNb.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htNb.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htNbHardwareFam10.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htNotify.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htNotify.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htPage.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/HT/htTopologies.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/IDS/Control/IdsCtrl.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/IDS/Control/IdsLib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/IDS/Debug/IdsDebug.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/BL/IdsF10BLService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/BL/IdsF10BLService.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/DA/IdsF10DAService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/DA/IdsF10DAService.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/HY/IdsF10HYService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/HY/IdsF10HYService.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/IdsF10AllService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/IdsF10AllService.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/RB/IdsF10RBService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/RB/IdsF10RBService.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/IDS/IdsLib.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/IDS/IdsPage.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/IDS/OptionsIds.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/IDS/Perf/IdsPerf.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/C32/marc32_3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/C32/mauc32_3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/DA/masda2.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/DA/masda3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/DA/mauda3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/DR/mardr2.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/DR/mardr3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/DR/maudr3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/HY/marhy3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/HY/mauhy3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/NI/masNi3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/NI/mauNi3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/ma.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/CHINTLV/mfchi.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/CHINTLV/mfchi.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/CSINTLV/mfcsi.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/CSINTLV/mfcsi.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/DMI/mfDMI.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/ECC/mfecc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/ECC/mfecc.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/ECC/mfemp.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/EXCLUDIMM/mfdimmexclud.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/IDENDIMM/mfidendimm.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/IDENDIMM/mfidendimm.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/INTLVRN/mfintlvrn.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/INTLVRN/mfintlvrn.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/LVDDR3/mflvddr3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/LVDDR3/mflvddr3.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/MEMCLR/mfmemclr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/NDINTLV/mfndi.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/NDINTLV/mfndi.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/ODTHERMAL/mfodthermal.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/ODTHERMAL/mfodthermal.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/OLSPARE/mfspr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/OLSPARE/mfspr.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/PARTRN/mfParallelTraining.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/PARTRN/mfStandardTraining.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/S3/mfs3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/TABLE/mftds.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/C32/mmflowC32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/DA/mmflowda.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/DR/mmflowdr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/HY/mmflowhy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mdef.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/merrhdl.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/minit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mm.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmConditionalPso.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmEcc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmExcludeDimm.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmLvDdr3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmMemClr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmMemRestore.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmNodeInterleave.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmOnlineSpare.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmParallelTraining.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmStandardTraining.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmUmaAlloc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmflow.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mu.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Main/muc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnParTrainc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnS3c32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnS3c32.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnc32.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mndctc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnflowc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnidendimmc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnmctc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnotc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnphyc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnprotoc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnregc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnParTrainDa.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnS3da.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnS3da.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnda.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnda.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mndctda.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnflowda.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnidendimmda.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnmctda.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnotda.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnprotoda.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnregda.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnParTrainDr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnS3dr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnS3dr.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mndctdr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mndr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mndr.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnflowdr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnidendimmdr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnmctdr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnotdr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnprotodr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnregdr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnParTrainHy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnS3hy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnS3hy.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mndcthy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnflowhy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnhy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnhy.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnidendimmhy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnmcthy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnothy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnphyhy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnprotohy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnreghy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/NI/mnNi.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/NI/mnNi.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/NI/mnS3Ni.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/NI/mnS3Ni.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mn.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnS3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mndct.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnfeat.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnflow.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnmct.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnphy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnreg.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mntrain2.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mntrain3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/C32/mprc32_3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/C32/mpuc32_3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DA/mpsda2.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DA/mpsda3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DA/mpuda3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DR/mprdr2.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DR/mprdr3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DR/mpsdr3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DR/mpudr2.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DR/mpudr3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/HY/mprhy3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/HY/mpshy3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/HY/mpuhy3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/NI/mpsNi3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/NI/mpuNi3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/mp.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR2/mt2.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR2/mt2.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR2/mtot2.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR2/mtot2.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR2/mtspd2.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR2/mtspd2.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mt3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mt3.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtot3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtot3.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtrci3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtrci3.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtsdi3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtsdi3.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtspd3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtspd3.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mttecc3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mttwl3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mt.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mthdi.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttEdgeDetect.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttEdgeDetect.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttdimbt.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttecc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mtthrc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttml.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttoptsrc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttsrc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/ma.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/memPage.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/merrhdl.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/mfParallelTraining.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/mfStandardTraining.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/mfmemclr.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/mfs3.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/mftds.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/mm.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/mn.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/mp.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/mport.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/mt.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Mem/mu.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/CPU/cpuRecovery.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/CPU/cpuRecovery.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/HT/htInitRecovery.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/HT/htInitReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnc32.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnmctc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnprotoc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DA/mrnda.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DA/mrnda.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DA/mrnmctda.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DR/mrndr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DR/mrndr.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DR/mrnmctdr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrndcthy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnhy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnhy.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnmcthy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnprotohy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/NI/mrnNi.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/NI/mrnNi.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrn.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrndct.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrnmct.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrntrain3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrt3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtrci3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtsdi3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtspd3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtspd3.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrttwl3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/mrttpos.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/mrttsrc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrdef.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrinit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrm.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrport.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrt3.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mru.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mruc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/Proc/Recovery/recoveryPage.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f10/errno.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/AGESA.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/AMD.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Dispatcher.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/AdvancedApi.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/BrazosInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/CommonReturns.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/DanNiInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/DanubeInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/DevTestInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/DragonInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/Filecode.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/GeneralServices.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/GnbInterface.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/GnbInterfaceStub.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/Ids.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/IdsHt.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/LynxInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/MaranelloInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/NileInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionC6Install.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionCpbInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionCpuCacheFlushOnHaltInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionCpuCoreLevelingInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionCpuFamiliesInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionCpuFeaturesInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionDmi.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionDmiInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionFamily10hInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionFamily12hEarlySample.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionFamily12hInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionFamily14hInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionFamily15hInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionFchInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionGfxRecovery.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionGfxRecoveryInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionGnb.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionGnbInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionHtInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionHwC1eInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionIdsInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionIoCstateInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionL3FeaturesInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionLowPwrPstateInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionMemory.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionMemoryInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionMemoryRecovery.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionMemoryRecoveryInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionMsgBasedC1eInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionMultiSocket.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionMultiSocketInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionPreserveMailboxInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionPstate.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionPstateInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionS3ScriptInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionSlit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionSlitInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionSrat.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionSratInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionSwC1eInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionWhea.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionWheaInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/Options.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionsHt.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/OptionsPage.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/PlatformInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/PlatformMemoryConfiguration.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/SabineInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/SanMarinoInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/ScorpiusInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/TigrisInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/Topology.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/VirgoInstall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Include/gcc-intrin.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Legacy/Proc/Dispatcher.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Legacy/Proc/agesaCallouts.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Legacy/Proc/hobTransfer.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Lib/amdlib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Lib/amdlib.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Lib/helper.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/MainPage.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Porting.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10InitEarlyTable.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10IoCstate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10MultiLinkPciTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PackageType.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmAsymBoostInit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmAsymBoostInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmDualPlaneOnlySupport.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmDualPlaneOnlySupport.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmNbCofVidInit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmNbCofVidInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmNbPstateInit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmNbPstateInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10SingleLinkPciTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlCacheFlushOnHalt.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlEquivalenceTable.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlHtPhyTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlLogicalIdTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlMicrocodePatchTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlMsrTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlPciTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaCacheFlushOnHalt.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaEquivalenceTable.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaHtPhyTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaLogicalIdTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaMicrocodePatchTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaMsrTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaPciTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10RevCHtPhyTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10RevCHwC1e.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10RevCMsrTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10RevCPciTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10RevCSwC1e.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10RevCUtilities.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbEquivalenceTable.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbHtPhyTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbLogicalIdTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbMicrocodePatchTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbMsrTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbPciTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10RevDL3Features.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10RevDMsgBasedC1e.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10RevDUtilities.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyEquivalenceTable.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyHtPhyTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyInitEarlyTable.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyLogicalIdTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyMicrocodePatchTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyMsrTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyPciTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10RevEHtPhyTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10RevEMsrTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10RevEPciTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10RevEUtilities.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/PH/F10PhEquivalenceTable.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/PH/F10PhHtPhyTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/PH/F10PhLogicalIdTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/PH/F10PhMicrocodePatchTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuCommonF10Utilities.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuCommonF10Utilities.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandId.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdAm3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdAsb2.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdC32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdFr1207.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdG34.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdS1g3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdS1g4.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10CacheDefaults.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10CacheFlushOnHalt.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10Cpb.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10Dmi.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10EarlyInit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10EarlyInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10FeatureLeveling.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10FeatureLeveling.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10HtPhyTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10MsrTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PciTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PowerCheck.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PowerCheck.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PowerMgmt.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PowerMgmtSystemTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PowerPlane.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PowerPlane.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10Pstate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10SoftwareThermal.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10SoftwareThermal.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10Utilities.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10Utilities.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10WorkaroundsTable.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12C6State.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12Cpb.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12IoCstate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch03000002.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000e.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000f.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12PackageType.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/LN/F12LnEquivalenceTable.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/LN/F12LnLogicalIdTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/LN/F12LnMicrocodePatchTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuCommonF12Utilities.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuCommonF12Utilities.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12BrandId.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12BrandIdFm1.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12BrandIdFs1.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12CacheDefaults.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12Dmi.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12EarlyNbPstateInit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12EarlyNbPstateInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12MsrTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PciTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PerCorePciTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PowerCheck.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PowerCheck.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PowerMgmt.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PowerMgmtSystemTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PowerPlane.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PowerPlane.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12Pstate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12SoftwareThermal.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12SoftwareThermal.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12Utilities.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12Utilities.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12WheaInitDataTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Family/cpuFamRegisters.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/PreserveMailbox.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/PreserveMailbox.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuC6State.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuC6State.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuCacheFlushOnHalt.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuCacheInit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuCacheInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuCoreLeveling.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuCpb.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuCpb.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuDmi.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuFeatureLeveling.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuFeatures.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuFeatures.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuHwC1e.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuHwC1e.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuIoCstate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuIoCstate.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuL3Features.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuL3Features.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuLowPwrPstate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuLowPwrPstate.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuMsgBasedC1e.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuMsgBasedC1e.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuPstateGather.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuPstateLeveling.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuPstateTables.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuPstateTables.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuSlit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuSrat.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuSwC1e.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuSwC1e.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuWhea.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/S3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/S3.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Table.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/Table.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cahalt.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuApicUtilities.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuApicUtilities.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuBist.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuBrandId.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuEarlyInit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuEarlyInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuEnvInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuEventLog.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuFamilyTranslation.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuFamilyTranslation.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuGeneralServices.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuInitEarlyTable.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuLateInit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuLateInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuMicrocodePatch.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPage.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPostInit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPostInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPowerMgmt.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPowerMgmtMultiSocket.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPowerMgmtMultiSocket.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPowerMgmtSingleSocket.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPowerMgmtSingleSocket.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPowerMgmtSystemTables.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuRegisters.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuServices.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/cpuWarmReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/heapManager.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/CPU/heapManager.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Common/AmdFch.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitEarly.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitPost.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitRecovery.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitResume.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Common/AmdLateRunApTask.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Common/AmdS3LateRestore.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Common/AmdS3Save.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Common/CommonInits.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Common/CommonInits.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Common/CommonPage.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Common/CommonReturns.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Common/CreateStruct.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Common/CreateStruct.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Common/S3RestoreState.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Common/S3SaveState.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Common/S3SaveState.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Azalia/AzaliaEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Azalia/AzaliaLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Azalia/AzaliaMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Azalia/AzaliaReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Common/AcpiLib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Common/AcpiLib.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchBiosRamUsage.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchCommon.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchCommonCfg.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchCommonSmm.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchDef.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchLib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchPeLib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Common/MemLib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Common/PciLib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Fch.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/FchPlatform.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Gec/Family/Hudson2/Hudson2GecEnvService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Gec/Family/Hudson2/Hudson2GecService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Gec/GecEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Gec/GecLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Gec/GecMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Gec/GecReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2HwAcpiEnvService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2HwAcpiLateService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2HwAcpiMidService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2SSService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/HwAcpiEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/HwAcpiLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/HwAcpiMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/HwAcpiReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/Family/Hudson2/Hudson2HwmEnvService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/Family/Hudson2/Hudson2HwmLateService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/Family/Hudson2/Hudson2HwmMidService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/HwmEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/HwmLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/HwmMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/HwmReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Ide/IdeEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Ide/IdeLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Ide/IdeMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/Family/Hudson2/Hudson2ImcService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/FchEcEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/FchEcLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/FchEcMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/FchEcReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcLib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/Family/Hudson2/EnvDefHudson2.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/Family/Hudson2/ResetDefHudson2.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchInitEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchInitLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchInitMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchInitReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchInitS3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchTaskLauncher.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchTaskLauncher.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/InitEnvDef.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/InitResetDef.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Ir/IrEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Ir/IrLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Ir/IrMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Oem.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcib/PcibEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcib/PcibLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcib/PcibMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcib/PcibReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/AbEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/AbLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/AbMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/AbReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2AbEnvService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2AbResetService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2AbService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2GppResetService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2GppService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2PcieEnvService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2PcieService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/GppEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/GppHp.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/GppLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/GppLib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/GppMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/GppReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/PcieEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/PcieLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/PcieMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/PcieReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciLib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Family/Hudson2/Hudson2SataEnvService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Family/Hudson2/Hudson2SataResetService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Family/Hudson2/Hudson2SataService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciLib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidLib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataEnvLib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeLib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataLib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sd/SdEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sd/SdLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Sd/SdMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/EhciEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/EhciLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/EhciMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/EhciReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2EhciEnvService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2EhciLateService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2EhciMidService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2OhciEnvService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2OhciLateService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2OhciMidService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2XhciEnvService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2XhciLateService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2XhciMidService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2XhciResetService.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/OhciEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/OhciLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/OhciMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/OhciReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/UsbEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/UsbLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/UsbMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/UsbReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/XhciEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/XhciLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/XhciMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/XhciRecovery.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/XhciReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Common/Gnb.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbFamServices.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbFuseTable.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbGfx.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbGfxFamServices.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbLibFeatures.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbLibFeatures.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbPcie.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbPcieFamServices.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbRegistersLN.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/Family/GfxFamilyServices.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/Family/LN/F12GfxServices.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxConfigData.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxConfigData.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxGmcInit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxGmcInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxInitAtEnvPost.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxInitAtEnvPost.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxInitAtMidPost.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxInitAtMidPost.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxInitAtPost.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxInitAtPost.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxIntegratedInfoTableInit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxIntegratedInfoTableInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxLib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxLib.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxRegisterAcc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxRegisterAcc.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxStrapsInit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxStrapsInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/GnbInitAtEarly.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/GnbInitAtEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/GnbInitAtLate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/GnbInitAtMid.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/GnbInitAtPost.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/GnbInitAtReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/GnbPage.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCableSafe/GnbCableSafe.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCableSafe/GnbCableSafeDefs.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbCommonLib.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLib.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibStall.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibStall.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbTable.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbTable.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbFamTranslation/GnbPcieTranslation.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxConfig/GfxConfigEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxConfig/GnbGfxConfig.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GfxCardInfo.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GfxCardInfo.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GfxEnumConnectors.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GfxEnumConnectors.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GfxPowerPlayTable.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GfxPowerPlayTable.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GnbGfxInitLibV1.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GnbGfxInitLibV1.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbIommuIvrs/GnbIommuIvrs.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbIommuIvrs/GnbIommuIvrs.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbIvrsLib/GnbIvrsLib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbIvrsLib/GnbIvrsLib.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbNbInitLibV1/GnbNbInitLibV1.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbNbInitLibV1/GnbNbInitLibV1.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/GnbPcieConfig.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieConfigLib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieConfigLib.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieMapTopology.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieMapTopology.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/GnbPcieInitLibV1.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspm.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspm.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmBlackList.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmBlackList.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmExitLatency.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmExitLatency.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePhyServices.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePhyServices.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePifServices.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePifServices.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortRegAcc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortRegAcc.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortServices.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortServices.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePowerMgmt.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePowerMgmt.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSiliconServices.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSiliconServices.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTimer.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTimer.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTopologyServices.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTopologyServices.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieUtilityLib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieUtilityLib.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieWrapperRegAcc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieWrapperRegAcc.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieTrainingV1/GnbPcieTrainingV1.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieTrainingV1/PcieTraining.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieTrainingV1/PcieTraining.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieTrainingV1/PcieWorkarounds.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieTrainingV1/PcieWorkarounds.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbSbIommuLib/GnbSbIommuLib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbSbIommuLib/GnbSbIommuLib.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbSbLib/GnbSbLib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbSbLib/GnbSbLib.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbSbLib/GnbSbPcie.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbLclkDpm.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbPowerGate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbPowerGate.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbServices.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbSmu.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbSmuFirmware.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/NbFamilyServices.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbFuseTable.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbFuseTable.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbLclkDpm.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbLclkDpm.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbConfigData.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbConfigData.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEarly.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEarly.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEnv.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtLatePost.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtLatePost.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtPost.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtPost.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtReset.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbPowerMgmt.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbPowerMgmt.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbSmuLib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbSmuLib.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieAlib.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieAlibSsdt.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieComplexConfig.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieComplexServices.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PciePhyServices.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PciePifServices.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieWrapperServices.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/LlanoComplexData.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/LlanoDefinitions.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/PcieFamilyServices.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Feature/PciePowerGate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Feature/PciePowerGate.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtEarlyPost.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtEarlyPost.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtEnv.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtEnv.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtLatePost.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtLatePost.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtPost.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtPost.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieLateInit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieLateInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PciePortInit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PciePortInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PciePortLateInit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PciePortLateInit.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbCoherentFam10.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbCoherentFam10.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbFam10.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbNonCoherentFam10.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbNonCoherentFam10.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbOptimizationFam10.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbOptimizationFam10.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbSystemFam10.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbSystemFam10.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbUtilitiesFam10.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbUtilitiesFam10.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Fam12/htNbFam12.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Fam12/htNbUtilitiesFam12.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Fam12/htNbUtilitiesFam12.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatDynamicDiscovery.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatDynamicDiscovery.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatGanging.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatGanging.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatNoncoherent.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatNoncoherent.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatOptimization.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatOptimization.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatRouting.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatRouting.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatSets.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatSublinks.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatSublinks.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatTrafficDistribution.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatTrafficDistribution.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/Features/htIds.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbCoherent.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbCoherent.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbNonCoherent.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbNonCoherent.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbOptimization.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbOptimization.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbUtilities.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbUtilities.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htFeat.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htFeat.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph1.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph2.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph3Line.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph3Triangle.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph4Degenerate.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph4FullyConnected.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph4Kite.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph4Line.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph4Square.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph4Star.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph5FullyConnected.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph5TwistedLadder.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph6DoubloonLower.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph6DoubloonUpper.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph6FullyConnected.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph6TwinTriangles.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph6TwistedLadder.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph7FullyConnected.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph7TwistedLadder.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph8DoubloonM.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph8FullyConnected.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph8Ladder.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph8TwinFullyFourWays.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph8TwistedLadder.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htInterface.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htInterface.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htInterfaceCoherent.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htInterfaceCoherent.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htInterfaceGeneral.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htInterfaceGeneral.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htInterfaceNonCoherent.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htInterfaceNonCoherent.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htMain.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htNb.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htNb.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htNbCommonHardware.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htNotify.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htNotify.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htPage.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/HT/htTopologies.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/IDS/IdsLib.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/IDS/IdsPage.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/IDS/OptionsIds.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/C32/marc32_3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/C32/mauc32_3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/DA/masda2.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/DA/masda3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/DA/mauda3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/DR/mardr2.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/DR/mardr3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/DR/maudr3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/HY/marhy3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/HY/mauhy3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/LN/masln3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/LN/mauln3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/NI/masNi3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/NI/mauNi3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/PH/masph3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/PH/mauPh3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/RB/masRb3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/RB/mauRb3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/ma.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/CHINTLV/mfchi.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/CHINTLV/mfchi.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/CSINTLV/mfcsi.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/CSINTLV/mfcsi.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/DMI/mfDMI.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/ECC/mfecc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/ECC/mfecc.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/ECC/mfemp.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/EXCLUDIMM/mfdimmexclud.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/IDENDIMM/mfidendimm.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/IDENDIMM/mfidendimm.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/INTLVRN/mfintlvrn.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/INTLVRN/mfintlvrn.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/LVDDR3/mflvddr3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/LVDDR3/mflvddr3.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/MEMCLR/mfmemclr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/NDINTLV/mfndi.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/NDINTLV/mfndi.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/ODTHERMAL/mfodthermal.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/ODTHERMAL/mfodthermal.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/OLSPARE/mfspr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/OLSPARE/mfspr.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/PARTRN/mfParallelTraining.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/PARTRN/mfStandardTraining.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/S3/mfs3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/TABLE/mftds.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/C32/mmflowC32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/DA/mmflowda.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/DR/mmflowdr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/HY/mmflowhy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/LN/mmflowln.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/PH/mmflowPh.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/RB/mmflowRb.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mdef.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/merrhdl.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/minit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mm.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmConditionalPso.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmEcc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmExcludeDimm.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmLvDdr3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmMemClr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmMemRestore.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmNodeInterleave.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmOnlineSpare.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmParallelTraining.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmStandardTraining.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmUmaAlloc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmflow.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmlvddr3.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mu.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Main/muc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnParTrainc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnS3c32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnS3c32.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnc32.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mndctc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnflowc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnidendimmc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnmctc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnotc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnphyc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnprotoc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnParTrainDa.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnS3da.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnS3da.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnda.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnda.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mndctda.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnflowda.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnidendimmda.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnmctda.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnotda.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnprotoda.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnParTrainDr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnS3dr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnS3dr.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mndctdr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mndr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mndr.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnflowdr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnidendimmdr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnmctdr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnotdr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnprotodr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnParTrainHy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnS3hy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnS3hy.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mndcthy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnflowhy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnhy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnhy.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnidendimmhy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnmcthy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnothy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnphyhy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnprotohy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnS3ln.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnS3ln.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mndctln.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnflowln.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnidendimmln.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnln.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnln.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnmctln.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnotln.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnphyln.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnprotoln.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/NI/mnNi.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/NI/mnNi.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/NI/mnS3Ni.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/NI/mnS3Ni.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/NI/mnflowNi.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/PH/mnPh.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/PH/mnPh.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/PH/mnS3Ph.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/PH/mnS3Ph.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/PH/mnflowPh.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/PH/mnidendimmPh.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/RB/mnRb.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/RB/mnRb.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/RB/mnS3Rb.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/RB/mnS3Rb.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/RB/mnflowRb.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/RB/mnidendimmRb.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mn.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnS3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mndct.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnfeat.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnflow.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnmct.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnphy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnreg.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mntrain2.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mntrain3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/C32/mprc32_3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/C32/mpuc32_3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DA/mpsda2.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DA/mpsda3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DA/mpuda3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DR/mprdr2.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DR/mprdr3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DR/mpsdr3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DR/mpudr2.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DR/mpudr3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/HY/mprhy3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/HY/mpshy3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/HY/mpuhy3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/LN/mprln3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/LN/mpsln3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/LN/mpuln3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/NI/mpsNi3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/NI/mpuNi3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/PH/mpsph3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/PH/mpuph3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/RB/mpsRb3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/RB/mpuRb3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mp.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mplribt.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mplrnlr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mplrnpr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mpmaxfreq.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mpmr0.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mpodtpat.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mprc10opspd.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mprc2ibt.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mprtt.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mpsao.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR2/mt2.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR2/mt2.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR2/mtot2.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR2/mtot2.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR2/mtspd2.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR2/mtspd2.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mt3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mt3.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtlrdimm3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtlrdimm3.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtot3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtot3.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtrci3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtrci3.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtsdi3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtsdi3.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtspd3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtspd3.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mttecc3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mttwl3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mt.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mthdi.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttEdgeDetect.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttEdgeDetect.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttdimbt.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttecc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mtthrc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mtthrcSeedTrain.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttml.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttoptsrc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttsrc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/ma.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/memPage.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/merrhdl.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/mfParallelTraining.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/mfStandardTraining.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/mfmemclr.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/mfs3.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/mftds.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/mm.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/mn.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/mp.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/mport.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/mt.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Mem/mu.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/CPU/cpuRecovery.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/CPU/cpuRecovery.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/GNB/GnbRecovery.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/GNB/NbInitRecovery.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/GNB/NbInitRecovery.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/HT/htInitRecovery.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/HT/htInitReset.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/C32/mrnc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/C32/mrnc32.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/C32/mrnmctc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/C32/mrnprotoc32.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/DA/mrnda.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/DA/mrnda.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/DA/mrnmctda.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/DR/mrndr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/DR/mrndr.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/DR/mrnmctdr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/HY/mrndcthy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/HY/mrnhy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/HY/mrnhy.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/HY/mrnmcthy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/HY/mrnprotohy.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/LN/mrndctln.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/LN/mrnln.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/LN/mrnln.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/LN/mrnmctln.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/NI/mrnNi.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/NI/mrnNi.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/PH/mrnPh.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/PH/mrnPh.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/RB/mrnRb.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/RB/mrnRb.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/mrn.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/mrndct.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/mrnmct.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/mrntrain3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrp.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrplribt.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrplrnlr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrplrnpr.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrpmr0.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrpodtpat.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrprc10opspd.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrprc2ibt.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrprtt.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrpsao.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/DDR3/mrt3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/DDR3/mrtrci3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/DDR3/mrtsdi3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/DDR3/mrtspd3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/DDR3/mrtspd3.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/DDR3/mrttwl3.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/mrtthrc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/mrtthrcSeedTrain.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/mrttpos.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/mrttsrc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mrdef.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mrinit.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mrm.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mrport.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mrt3.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mru.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mruc.c mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/Proc/Recovery/recoveryPage.h mode change 100755 => 100644 src/vendorcode/amd/agesa/f12/errno.h mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/AcpiLib.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/AcpiLib.h mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/AmdLib.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/AmdSbLib.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/AmdSbLib.h mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/Azalia.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/Debug.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/Dispatcher.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/Ec.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/EcFan.h mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/EcFanLib.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/EcFanc.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/EcLib.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/Gec.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/Gpp.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/GppHp.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/Hudson-2.h mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/Hwm.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/IoLib.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/Legacy.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/MemLib.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/Oem.h mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/PciLib.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/Pmio2Lib.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/PmioLib.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/Sata.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/SbBiosRamUsage.h mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/SbCmn.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/SbDef.h mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/SbMain.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/SbModInf.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/SbPeLib.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/SbPor.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/SbSubFun.h mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/SbType.h mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/Smm.c mode change 100755 => 100644 src/vendorcode/amd/cimx/sb900/Usb.c diff --git a/src/arch/x86/Makefile.inc b/src/arch/x86/Makefile.inc old mode 100755 new mode 100644 diff --git a/src/mainboard/advansus/a785e-i/Makefile.inc b/src/mainboard/advansus/a785e-i/Makefile.inc old mode 100755 new mode 100644 diff --git a/src/mainboard/amd/inagua/Makefile.inc b/src/mainboard/amd/inagua/Makefile.inc old mode 100755 new mode 100644 diff --git a/src/mainboard/amd/tilapia_fam10/Kconfig b/src/mainboard/amd/tilapia_fam10/Kconfig old mode 100755 new mode 100644 diff --git a/src/mainboard/amd/torpedo/Kconfig b/src/mainboard/amd/torpedo/Kconfig old mode 100755 new mode 100644 diff --git a/src/mainboard/amd/torpedo/Makefile.inc b/src/mainboard/amd/torpedo/Makefile.inc old mode 100755 new mode 100644 diff --git a/src/mainboard/supermicro/Kconfig b/src/mainboard/supermicro/Kconfig old mode 100755 new mode 100644 diff --git a/src/mainboard/supermicro/h8scm_fam10/Kconfig b/src/mainboard/supermicro/h8scm_fam10/Kconfig old mode 100755 new mode 100644 diff --git a/src/southbridge/amd/cimx/cimx_util.c b/src/southbridge/amd/cimx/cimx_util.c old mode 100755 new mode 100644 diff --git a/src/southbridge/amd/cimx/cimx_util.h b/src/southbridge/amd/cimx/cimx_util.h old mode 100755 new mode 100644 diff --git a/src/southbridge/amd/sb700/Makefile.inc b/src/southbridge/amd/sb700/Makefile.inc old mode 100755 new mode 100644 diff --git a/src/superio/fintek/f71859/Makefile.inc b/src/superio/fintek/f71859/Makefile.inc old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/AGESA.h b/src/vendorcode/amd/agesa/f10/AGESA.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/AMD.h b/src/vendorcode/amd/agesa/f10/AMD.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Dispatcher.h b/src/vendorcode/amd/agesa/f10/Dispatcher.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/AdvancedApi.h b/src/vendorcode/amd/agesa/f10/Include/AdvancedApi.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/CommonReturns.h b/src/vendorcode/amd/agesa/f10/Include/CommonReturns.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/DanubeInstall.h b/src/vendorcode/amd/agesa/f10/Include/DanubeInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/DragonInstall.h b/src/vendorcode/amd/agesa/f10/Include/DragonInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/Filecode.h b/src/vendorcode/amd/agesa/f10/Include/Filecode.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/GeneralServices.h b/src/vendorcode/amd/agesa/f10/Include/GeneralServices.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/GnbInterface.h b/src/vendorcode/amd/agesa/f10/Include/GnbInterface.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/GnbInterfaceStub.h b/src/vendorcode/amd/agesa/f10/Include/GnbInterfaceStub.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/Ids.h b/src/vendorcode/amd/agesa/f10/Include/Ids.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/IdsHt.h b/src/vendorcode/amd/agesa/f10/Include/IdsHt.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/LynxInstall.h b/src/vendorcode/amd/agesa/f10/Include/LynxInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/MaranelloInstall.h b/src/vendorcode/amd/agesa/f10/Include/MaranelloInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/NileInstall.h b/src/vendorcode/amd/agesa/f10/Include/NileInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionC6Install.h b/src/vendorcode/amd/agesa/f10/Include/OptionC6Install.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionCpuCacheFlushOnHaltInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionCpuCacheFlushOnHaltInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionCpuCoreLevelingInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionCpuCoreLevelingInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionCpuFeaturesInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionCpuFeaturesInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionDanubeMicrocodeInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionDanubeMicrocodeInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionDmi.h b/src/vendorcode/amd/agesa/f10/Include/OptionDmi.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionDmiInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionDmiInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionDragonMicrocodeInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionDragonMicrocodeInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionFamily10h.h b/src/vendorcode/amd/agesa/f10/Include/OptionFamily10h.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionFamily10hBlInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionFamily10hBlInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionFamily10hDaInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionFamily10hDaInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionFamily10hHyInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionFamily10hHyInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionFamily10hInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionFamily10hInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionFamily10hRbInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionFamily10hRbInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionHtAssistInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionHtAssistInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionHtInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionHtInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionHwC1eInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionHwC1eInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionIdsInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionIdsInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionLynxMicrocodeInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionLynxMicrocodeInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionMaranelloMicrocodeInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionMaranelloMicrocodeInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionMemory.h b/src/vendorcode/amd/agesa/f10/Include/OptionMemory.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionMemoryInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionMemoryInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionMemoryRecovery.h b/src/vendorcode/amd/agesa/f10/Include/OptionMemoryRecovery.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionMemoryRecoveryInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionMemoryRecoveryInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionMsgBasedC1eInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionMsgBasedC1eInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionMultiSocket.h b/src/vendorcode/amd/agesa/f10/Include/OptionMultiSocket.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionMultiSocketInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionMultiSocketInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionNileMicrocodeInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionNileMicrocodeInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionPreserveMailboxInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionPreserveMailboxInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionPstate.h b/src/vendorcode/amd/agesa/f10/Include/OptionPstate.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionPstateInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionPstateInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionS3ScriptInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionS3ScriptInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionSanMarinoMicrocodeInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionSanMarinoMicrocodeInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionSlit.h b/src/vendorcode/amd/agesa/f10/Include/OptionSlit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionSlitInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionSlitInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionSrat.h b/src/vendorcode/amd/agesa/f10/Include/OptionSrat.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionSratInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionSratInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionTigrisMicrocodeInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionTigrisMicrocodeInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionWhea.h b/src/vendorcode/amd/agesa/f10/Include/OptionWhea.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionWheaInstall.h b/src/vendorcode/amd/agesa/f10/Include/OptionWheaInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/Options.h b/src/vendorcode/amd/agesa/f10/Include/Options.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionsHt.h b/src/vendorcode/amd/agesa/f10/Include/OptionsHt.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/OptionsPage.h b/src/vendorcode/amd/agesa/f10/Include/OptionsPage.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/PlatformMemoryConfiguration.h b/src/vendorcode/amd/agesa/f10/Include/PlatformMemoryConfiguration.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/SanMarinoInstall.h b/src/vendorcode/amd/agesa/f10/Include/SanMarinoInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/TigrisInstall.h b/src/vendorcode/amd/agesa/f10/Include/TigrisInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/Topology.h b/src/vendorcode/amd/agesa/f10/Include/Topology.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Include/gcc-intrin.h b/src/vendorcode/amd/agesa/f10/Include/gcc-intrin.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Legacy/Proc/Dispatcher.c b/src/vendorcode/amd/agesa/f10/Legacy/Proc/Dispatcher.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Legacy/Proc/agesaCallouts.c b/src/vendorcode/amd/agesa/f10/Legacy/Proc/agesaCallouts.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Legacy/Proc/hobTransfer.c b/src/vendorcode/amd/agesa/f10/Legacy/Proc/hobTransfer.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Lib/amdlib.c b/src/vendorcode/amd/agesa/f10/Lib/amdlib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Lib/amdlib.h b/src/vendorcode/amd/agesa/f10/Lib/amdlib.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/MainPage.h b/src/vendorcode/amd/agesa/f10/MainPage.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Porting.h b/src/vendorcode/amd/agesa/f10/Porting.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10MultiLinkPciTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10MultiLinkPciTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PackageType.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PackageType.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PmNbCofVidInit.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PmNbCofVidInit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PmNbCofVidInit.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PmNbCofVidInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PmNbPstateInit.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PmNbPstateInit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PmNbPstateInit.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10PmNbPstateInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10SingleLinkPciTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/F10SingleLinkPciTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlCacheFlushOnHalt.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlCacheFlushOnHalt.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlEquivalenceTable.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlEquivalenceTable.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlHtPhyTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlHtPhyTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlLogicalIdTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlLogicalIdTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlMicrocodePatchTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlMicrocodePatchTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlMsrTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlMsrTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlPciTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/BL/F10BlPciTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaCacheFlushOnHalt.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaCacheFlushOnHalt.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaEquivalenceTable.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaEquivalenceTable.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaHtPhyTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaHtPhyTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaLogicalIdTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaLogicalIdTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaMicrocodePatchTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaMicrocodePatchTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaMsrTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaMsrTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaPciTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/DA/F10DaPciTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000086.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000086.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000098.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000098.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000b6.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000b6.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCHtPhyTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCHtPhyTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCHwC1e.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCHwC1e.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCMsrTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCMsrTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCPciTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCPciTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCUtilities.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/F10RevCUtilities.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbEquivalenceTable.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbEquivalenceTable.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbHtPhyTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbHtPhyTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbLogicalIdTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbLogicalIdTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbMicrocodePatchTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbMicrocodePatchTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbMsrTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbMsrTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbPciTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevC/RB/F10RbPciTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevDHtAssist.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevDHtAssist.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevDMsgBasedC1e.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevDMsgBasedC1e.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevDUtilities.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/F10RevDUtilities.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyEquivalenceTable.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyEquivalenceTable.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyHtPhyTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyHtPhyTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyInitEarlyTable.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyInitEarlyTable.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyLogicalIdTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyLogicalIdTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyMicrocodePatchTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyMicrocodePatchTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyMsrTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyMsrTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyPciTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/RevD/HY/F10HyPciTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuCommonF10Utilities.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuCommonF10Utilities.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuCommonF10Utilities.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuCommonF10Utilities.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandId.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandId.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdAm3.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdAm3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdAsb2.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdAsb2.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdC32.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdC32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdFr1207.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdFr1207.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdG34.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdG34.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdS1g3.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdS1g3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdS1g4.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10BrandIdS1g4.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10CacheDefaults.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10CacheDefaults.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10CacheFlushOnHalt.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10CacheFlushOnHalt.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Dmi.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Dmi.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10EarlyInit.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10EarlyInit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10EarlyInit.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10EarlyInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10FeatureLeveling.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10FeatureLeveling.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10FeatureLeveling.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10FeatureLeveling.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10HtPhyTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10HtPhyTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10MsrTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10MsrTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PciTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PciTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerCheck.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerCheck.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerCheck.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerCheck.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerMgmt.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerMgmt.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerMgmtSystemTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerMgmtSystemTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerPlane.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerPlane.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerPlane.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10PowerPlane.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Pstate.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Pstate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10SoftwareThermal.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10SoftwareThermal.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10SoftwareThermal.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10SoftwareThermal.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Utilities.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Utilities.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Utilities.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10Utilities.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/cpuFamRegisters.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/Family/cpuFamRegisters.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/PreserveMailbox.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/PreserveMailbox.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/PreserveMailbox.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/PreserveMailbox.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuC6State.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuC6State.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuC6State.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuC6State.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuCacheFlushOnHalt.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuCacheFlushOnHalt.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuCacheInit.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuCacheInit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuCacheInit.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuCacheInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuCoreLeveling.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuCoreLeveling.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuDmi.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuDmi.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuFeatureLeveling.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuFeatureLeveling.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuFeatures.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuFeatures.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuFeatures.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuFeatures.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuHtAssist.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuHtAssist.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuHtAssist.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuHtAssist.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuHwC1e.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuHwC1e.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuHwC1e.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuHwC1e.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuMsgBasedC1e.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuMsgBasedC1e.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuMsgBasedC1e.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuMsgBasedC1e.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuPstateGather.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuPstateGather.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuPstateLeveling.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuPstateLeveling.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuPstateTables.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuPstateTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuPstateTables.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuPstateTables.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuSlit.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuSlit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuSrat.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuSrat.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuWhea.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Feature/cpuWhea.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/S3.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/S3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/S3.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/S3.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Table.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/Table.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/Table.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/Table.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cahalt.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/cahalt.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuApicUtilities.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuApicUtilities.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuApicUtilities.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuApicUtilities.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuBist.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuBist.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuBrandId.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuBrandId.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuEarlyInit.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuEarlyInit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuEarlyInit.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuEarlyInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuEnvInit.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuEnvInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuEventLog.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuEventLog.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuFamilyTranslation.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuFamilyTranslation.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuFamilyTranslation.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuFamilyTranslation.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuGeneralServices.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuGeneralServices.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuInitEarlyTable.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuInitEarlyTable.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuLateInit.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuLateInit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuLateInit.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuLateInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuMicrocodePatch.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuMicrocodePatch.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPage.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPage.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPostInit.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPostInit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPostInit.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPostInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmt.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmt.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtMultiSocket.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtMultiSocket.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtMultiSocket.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtMultiSocket.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtSingleSocket.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtSingleSocket.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtSingleSocket.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtSingleSocket.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtSystemTables.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuPowerMgmtSystemTables.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuRegisters.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuRegisters.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuServices.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuServices.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuWarmReset.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/cpuWarmReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/heapManager.c b/src/vendorcode/amd/agesa/f10/Proc/CPU/heapManager.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/CPU/heapManager.h b/src/vendorcode/amd/agesa/f10/Proc/CPU/heapManager.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitEarly.c b/src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitEarly.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitEnv.c b/src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitLate.c b/src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitMid.c b/src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitPost.c b/src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitPost.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitRecovery.c b/src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitRecovery.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitReset.c b/src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitResume.c b/src/vendorcode/amd/agesa/f10/Proc/Common/AmdInitResume.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Common/AmdLateRunApTask.c b/src/vendorcode/amd/agesa/f10/Proc/Common/AmdLateRunApTask.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Common/AmdS3LateRestore.c b/src/vendorcode/amd/agesa/f10/Proc/Common/AmdS3LateRestore.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Common/AmdS3Save.c b/src/vendorcode/amd/agesa/f10/Proc/Common/AmdS3Save.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Common/CommonInits.c b/src/vendorcode/amd/agesa/f10/Proc/Common/CommonInits.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Common/CommonInits.h b/src/vendorcode/amd/agesa/f10/Proc/Common/CommonInits.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Common/CommonPage.h b/src/vendorcode/amd/agesa/f10/Proc/Common/CommonPage.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Common/CommonReturns.c b/src/vendorcode/amd/agesa/f10/Proc/Common/CommonReturns.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Common/CreateStruct.c b/src/vendorcode/amd/agesa/f10/Proc/Common/CreateStruct.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Common/CreateStruct.h b/src/vendorcode/amd/agesa/f10/Proc/Common/CreateStruct.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Common/S3RestoreState.c b/src/vendorcode/amd/agesa/f10/Proc/Common/S3RestoreState.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Common/S3SaveState.c b/src/vendorcode/amd/agesa/f10/Proc/Common/S3SaveState.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Common/S3SaveState.h b/src/vendorcode/amd/agesa/f10/Proc/Common/S3SaveState.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbCoherentFam10.c b/src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbCoherentFam10.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbCoherentFam10.h b/src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbCoherentFam10.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbFam10.c b/src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbFam10.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbNonCoherentFam10.c b/src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbNonCoherentFam10.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbNonCoherentFam10.h b/src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbNonCoherentFam10.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbOptimizationFam10.c b/src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbOptimizationFam10.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbOptimizationFam10.h b/src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbOptimizationFam10.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbSystemFam10.c b/src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbSystemFam10.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbSystemFam10.h b/src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbSystemFam10.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbUtilitiesFam10.c b/src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbUtilitiesFam10.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbUtilitiesFam10.h b/src/vendorcode/amd/agesa/f10/Proc/HT/Fam10/htNbUtilitiesFam10.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatDynamicDiscovery.c b/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatDynamicDiscovery.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatDynamicDiscovery.h b/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatDynamicDiscovery.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatGanging.c b/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatGanging.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatGanging.h b/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatGanging.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatNoncoherent.c b/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatNoncoherent.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatNoncoherent.h b/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatNoncoherent.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatOptimization.c b/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatOptimization.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatOptimization.h b/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatOptimization.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatRouting.c b/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatRouting.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatRouting.h b/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatRouting.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatSets.c b/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatSets.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatSublinks.c b/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatSublinks.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatSublinks.h b/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatSublinks.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatTrafficDistribution.c b/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatTrafficDistribution.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatTrafficDistribution.h b/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htFeatTrafficDistribution.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htIds.c b/src/vendorcode/amd/agesa/f10/Proc/HT/Features/htIds.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbCoherent.c b/src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbCoherent.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbCoherent.h b/src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbCoherent.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbNonCoherent.c b/src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbNonCoherent.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbNonCoherent.h b/src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbNonCoherent.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbOptimization.c b/src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbOptimization.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbOptimization.h b/src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbOptimization.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbUtilities.c b/src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbUtilities.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbUtilities.h b/src/vendorcode/amd/agesa/f10/Proc/HT/NbCommon/htNbUtilities.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htFeat.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htFeat.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htFeat.h b/src/vendorcode/amd/agesa/f10/Proc/HT/htFeat.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph.h b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph1.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph1.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph2.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph2.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph3Line.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph3Line.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph3Triangle.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph3Triangle.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph4Degenerate.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph4Degenerate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph4FullyConnected.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph4FullyConnected.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph4Kite.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph4Kite.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph4Line.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph4Line.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph4Square.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph4Square.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph4Star.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph4Star.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph5FullyConnected.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph5FullyConnected.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph5TwistedLadder.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph5TwistedLadder.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph6DoubloonLower.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph6DoubloonLower.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph6DoubloonUpper.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph6DoubloonUpper.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph6FullyConnected.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph6FullyConnected.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph6TwinTriangles.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph6TwinTriangles.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph6TwistedLadder.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph6TwistedLadder.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph7FullyConnected.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph7FullyConnected.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph7TwistedLadder.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph7TwistedLadder.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph8DoubloonM.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph8DoubloonM.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph8FullyConnected.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph8FullyConnected.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph8Ladder.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph8Ladder.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph8TwinFullyFourWays.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph8TwinFullyFourWays.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph8TwistedLadder.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htGraph/htGraph8TwistedLadder.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htInterface.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htInterface.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htInterface.h b/src/vendorcode/amd/agesa/f10/Proc/HT/htInterface.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htInterfaceCoherent.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htInterfaceCoherent.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htInterfaceCoherent.h b/src/vendorcode/amd/agesa/f10/Proc/HT/htInterfaceCoherent.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htInterfaceGeneral.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htInterfaceGeneral.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htInterfaceGeneral.h b/src/vendorcode/amd/agesa/f10/Proc/HT/htInterfaceGeneral.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htInterfaceNonCoherent.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htInterfaceNonCoherent.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htInterfaceNonCoherent.h b/src/vendorcode/amd/agesa/f10/Proc/HT/htInterfaceNonCoherent.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htMain.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htMain.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htNb.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htNb.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htNb.h b/src/vendorcode/amd/agesa/f10/Proc/HT/htNb.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htNbHardwareFam10.h b/src/vendorcode/amd/agesa/f10/Proc/HT/htNbHardwareFam10.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htNotify.c b/src/vendorcode/amd/agesa/f10/Proc/HT/htNotify.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htNotify.h b/src/vendorcode/amd/agesa/f10/Proc/HT/htNotify.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htPage.h b/src/vendorcode/amd/agesa/f10/Proc/HT/htPage.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/HT/htTopologies.h b/src/vendorcode/amd/agesa/f10/Proc/HT/htTopologies.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/IDS/Control/IdsCtrl.c b/src/vendorcode/amd/agesa/f10/Proc/IDS/Control/IdsCtrl.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/IDS/Control/IdsLib.c b/src/vendorcode/amd/agesa/f10/Proc/IDS/Control/IdsLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/IDS/Debug/IdsDebug.c b/src/vendorcode/amd/agesa/f10/Proc/IDS/Debug/IdsDebug.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/BL/IdsF10BLService.c b/src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/BL/IdsF10BLService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/BL/IdsF10BLService.h b/src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/BL/IdsF10BLService.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/DA/IdsF10DAService.c b/src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/DA/IdsF10DAService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/DA/IdsF10DAService.h b/src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/DA/IdsF10DAService.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/HY/IdsF10HYService.c b/src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/HY/IdsF10HYService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/HY/IdsF10HYService.h b/src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/HY/IdsF10HYService.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/IdsF10AllService.c b/src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/IdsF10AllService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/IdsF10AllService.h b/src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/IdsF10AllService.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/RB/IdsF10RBService.c b/src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/RB/IdsF10RBService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/RB/IdsF10RBService.h b/src/vendorcode/amd/agesa/f10/Proc/IDS/Family/0x10/RB/IdsF10RBService.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/IDS/IdsLib.h b/src/vendorcode/amd/agesa/f10/Proc/IDS/IdsLib.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/IDS/IdsPage.h b/src/vendorcode/amd/agesa/f10/Proc/IDS/IdsPage.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/IDS/OptionsIds.h b/src/vendorcode/amd/agesa/f10/Proc/IDS/OptionsIds.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/IDS/Perf/IdsPerf.c b/src/vendorcode/amd/agesa/f10/Proc/IDS/Perf/IdsPerf.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/C32/marc32_3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/C32/marc32_3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/C32/mauc32_3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/C32/mauc32_3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/DA/masda2.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/DA/masda2.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/DA/masda3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/DA/masda3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/DA/mauda3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/DA/mauda3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/DR/mardr2.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/DR/mardr2.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/DR/mardr3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/DR/mardr3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/DR/maudr3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/DR/maudr3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/HY/marhy3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/HY/marhy3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/HY/mauhy3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/HY/mauhy3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/NI/masNi3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/NI/masNi3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/NI/mauNi3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/NI/mauNi3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/ma.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ardk/ma.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/CHINTLV/mfchi.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/CHINTLV/mfchi.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/CHINTLV/mfchi.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/CHINTLV/mfchi.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/CSINTLV/mfcsi.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/CSINTLV/mfcsi.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/CSINTLV/mfcsi.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/CSINTLV/mfcsi.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/DMI/mfDMI.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/DMI/mfDMI.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/ECC/mfecc.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/ECC/mfecc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/ECC/mfecc.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/ECC/mfecc.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/ECC/mfemp.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/ECC/mfemp.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/EXCLUDIMM/mfdimmexclud.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/EXCLUDIMM/mfdimmexclud.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/IDENDIMM/mfidendimm.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/IDENDIMM/mfidendimm.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/IDENDIMM/mfidendimm.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/IDENDIMM/mfidendimm.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/INTLVRN/mfintlvrn.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/INTLVRN/mfintlvrn.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/INTLVRN/mfintlvrn.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/INTLVRN/mfintlvrn.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/LVDDR3/mflvddr3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/LVDDR3/mflvddr3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/LVDDR3/mflvddr3.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/LVDDR3/mflvddr3.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/MEMCLR/mfmemclr.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/MEMCLR/mfmemclr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/NDINTLV/mfndi.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/NDINTLV/mfndi.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/NDINTLV/mfndi.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/NDINTLV/mfndi.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/ODTHERMAL/mfodthermal.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/ODTHERMAL/mfodthermal.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/ODTHERMAL/mfodthermal.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/ODTHERMAL/mfodthermal.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/OLSPARE/mfspr.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/OLSPARE/mfspr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/OLSPARE/mfspr.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/OLSPARE/mfspr.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/PARTRN/mfParallelTraining.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/PARTRN/mfParallelTraining.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/PARTRN/mfStandardTraining.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/PARTRN/mfStandardTraining.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/S3/mfs3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/S3/mfs3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/TABLE/mftds.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Feat/TABLE/mftds.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/C32/mmflowC32.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/C32/mmflowC32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/DA/mmflowda.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/DA/mmflowda.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/DR/mmflowdr.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/DR/mmflowdr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/HY/mmflowhy.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/HY/mmflowhy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mdef.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mdef.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/merrhdl.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/merrhdl.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/minit.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/minit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mm.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mm.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmConditionalPso.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmConditionalPso.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmEcc.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmEcc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmExcludeDimm.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmExcludeDimm.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmLvDdr3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmLvDdr3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmMemClr.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmMemClr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmMemRestore.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmMemRestore.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmNodeInterleave.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmNodeInterleave.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmOnlineSpare.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmOnlineSpare.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmParallelTraining.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmParallelTraining.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmStandardTraining.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmStandardTraining.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmUmaAlloc.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmUmaAlloc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmflow.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mmflow.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mu.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/mu.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/muc.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Main/muc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnParTrainc32.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnParTrainc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnS3c32.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnS3c32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnS3c32.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnS3c32.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnc32.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnc32.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnc32.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mndctc32.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mndctc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnflowc32.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnflowc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnidendimmc32.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnidendimmc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnmctc32.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnmctc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnotc32.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnotc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnphyc32.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnphyc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnprotoc32.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnprotoc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnregc32.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/C32/mnregc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnParTrainDa.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnParTrainDa.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnS3da.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnS3da.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnS3da.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnS3da.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnda.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnda.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnda.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnda.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mndctda.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mndctda.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnflowda.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnflowda.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnidendimmda.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnidendimmda.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnmctda.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnmctda.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnotda.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnotda.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnprotoda.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnprotoda.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnregda.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DA/mnregda.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnParTrainDr.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnParTrainDr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnS3dr.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnS3dr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnS3dr.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnS3dr.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mndctdr.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mndctdr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mndr.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mndr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mndr.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mndr.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnflowdr.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnflowdr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnidendimmdr.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnidendimmdr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnmctdr.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnmctdr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnotdr.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnotdr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnprotodr.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnprotodr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnregdr.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/DR/mnregdr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnParTrainHy.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnParTrainHy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnS3hy.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnS3hy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnS3hy.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnS3hy.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mndcthy.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mndcthy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnflowhy.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnflowhy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnhy.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnhy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnhy.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnhy.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnidendimmhy.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnidendimmhy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnmcthy.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnmcthy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnothy.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnothy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnphyhy.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnphyhy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnprotohy.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnprotohy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnreghy.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/HY/mnreghy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/NI/mnNi.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/NI/mnNi.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/NI/mnNi.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/NI/mnNi.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/NI/mnS3Ni.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/NI/mnS3Ni.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/NI/mnS3Ni.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/NI/mnS3Ni.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mn.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mn.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnS3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnS3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mndct.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mndct.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnfeat.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnfeat.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnflow.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnflow.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnmct.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnmct.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnphy.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnphy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnreg.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mnreg.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mntrain2.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mntrain2.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mntrain3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/NB/mntrain3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/C32/mprc32_3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/C32/mprc32_3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/C32/mpuc32_3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/C32/mpuc32_3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DA/mpsda2.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DA/mpsda2.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DA/mpsda3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DA/mpsda3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DA/mpuda3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DA/mpuda3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DR/mprdr2.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DR/mprdr2.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DR/mprdr3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DR/mprdr3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DR/mpsdr3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DR/mpsdr3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DR/mpudr2.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DR/mpudr2.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DR/mpudr3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/DR/mpudr3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/HY/mprhy3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/HY/mprhy3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/HY/mpshy3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/HY/mpshy3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/HY/mpuhy3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/HY/mpuhy3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/NI/mpsNi3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/NI/mpsNi3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/NI/mpuNi3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/NI/mpuNi3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/mp.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Ps/mp.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR2/mt2.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR2/mt2.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR2/mt2.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR2/mt2.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR2/mtot2.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR2/mtot2.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR2/mtot2.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR2/mtot2.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR2/mtspd2.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR2/mtspd2.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR2/mtspd2.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR2/mtspd2.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mt3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mt3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mt3.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mt3.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtot3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtot3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtot3.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtot3.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtrci3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtrci3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtrci3.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtrci3.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtsdi3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtsdi3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtsdi3.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtsdi3.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtspd3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtspd3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtspd3.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mtspd3.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mttecc3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mttecc3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mttwl3.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/DDR3/mttwl3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mt.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mt.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mthdi.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mthdi.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttEdgeDetect.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttEdgeDetect.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttEdgeDetect.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttEdgeDetect.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttdimbt.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttdimbt.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttecc.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttecc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mtthrc.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mtthrc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttml.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttml.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttoptsrc.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttoptsrc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttsrc.c b/src/vendorcode/amd/agesa/f10/Proc/Mem/Tech/mttsrc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/ma.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/ma.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/memPage.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/memPage.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/merrhdl.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/merrhdl.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/mfParallelTraining.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/mfParallelTraining.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/mfStandardTraining.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/mfStandardTraining.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/mfmemclr.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/mfmemclr.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/mfs3.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/mfs3.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/mftds.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/mftds.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/mm.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/mm.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/mn.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/mn.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/mp.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/mp.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/mport.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/mport.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/mt.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/mt.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Mem/mu.h b/src/vendorcode/amd/agesa/f10/Proc/Mem/mu.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/CPU/cpuRecovery.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/CPU/cpuRecovery.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/CPU/cpuRecovery.h b/src/vendorcode/amd/agesa/f10/Proc/Recovery/CPU/cpuRecovery.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/HT/htInitRecovery.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/HT/htInitRecovery.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/HT/htInitReset.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/HT/htInitReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnc32.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnc32.h b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnc32.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnmctc32.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnmctc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnprotoc32.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/C32/mrnprotoc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DA/mrnda.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DA/mrnda.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DA/mrnda.h b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DA/mrnda.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DA/mrnmctda.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DA/mrnmctda.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DR/mrndr.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DR/mrndr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DR/mrndr.h b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DR/mrndr.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DR/mrnmctdr.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/DR/mrnmctdr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrndcthy.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrndcthy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnhy.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnhy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnhy.h b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnhy.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnmcthy.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnmcthy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnprotohy.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/HY/mrnprotohy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/NI/mrnNi.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/NI/mrnNi.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/NI/mrnNi.h b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/NI/mrnNi.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrn.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrn.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrndct.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrndct.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrnmct.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrnmct.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrntrain3.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/NB/mrntrain3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrt3.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrt3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtrci3.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtrci3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtsdi3.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtsdi3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtspd3.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtspd3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtspd3.h b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrtspd3.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrttwl3.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/DDR3/mrttwl3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/mrttpos.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/mrttpos.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/mrttsrc.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/Tech/mrttsrc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrdef.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrdef.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrinit.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrinit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrm.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrm.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrport.h b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrport.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrt3.h b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mrt3.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mru.h b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mru.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mruc.c b/src/vendorcode/amd/agesa/f10/Proc/Recovery/Mem/mruc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/Proc/Recovery/recoveryPage.h b/src/vendorcode/amd/agesa/f10/Proc/Recovery/recoveryPage.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f10/errno.h b/src/vendorcode/amd/agesa/f10/errno.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/AGESA.h b/src/vendorcode/amd/agesa/f12/AGESA.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/AMD.h b/src/vendorcode/amd/agesa/f12/AMD.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Dispatcher.h b/src/vendorcode/amd/agesa/f12/Dispatcher.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/AdvancedApi.h b/src/vendorcode/amd/agesa/f12/Include/AdvancedApi.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/BrazosInstall.h b/src/vendorcode/amd/agesa/f12/Include/BrazosInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/CommonReturns.h b/src/vendorcode/amd/agesa/f12/Include/CommonReturns.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/DanNiInstall.h b/src/vendorcode/amd/agesa/f12/Include/DanNiInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/DanubeInstall.h b/src/vendorcode/amd/agesa/f12/Include/DanubeInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/DevTestInstall.h b/src/vendorcode/amd/agesa/f12/Include/DevTestInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/DragonInstall.h b/src/vendorcode/amd/agesa/f12/Include/DragonInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/Filecode.h b/src/vendorcode/amd/agesa/f12/Include/Filecode.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/GeneralServices.h b/src/vendorcode/amd/agesa/f12/Include/GeneralServices.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/GnbInterface.h b/src/vendorcode/amd/agesa/f12/Include/GnbInterface.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/GnbInterfaceStub.h b/src/vendorcode/amd/agesa/f12/Include/GnbInterfaceStub.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/Ids.h b/src/vendorcode/amd/agesa/f12/Include/Ids.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/IdsHt.h b/src/vendorcode/amd/agesa/f12/Include/IdsHt.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/LynxInstall.h b/src/vendorcode/amd/agesa/f12/Include/LynxInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/MaranelloInstall.h b/src/vendorcode/amd/agesa/f12/Include/MaranelloInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/NileInstall.h b/src/vendorcode/amd/agesa/f12/Include/NileInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionC6Install.h b/src/vendorcode/amd/agesa/f12/Include/OptionC6Install.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionCpbInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionCpbInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionCpuCacheFlushOnHaltInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionCpuCacheFlushOnHaltInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionCpuCoreLevelingInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionCpuCoreLevelingInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionCpuFamiliesInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionCpuFamiliesInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionCpuFeaturesInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionCpuFeaturesInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionDmi.h b/src/vendorcode/amd/agesa/f12/Include/OptionDmi.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionDmiInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionDmiInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionFamily10hInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionFamily10hInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionFamily12hEarlySample.h b/src/vendorcode/amd/agesa/f12/Include/OptionFamily12hEarlySample.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionFamily12hInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionFamily12hInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionFamily14hInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionFamily14hInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionFamily15hInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionFamily15hInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionFchInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionFchInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionGfxRecovery.h b/src/vendorcode/amd/agesa/f12/Include/OptionGfxRecovery.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionGfxRecoveryInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionGfxRecoveryInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionGnb.h b/src/vendorcode/amd/agesa/f12/Include/OptionGnb.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionGnbInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionGnbInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionHtInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionHtInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionHwC1eInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionHwC1eInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionIdsInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionIdsInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionIoCstateInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionIoCstateInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionL3FeaturesInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionL3FeaturesInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionLowPwrPstateInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionLowPwrPstateInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionMemory.h b/src/vendorcode/amd/agesa/f12/Include/OptionMemory.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionMemoryInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionMemoryInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionMemoryRecovery.h b/src/vendorcode/amd/agesa/f12/Include/OptionMemoryRecovery.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionMemoryRecoveryInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionMemoryRecoveryInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionMsgBasedC1eInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionMsgBasedC1eInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionMultiSocket.h b/src/vendorcode/amd/agesa/f12/Include/OptionMultiSocket.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionMultiSocketInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionMultiSocketInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionPreserveMailboxInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionPreserveMailboxInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionPstate.h b/src/vendorcode/amd/agesa/f12/Include/OptionPstate.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionPstateInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionPstateInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionS3ScriptInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionS3ScriptInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionSlit.h b/src/vendorcode/amd/agesa/f12/Include/OptionSlit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionSlitInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionSlitInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionSrat.h b/src/vendorcode/amd/agesa/f12/Include/OptionSrat.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionSratInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionSratInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionSwC1eInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionSwC1eInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionWhea.h b/src/vendorcode/amd/agesa/f12/Include/OptionWhea.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionWheaInstall.h b/src/vendorcode/amd/agesa/f12/Include/OptionWheaInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/Options.h b/src/vendorcode/amd/agesa/f12/Include/Options.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionsHt.h b/src/vendorcode/amd/agesa/f12/Include/OptionsHt.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/OptionsPage.h b/src/vendorcode/amd/agesa/f12/Include/OptionsPage.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/PlatformInstall.h b/src/vendorcode/amd/agesa/f12/Include/PlatformInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/PlatformMemoryConfiguration.h b/src/vendorcode/amd/agesa/f12/Include/PlatformMemoryConfiguration.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/SabineInstall.h b/src/vendorcode/amd/agesa/f12/Include/SabineInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/SanMarinoInstall.h b/src/vendorcode/amd/agesa/f12/Include/SanMarinoInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/ScorpiusInstall.h b/src/vendorcode/amd/agesa/f12/Include/ScorpiusInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/TigrisInstall.h b/src/vendorcode/amd/agesa/f12/Include/TigrisInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/Topology.h b/src/vendorcode/amd/agesa/f12/Include/Topology.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/VirgoInstall.h b/src/vendorcode/amd/agesa/f12/Include/VirgoInstall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Include/gcc-intrin.h b/src/vendorcode/amd/agesa/f12/Include/gcc-intrin.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Legacy/Proc/Dispatcher.c b/src/vendorcode/amd/agesa/f12/Legacy/Proc/Dispatcher.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Legacy/Proc/agesaCallouts.c b/src/vendorcode/amd/agesa/f12/Legacy/Proc/agesaCallouts.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Legacy/Proc/hobTransfer.c b/src/vendorcode/amd/agesa/f12/Legacy/Proc/hobTransfer.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Lib/amdlib.c b/src/vendorcode/amd/agesa/f12/Lib/amdlib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Lib/amdlib.h b/src/vendorcode/amd/agesa/f12/Lib/amdlib.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Lib/helper.c b/src/vendorcode/amd/agesa/f12/Lib/helper.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/MainPage.h b/src/vendorcode/amd/agesa/f12/MainPage.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Porting.h b/src/vendorcode/amd/agesa/f12/Porting.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10InitEarlyTable.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10InitEarlyTable.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10IoCstate.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10IoCstate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10MultiLinkPciTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10MultiLinkPciTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PackageType.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PackageType.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmAsymBoostInit.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmAsymBoostInit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmAsymBoostInit.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmAsymBoostInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmDualPlaneOnlySupport.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmDualPlaneOnlySupport.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmDualPlaneOnlySupport.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmDualPlaneOnlySupport.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmNbCofVidInit.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmNbCofVidInit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmNbCofVidInit.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmNbCofVidInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmNbPstateInit.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmNbPstateInit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmNbPstateInit.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10PmNbPstateInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10SingleLinkPciTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/F10SingleLinkPciTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlCacheFlushOnHalt.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlCacheFlushOnHalt.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlEquivalenceTable.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlEquivalenceTable.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlHtPhyTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlHtPhyTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlLogicalIdTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlLogicalIdTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlMicrocodePatchTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlMicrocodePatchTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlMsrTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlMsrTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlPciTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/BL/F10BlPciTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaCacheFlushOnHalt.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaCacheFlushOnHalt.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaEquivalenceTable.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaEquivalenceTable.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaHtPhyTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaHtPhyTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaLogicalIdTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaLogicalIdTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaMicrocodePatchTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaMicrocodePatchTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaMsrTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaMsrTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaPciTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/DA/F10DaPciTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch01000085.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c6.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c7.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10MicrocodePatch010000c8.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10RevCHtPhyTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10RevCHtPhyTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10RevCHwC1e.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10RevCHwC1e.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10RevCMsrTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10RevCMsrTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10RevCPciTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10RevCPciTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10RevCSwC1e.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10RevCSwC1e.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10RevCUtilities.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/F10RevCUtilities.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbEquivalenceTable.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbEquivalenceTable.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbHtPhyTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbHtPhyTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbLogicalIdTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbLogicalIdTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbMicrocodePatchTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbMicrocodePatchTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbMsrTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbMsrTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbPciTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevC/RB/F10RbPciTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c4.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10MicrocodePatch010000c5.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10RevDL3Features.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10RevDL3Features.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10RevDMsgBasedC1e.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10RevDMsgBasedC1e.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10RevDUtilities.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/F10RevDUtilities.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyEquivalenceTable.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyEquivalenceTable.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyHtPhyTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyHtPhyTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyInitEarlyTable.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyInitEarlyTable.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyLogicalIdTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyLogicalIdTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyMicrocodePatchTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyMicrocodePatchTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyMsrTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyMsrTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyPciTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevD/HY/F10HyPciTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10MicrocodePatch010000bf.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10RevEHtPhyTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10RevEHtPhyTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10RevEMsrTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10RevEMsrTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10RevEPciTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10RevEPciTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10RevEUtilities.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/F10RevEUtilities.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/PH/F10PhEquivalenceTable.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/PH/F10PhEquivalenceTable.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/PH/F10PhHtPhyTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/PH/F10PhHtPhyTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/PH/F10PhLogicalIdTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/PH/F10PhLogicalIdTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/PH/F10PhMicrocodePatchTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/RevE/PH/F10PhMicrocodePatchTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuCommonF10Utilities.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuCommonF10Utilities.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuCommonF10Utilities.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuCommonF10Utilities.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandId.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandId.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdAm3.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdAm3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdAsb2.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdAsb2.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdC32.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdC32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdFr1207.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdFr1207.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdG34.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdG34.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdS1g3.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdS1g3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdS1g4.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10BrandIdS1g4.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10CacheDefaults.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10CacheDefaults.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10CacheFlushOnHalt.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10CacheFlushOnHalt.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10Cpb.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10Cpb.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10Dmi.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10Dmi.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10EarlyInit.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10EarlyInit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10EarlyInit.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10EarlyInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10FeatureLeveling.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10FeatureLeveling.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10FeatureLeveling.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10FeatureLeveling.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10HtPhyTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10HtPhyTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10MsrTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10MsrTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PciTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PciTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PowerCheck.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PowerCheck.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PowerCheck.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PowerCheck.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PowerMgmt.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PowerMgmt.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PowerMgmtSystemTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PowerMgmtSystemTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PowerPlane.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PowerPlane.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PowerPlane.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10PowerPlane.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10Pstate.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10Pstate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10SoftwareThermal.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10SoftwareThermal.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10SoftwareThermal.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10SoftwareThermal.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10Utilities.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10Utilities.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10Utilities.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10Utilities.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10WheaInitDataTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10WorkaroundsTable.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x10/cpuF10WorkaroundsTable.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12C6State.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12C6State.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12Cpb.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12Cpb.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12IoCstate.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12IoCstate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch03000002.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch03000002.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000e.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000e.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000f.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12MicrocodePatch0300000f.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12PackageType.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/F12PackageType.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/LN/F12LnEquivalenceTable.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/LN/F12LnEquivalenceTable.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/LN/F12LnLogicalIdTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/LN/F12LnLogicalIdTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/LN/F12LnMicrocodePatchTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/LN/F12LnMicrocodePatchTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuCommonF12Utilities.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuCommonF12Utilities.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuCommonF12Utilities.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuCommonF12Utilities.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12BrandId.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12BrandId.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12BrandIdFm1.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12BrandIdFm1.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12BrandIdFs1.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12BrandIdFs1.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12CacheDefaults.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12CacheDefaults.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12Dmi.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12Dmi.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12EarlyNbPstateInit.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12EarlyNbPstateInit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12EarlyNbPstateInit.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12EarlyNbPstateInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12MsrTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12MsrTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PciTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PciTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PerCorePciTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PerCorePciTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PowerCheck.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PowerCheck.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PowerCheck.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PowerCheck.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PowerMgmt.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PowerMgmt.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PowerMgmtSystemTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PowerMgmtSystemTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PowerPlane.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PowerPlane.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PowerPlane.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12PowerPlane.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12Pstate.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12Pstate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12SoftwareThermal.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12SoftwareThermal.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12SoftwareThermal.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12SoftwareThermal.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12Utilities.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12Utilities.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12Utilities.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12Utilities.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12WheaInitDataTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/0x12/cpuF12WheaInitDataTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/cpuFamRegisters.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Family/cpuFamRegisters.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/PreserveMailbox.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/PreserveMailbox.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/PreserveMailbox.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/PreserveMailbox.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuC6State.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuC6State.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuC6State.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuC6State.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuCacheFlushOnHalt.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuCacheFlushOnHalt.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuCacheInit.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuCacheInit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuCacheInit.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuCacheInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuCoreLeveling.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuCoreLeveling.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuCpb.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuCpb.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuCpb.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuCpb.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuDmi.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuDmi.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuFeatureLeveling.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuFeatureLeveling.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuFeatures.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuFeatures.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuFeatures.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuFeatures.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuHwC1e.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuHwC1e.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuHwC1e.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuHwC1e.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuIoCstate.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuIoCstate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuIoCstate.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuIoCstate.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuL3Features.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuL3Features.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuL3Features.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuL3Features.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuLowPwrPstate.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuLowPwrPstate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuLowPwrPstate.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuLowPwrPstate.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuMsgBasedC1e.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuMsgBasedC1e.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuMsgBasedC1e.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuMsgBasedC1e.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuPstateGather.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuPstateGather.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuPstateLeveling.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuPstateLeveling.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuPstateTables.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuPstateTables.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuPstateTables.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuPstateTables.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuSlit.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuSlit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuSrat.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuSrat.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuSwC1e.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuSwC1e.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuSwC1e.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuSwC1e.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuWhea.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Feature/cpuWhea.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/S3.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/S3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/S3.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/S3.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Table.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/Table.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/Table.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/Table.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cahalt.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/cahalt.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuApicUtilities.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuApicUtilities.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuApicUtilities.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuApicUtilities.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuBist.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuBist.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuBrandId.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuBrandId.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuEarlyInit.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuEarlyInit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuEarlyInit.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuEarlyInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuEnvInit.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuEnvInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuEventLog.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuEventLog.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuFamilyTranslation.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuFamilyTranslation.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuFamilyTranslation.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuFamilyTranslation.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuGeneralServices.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuGeneralServices.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuInitEarlyTable.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuInitEarlyTable.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuLateInit.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuLateInit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuLateInit.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuLateInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuMicrocodePatch.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuMicrocodePatch.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPage.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPage.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPostInit.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPostInit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPostInit.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPostInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPowerMgmt.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPowerMgmt.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPowerMgmtMultiSocket.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPowerMgmtMultiSocket.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPowerMgmtMultiSocket.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPowerMgmtMultiSocket.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPowerMgmtSingleSocket.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPowerMgmtSingleSocket.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPowerMgmtSingleSocket.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPowerMgmtSingleSocket.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPowerMgmtSystemTables.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuPowerMgmtSystemTables.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuRegisters.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuRegisters.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuServices.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuServices.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuWarmReset.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/cpuWarmReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/heapManager.c b/src/vendorcode/amd/agesa/f12/Proc/CPU/heapManager.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/CPU/heapManager.h b/src/vendorcode/amd/agesa/f12/Proc/CPU/heapManager.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Common/AmdFch.h b/src/vendorcode/amd/agesa/f12/Proc/Common/AmdFch.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitEarly.c b/src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitEarly.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitLate.c b/src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitMid.c b/src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitPost.c b/src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitPost.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitRecovery.c b/src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitRecovery.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitReset.c b/src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitResume.c b/src/vendorcode/amd/agesa/f12/Proc/Common/AmdInitResume.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Common/AmdLateRunApTask.c b/src/vendorcode/amd/agesa/f12/Proc/Common/AmdLateRunApTask.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Common/AmdS3LateRestore.c b/src/vendorcode/amd/agesa/f12/Proc/Common/AmdS3LateRestore.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Common/AmdS3Save.c b/src/vendorcode/amd/agesa/f12/Proc/Common/AmdS3Save.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Common/CommonInits.c b/src/vendorcode/amd/agesa/f12/Proc/Common/CommonInits.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Common/CommonInits.h b/src/vendorcode/amd/agesa/f12/Proc/Common/CommonInits.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Common/CommonPage.h b/src/vendorcode/amd/agesa/f12/Proc/Common/CommonPage.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Common/CommonReturns.c b/src/vendorcode/amd/agesa/f12/Proc/Common/CommonReturns.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Common/CreateStruct.c b/src/vendorcode/amd/agesa/f12/Proc/Common/CreateStruct.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Common/CreateStruct.h b/src/vendorcode/amd/agesa/f12/Proc/Common/CreateStruct.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Common/S3RestoreState.c b/src/vendorcode/amd/agesa/f12/Proc/Common/S3RestoreState.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Common/S3SaveState.c b/src/vendorcode/amd/agesa/f12/Proc/Common/S3SaveState.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Common/S3SaveState.h b/src/vendorcode/amd/agesa/f12/Proc/Common/S3SaveState.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Azalia/AzaliaEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Azalia/AzaliaEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Azalia/AzaliaLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Azalia/AzaliaLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Azalia/AzaliaMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Azalia/AzaliaMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Azalia/AzaliaReset.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Azalia/AzaliaReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Common/AcpiLib.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Common/AcpiLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Common/AcpiLib.h b/src/vendorcode/amd/agesa/f12/Proc/Fch/Common/AcpiLib.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchBiosRamUsage.h b/src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchBiosRamUsage.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchCommon.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchCommon.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchCommonCfg.h b/src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchCommonCfg.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchCommonSmm.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchCommonSmm.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchDef.h b/src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchDef.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchLib.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchPeLib.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Common/FchPeLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Common/MemLib.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Common/MemLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Common/PciLib.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Common/PciLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Fch.h b/src/vendorcode/amd/agesa/f12/Proc/Fch/Fch.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/FchPlatform.h b/src/vendorcode/amd/agesa/f12/Proc/Fch/FchPlatform.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Gec/Family/Hudson2/Hudson2GecEnvService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Gec/Family/Hudson2/Hudson2GecEnvService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Gec/Family/Hudson2/Hudson2GecService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Gec/Family/Hudson2/Hudson2GecService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Gec/GecEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Gec/GecEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Gec/GecLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Gec/GecLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Gec/GecMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Gec/GecMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Gec/GecReset.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Gec/GecReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2HwAcpiEnvService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2HwAcpiEnvService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2HwAcpiLateService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2HwAcpiLateService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2HwAcpiMidService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2HwAcpiMidService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2SSService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/Family/Hudson2/Hudson2SSService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/HwAcpiEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/HwAcpiEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/HwAcpiLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/HwAcpiLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/HwAcpiMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/HwAcpiMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/HwAcpiReset.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/HwAcpi/HwAcpiReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/Family/Hudson2/Hudson2HwmEnvService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/Family/Hudson2/Hudson2HwmEnvService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/Family/Hudson2/Hudson2HwmLateService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/Family/Hudson2/Hudson2HwmLateService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/Family/Hudson2/Hudson2HwmMidService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/Family/Hudson2/Hudson2HwmMidService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/HwmEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/HwmEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/HwmLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/HwmLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/HwmMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/HwmMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/HwmReset.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Hwm/HwmReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Ide/IdeEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Ide/IdeEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Ide/IdeLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Ide/IdeLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Ide/IdeMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Ide/IdeMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/Family/Hudson2/Hudson2ImcService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/Family/Hudson2/Hudson2ImcService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/FchEcEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/FchEcEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/FchEcLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/FchEcLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/FchEcMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/FchEcMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/FchEcReset.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/FchEcReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcLib.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcReset.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Imc/ImcReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/Family/Hudson2/EnvDefHudson2.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/Family/Hudson2/EnvDefHudson2.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/Family/Hudson2/ResetDefHudson2.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/Family/Hudson2/ResetDefHudson2.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchInitEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchInitEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchInitLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchInitLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchInitMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchInitMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchInitReset.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchInitReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchInitS3.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchInitS3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchTaskLauncher.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchTaskLauncher.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchTaskLauncher.h b/src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/FchTaskLauncher.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/InitEnvDef.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/InitEnvDef.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/InitResetDef.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Interface/InitResetDef.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Ir/IrEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Ir/IrEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Ir/IrLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Ir/IrLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Ir/IrMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Ir/IrMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Oem.h b/src/vendorcode/amd/agesa/f12/Proc/Fch/Oem.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcib/PcibEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcib/PcibEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcib/PcibLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcib/PcibLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcib/PcibMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcib/PcibMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcib/PcibReset.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcib/PcibReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/AbEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/AbEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/AbLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/AbLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/AbMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/AbMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/AbReset.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/AbReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2AbEnvService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2AbEnvService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2AbResetService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2AbResetService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2AbService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2AbService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2GppResetService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2GppResetService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2GppService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2GppService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2PcieEnvService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2PcieEnvService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2PcieService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/Family/Hudson2/Hudson2PcieService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/GppEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/GppEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/GppHp.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/GppHp.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/GppLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/GppLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/GppLib.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/GppLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/GppMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/GppMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/GppReset.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/GppReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/PcieEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/PcieEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/PcieLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/PcieLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/PcieMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/PcieMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/PcieReset.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Pcie/PcieReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciLib.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/AhciMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Family/Hudson2/Hudson2SataEnvService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Family/Hudson2/Hudson2SataEnvService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Family/Hudson2/Hudson2SataResetService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Family/Hudson2/Hudson2SataResetService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Family/Hudson2/Hudson2SataService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Family/Hudson2/Hudson2SataService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciLib.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/Ide2AhciMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidLib.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/RaidMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataEnvLib.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataEnvLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeLib.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataIdeMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataLib.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataReset.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sata/SataReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sd/SdEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sd/SdEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sd/SdLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sd/SdLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Sd/SdMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Sd/SdMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcReset.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/LpcReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiReset.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Spi/SpiReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/EhciEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/EhciEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/EhciLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/EhciLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/EhciMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/EhciMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/EhciReset.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/EhciReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2EhciEnvService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2EhciEnvService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2EhciLateService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2EhciLateService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2EhciMidService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2EhciMidService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2OhciEnvService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2OhciEnvService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2OhciLateService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2OhciLateService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2OhciMidService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2OhciMidService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2XhciEnvService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2XhciEnvService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2XhciLateService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2XhciLateService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2XhciMidService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2XhciMidService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2XhciResetService.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/Family/Hudson2/Hudson2XhciResetService.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/OhciEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/OhciEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/OhciLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/OhciLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/OhciMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/OhciMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/OhciReset.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/OhciReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/UsbEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/UsbEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/UsbLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/UsbLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/UsbMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/UsbMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/UsbReset.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/UsbReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/XhciEnv.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/XhciEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/XhciLate.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/XhciLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/XhciMid.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/XhciMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/XhciRecovery.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/XhciRecovery.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/XhciReset.c b/src/vendorcode/amd/agesa/f12/Proc/Fch/Usb/XhciReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Common/Gnb.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Common/Gnb.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbFamServices.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbFamServices.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbFuseTable.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbFuseTable.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbGfx.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbGfx.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbGfxFamServices.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbGfxFamServices.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbLibFeatures.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbLibFeatures.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbLibFeatures.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbLibFeatures.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbPcie.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbPcie.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbPcieFamServices.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbPcieFamServices.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbRegistersLN.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Common/GnbRegistersLN.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/Family/GfxFamilyServices.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/Family/GfxFamilyServices.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/Family/LN/F12GfxServices.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/Family/LN/F12GfxServices.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxConfigData.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxConfigData.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxConfigData.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxConfigData.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxGmcInit.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxGmcInit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxGmcInit.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxGmcInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxInitAtEnvPost.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxInitAtEnvPost.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxInitAtEnvPost.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxInitAtEnvPost.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxInitAtMidPost.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxInitAtMidPost.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxInitAtMidPost.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxInitAtMidPost.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxInitAtPost.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxInitAtPost.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxInitAtPost.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxInitAtPost.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxIntegratedInfoTableInit.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxIntegratedInfoTableInit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxIntegratedInfoTableInit.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxIntegratedInfoTableInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxLib.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxLib.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxLib.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxRegisterAcc.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxRegisterAcc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxRegisterAcc.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxRegisterAcc.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxStrapsInit.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxStrapsInit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxStrapsInit.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Gfx/GfxStrapsInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/GnbInitAtEarly.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/GnbInitAtEarly.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/GnbInitAtEnv.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/GnbInitAtEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/GnbInitAtLate.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/GnbInitAtLate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/GnbInitAtMid.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/GnbInitAtMid.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/GnbInitAtPost.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/GnbInitAtPost.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/GnbInitAtReset.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/GnbInitAtReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/GnbPage.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/GnbPage.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCableSafe/GnbCableSafe.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCableSafe/GnbCableSafe.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCableSafe/GnbCableSafeDefs.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCableSafe/GnbCableSafeDefs.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbCommonLib.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbCommonLib.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLib.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLib.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLib.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibCpuAcc.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibHeap.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibIoAcc.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibMemAcc.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibPci.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibPciAcc.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibStall.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibStall.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibStall.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbLibStall.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbTable.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbTable.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbTable.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbCommonLib/GnbTable.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbFamTranslation/GnbPcieTranslation.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbFamTranslation/GnbPcieTranslation.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxConfig/GfxConfigEnv.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxConfig/GfxConfigEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxConfig/GfxConfigPost.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxConfig/GnbGfxConfig.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxConfig/GnbGfxConfig.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GfxCardInfo.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GfxCardInfo.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GfxCardInfo.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GfxCardInfo.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GfxEnumConnectors.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GfxEnumConnectors.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GfxEnumConnectors.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GfxEnumConnectors.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GfxPowerPlayTable.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GfxPowerPlayTable.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GfxPowerPlayTable.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GfxPowerPlayTable.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GnbGfxInitLibV1.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GnbGfxInitLibV1.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GnbGfxInitLibV1.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbGfxInitLibV1/GnbGfxInitLibV1.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbIommuIvrs/GnbIommuIvrs.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbIommuIvrs/GnbIommuIvrs.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbIommuIvrs/GnbIommuIvrs.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbIommuIvrs/GnbIommuIvrs.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbIvrsLib/GnbIvrsLib.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbIvrsLib/GnbIvrsLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbIvrsLib/GnbIvrsLib.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbIvrsLib/GnbIvrsLib.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbNbInitLibV1/GnbNbInitLibV1.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbNbInitLibV1/GnbNbInitLibV1.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbNbInitLibV1/GnbNbInitLibV1.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbNbInitLibV1/GnbNbInitLibV1.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieAlibV1/PcieAlib.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/GnbPcieConfig.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/GnbPcieConfig.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieConfigData.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieConfigLib.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieConfigLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieConfigLib.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieConfigLib.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieInputParser.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieMapTopology.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieMapTopology.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieMapTopology.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieConfig/PcieMapTopology.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/GnbPcieInitLibV1.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/GnbPcieInitLibV1.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspm.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspm.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspm.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspm.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmBlackList.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmBlackList.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmBlackList.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmBlackList.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmExitLatency.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmExitLatency.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmExitLatency.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieAspmExitLatency.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePhyServices.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePhyServices.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePhyServices.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePhyServices.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePifServices.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePifServices.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePifServices.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePifServices.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortRegAcc.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortRegAcc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortRegAcc.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortRegAcc.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortServices.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortServices.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortServices.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePortServices.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePowerMgmt.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePowerMgmt.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePowerMgmt.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PciePowerMgmt.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSiliconServices.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSiliconServices.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSiliconServices.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieSiliconServices.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTimer.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTimer.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTimer.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTimer.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTopologyServices.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTopologyServices.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTopologyServices.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieTopologyServices.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieUtilityLib.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieUtilityLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieUtilityLib.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieUtilityLib.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieWrapperRegAcc.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieWrapperRegAcc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieWrapperRegAcc.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieInitLibV1/PcieWrapperRegAcc.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieTrainingV1/GnbPcieTrainingV1.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieTrainingV1/GnbPcieTrainingV1.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieTrainingV1/PcieTraining.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieTrainingV1/PcieTraining.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieTrainingV1/PcieTraining.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieTrainingV1/PcieTraining.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieTrainingV1/PcieWorkarounds.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieTrainingV1/PcieWorkarounds.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieTrainingV1/PcieWorkarounds.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbPcieTrainingV1/PcieWorkarounds.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbSbIommuLib/GnbSbIommuLib.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbSbIommuLib/GnbSbIommuLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbSbIommuLib/GnbSbIommuLib.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbSbIommuLib/GnbSbIommuLib.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbSbLib/GnbSbLib.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbSbLib/GnbSbLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbSbLib/GnbSbLib.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbSbLib/GnbSbLib.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbSbLib/GnbSbPcie.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Modules/GnbSbLib/GnbSbPcie.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbLclkDpm.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbLclkDpm.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbPowerGate.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbPowerGate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbPowerGate.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbPowerGate.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbServices.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbServices.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbSmu.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbSmu.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbSmuFirmware.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/LN/F12NbSmuFirmware.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/NbFamilyServices.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Family/NbFamilyServices.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbFuseTable.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbFuseTable.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbFuseTable.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbFuseTable.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbLclkDpm.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbLclkDpm.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbLclkDpm.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/Feature/NbLclkDpm.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbConfigData.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbConfigData.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbConfigData.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbConfigData.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInit.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInit.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEarly.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEarly.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEarly.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEarly.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEnv.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEnv.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtEnv.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtLatePost.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtLatePost.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtLatePost.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtLatePost.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtPost.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtPost.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtPost.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtPost.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtReset.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtReset.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbInitAtReset.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbPowerMgmt.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbPowerMgmt.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbPowerMgmt.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbPowerMgmt.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbSmuLib.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbSmuLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbSmuLib.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/Nb/NbSmuLib.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieAlib.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieAlib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieAlibSsdt.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieAlibSsdt.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieComplexConfig.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieComplexConfig.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieComplexServices.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieComplexServices.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PciePhyServices.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PciePhyServices.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PciePifServices.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PciePifServices.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieWrapperServices.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/F12PcieWrapperServices.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/LlanoComplexData.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/LlanoComplexData.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/LlanoDefinitions.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/LN/LlanoDefinitions.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/PcieFamilyServices.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Family/PcieFamilyServices.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Feature/PciePowerGate.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Feature/PciePowerGate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Feature/PciePowerGate.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/Feature/PciePowerGate.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInit.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInit.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtEarlyPost.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtEarlyPost.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtEarlyPost.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtEarlyPost.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtEnv.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtEnv.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtEnv.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtEnv.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtLatePost.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtLatePost.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtLatePost.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtLatePost.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtPost.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtPost.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtPost.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieInitAtPost.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieLateInit.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieLateInit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieLateInit.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PcieLateInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PciePortInit.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PciePortInit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PciePortInit.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PciePortInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PciePortLateInit.c b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PciePortLateInit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PciePortLateInit.h b/src/vendorcode/amd/agesa/f12/Proc/GNB/PCIe/PciePortLateInit.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbCoherentFam10.c b/src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbCoherentFam10.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbCoherentFam10.h b/src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbCoherentFam10.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbFam10.c b/src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbFam10.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbNonCoherentFam10.c b/src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbNonCoherentFam10.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbNonCoherentFam10.h b/src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbNonCoherentFam10.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbOptimizationFam10.c b/src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbOptimizationFam10.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbOptimizationFam10.h b/src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbOptimizationFam10.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbSystemFam10.c b/src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbSystemFam10.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbSystemFam10.h b/src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbSystemFam10.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbUtilitiesFam10.c b/src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbUtilitiesFam10.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbUtilitiesFam10.h b/src/vendorcode/amd/agesa/f12/Proc/HT/Fam10/htNbUtilitiesFam10.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Fam12/htNbFam12.c b/src/vendorcode/amd/agesa/f12/Proc/HT/Fam12/htNbFam12.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Fam12/htNbUtilitiesFam12.c b/src/vendorcode/amd/agesa/f12/Proc/HT/Fam12/htNbUtilitiesFam12.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Fam12/htNbUtilitiesFam12.h b/src/vendorcode/amd/agesa/f12/Proc/HT/Fam12/htNbUtilitiesFam12.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatDynamicDiscovery.c b/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatDynamicDiscovery.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatDynamicDiscovery.h b/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatDynamicDiscovery.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatGanging.c b/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatGanging.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatGanging.h b/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatGanging.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatNoncoherent.c b/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatNoncoherent.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatNoncoherent.h b/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatNoncoherent.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatOptimization.c b/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatOptimization.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatOptimization.h b/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatOptimization.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatRouting.c b/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatRouting.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatRouting.h b/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatRouting.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatSets.c b/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatSets.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatSublinks.c b/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatSublinks.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatSublinks.h b/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatSublinks.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatTrafficDistribution.c b/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatTrafficDistribution.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatTrafficDistribution.h b/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htFeatTrafficDistribution.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htIds.c b/src/vendorcode/amd/agesa/f12/Proc/HT/Features/htIds.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbCoherent.c b/src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbCoherent.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbCoherent.h b/src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbCoherent.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbNonCoherent.c b/src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbNonCoherent.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbNonCoherent.h b/src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbNonCoherent.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbOptimization.c b/src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbOptimization.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbOptimization.h b/src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbOptimization.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbUtilities.c b/src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbUtilities.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbUtilities.h b/src/vendorcode/amd/agesa/f12/Proc/HT/NbCommon/htNbUtilities.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htFeat.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htFeat.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htFeat.h b/src/vendorcode/amd/agesa/f12/Proc/HT/htFeat.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph.h b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph1.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph1.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph2.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph2.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph3Line.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph3Line.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph3Triangle.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph3Triangle.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph4Degenerate.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph4Degenerate.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph4FullyConnected.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph4FullyConnected.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph4Kite.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph4Kite.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph4Line.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph4Line.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph4Square.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph4Square.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph4Star.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph4Star.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph5FullyConnected.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph5FullyConnected.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph5TwistedLadder.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph5TwistedLadder.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph6DoubloonLower.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph6DoubloonLower.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph6DoubloonUpper.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph6DoubloonUpper.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph6FullyConnected.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph6FullyConnected.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph6TwinTriangles.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph6TwinTriangles.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph6TwistedLadder.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph6TwistedLadder.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph7FullyConnected.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph7FullyConnected.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph7TwistedLadder.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph7TwistedLadder.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph8DoubloonM.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph8DoubloonM.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph8FullyConnected.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph8FullyConnected.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph8Ladder.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph8Ladder.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph8TwinFullyFourWays.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph8TwinFullyFourWays.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph8TwistedLadder.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htGraph/htGraph8TwistedLadder.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htInterface.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htInterface.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htInterface.h b/src/vendorcode/amd/agesa/f12/Proc/HT/htInterface.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htInterfaceCoherent.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htInterfaceCoherent.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htInterfaceCoherent.h b/src/vendorcode/amd/agesa/f12/Proc/HT/htInterfaceCoherent.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htInterfaceGeneral.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htInterfaceGeneral.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htInterfaceGeneral.h b/src/vendorcode/amd/agesa/f12/Proc/HT/htInterfaceGeneral.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htInterfaceNonCoherent.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htInterfaceNonCoherent.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htInterfaceNonCoherent.h b/src/vendorcode/amd/agesa/f12/Proc/HT/htInterfaceNonCoherent.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htMain.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htMain.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htNb.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htNb.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htNb.h b/src/vendorcode/amd/agesa/f12/Proc/HT/htNb.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htNbCommonHardware.h b/src/vendorcode/amd/agesa/f12/Proc/HT/htNbCommonHardware.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htNotify.c b/src/vendorcode/amd/agesa/f12/Proc/HT/htNotify.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htNotify.h b/src/vendorcode/amd/agesa/f12/Proc/HT/htNotify.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htPage.h b/src/vendorcode/amd/agesa/f12/Proc/HT/htPage.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/HT/htTopologies.h b/src/vendorcode/amd/agesa/f12/Proc/HT/htTopologies.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/IDS/IdsLib.h b/src/vendorcode/amd/agesa/f12/Proc/IDS/IdsLib.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/IDS/IdsPage.h b/src/vendorcode/amd/agesa/f12/Proc/IDS/IdsPage.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/IDS/OptionsIds.h b/src/vendorcode/amd/agesa/f12/Proc/IDS/OptionsIds.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/C32/marc32_3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/C32/marc32_3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/C32/mauc32_3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/C32/mauc32_3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/DA/masda2.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/DA/masda2.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/DA/masda3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/DA/masda3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/DA/mauda3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/DA/mauda3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/DR/mardr2.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/DR/mardr2.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/DR/mardr3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/DR/mardr3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/DR/maudr3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/DR/maudr3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/HY/marhy3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/HY/marhy3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/HY/mauhy3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/HY/mauhy3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/LN/masln3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/LN/masln3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/LN/mauln3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/LN/mauln3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/NI/masNi3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/NI/masNi3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/NI/mauNi3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/NI/mauNi3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/PH/masph3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/PH/masph3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/PH/mauPh3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/PH/mauPh3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/RB/masRb3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/RB/masRb3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/RB/mauRb3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/RB/mauRb3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/ma.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ardk/ma.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/CHINTLV/mfchi.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/CHINTLV/mfchi.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/CHINTLV/mfchi.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/CHINTLV/mfchi.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/CSINTLV/mfcsi.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/CSINTLV/mfcsi.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/CSINTLV/mfcsi.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/CSINTLV/mfcsi.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/DMI/mfDMI.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/DMI/mfDMI.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/ECC/mfecc.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/ECC/mfecc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/ECC/mfecc.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/ECC/mfecc.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/ECC/mfemp.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/ECC/mfemp.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/EXCLUDIMM/mfdimmexclud.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/EXCLUDIMM/mfdimmexclud.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/IDENDIMM/mfidendimm.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/IDENDIMM/mfidendimm.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/IDENDIMM/mfidendimm.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/IDENDIMM/mfidendimm.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/INTLVRN/mfintlvrn.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/INTLVRN/mfintlvrn.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/INTLVRN/mfintlvrn.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/INTLVRN/mfintlvrn.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/LVDDR3/mflvddr3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/LVDDR3/mflvddr3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/LVDDR3/mflvddr3.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/LVDDR3/mflvddr3.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/MEMCLR/mfmemclr.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/MEMCLR/mfmemclr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/NDINTLV/mfndi.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/NDINTLV/mfndi.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/NDINTLV/mfndi.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/NDINTLV/mfndi.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/ODTHERMAL/mfodthermal.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/ODTHERMAL/mfodthermal.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/ODTHERMAL/mfodthermal.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/ODTHERMAL/mfodthermal.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/OLSPARE/mfspr.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/OLSPARE/mfspr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/OLSPARE/mfspr.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/OLSPARE/mfspr.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/PARTRN/mfParallelTraining.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/PARTRN/mfParallelTraining.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/PARTRN/mfStandardTraining.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/PARTRN/mfStandardTraining.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/S3/mfs3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/S3/mfs3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/TABLE/mftds.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Feat/TABLE/mftds.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/C32/mmflowC32.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/C32/mmflowC32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/DA/mmflowda.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/DA/mmflowda.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/DR/mmflowdr.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/DR/mmflowdr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/HY/mmflowhy.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/HY/mmflowhy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/LN/mmflowln.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/LN/mmflowln.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/PH/mmflowPh.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/PH/mmflowPh.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/RB/mmflowRb.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/RB/mmflowRb.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mdef.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mdef.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/merrhdl.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/merrhdl.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/minit.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/minit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mm.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mm.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmConditionalPso.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmConditionalPso.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmEcc.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmEcc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmExcludeDimm.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmExcludeDimm.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmLvDdr3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmLvDdr3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmMemClr.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmMemClr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmMemRestore.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmMemRestore.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmNodeInterleave.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmNodeInterleave.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmOnlineSpare.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmOnlineSpare.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmParallelTraining.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmParallelTraining.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmStandardTraining.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmStandardTraining.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmUmaAlloc.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmUmaAlloc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmflow.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmflow.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmlvddr3.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mmlvddr3.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mu.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/mu.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/muc.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Main/muc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnParTrainc32.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnParTrainc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnS3c32.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnS3c32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnS3c32.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnS3c32.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnc32.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnc32.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnc32.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mndctc32.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mndctc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnflowc32.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnflowc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnidendimmc32.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnidendimmc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnmctc32.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnmctc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnotc32.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnotc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnphyc32.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnphyc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnprotoc32.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnprotoc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/C32/mnregc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnParTrainDa.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnParTrainDa.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnS3da.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnS3da.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnS3da.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnS3da.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnda.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnda.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnda.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnda.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mndctda.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mndctda.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnflowda.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnflowda.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnidendimmda.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnidendimmda.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnmctda.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnmctda.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnotda.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnotda.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnprotoda.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnprotoda.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DA/mnregda.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnParTrainDr.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnParTrainDr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnS3dr.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnS3dr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnS3dr.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnS3dr.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mndctdr.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mndctdr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mndr.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mndr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mndr.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mndr.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnflowdr.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnflowdr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnidendimmdr.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnidendimmdr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnmctdr.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnmctdr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnotdr.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnotdr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnprotodr.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnprotodr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/DR/mnregdr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnParTrainHy.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnParTrainHy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnS3hy.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnS3hy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnS3hy.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnS3hy.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mndcthy.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mndcthy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnflowhy.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnflowhy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnhy.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnhy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnhy.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnhy.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnidendimmhy.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnidendimmhy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnmcthy.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnmcthy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnothy.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnothy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnphyhy.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnphyhy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnprotohy.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnprotohy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/HY/mnreghy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnS3ln.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnS3ln.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnS3ln.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnS3ln.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mndctln.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mndctln.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnflowln.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnflowln.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnidendimmln.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnidendimmln.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnln.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnln.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnln.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnln.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnmctln.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnmctln.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnotln.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnotln.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnphyln.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnphyln.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnprotoln.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnprotoln.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/LN/mnregln.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/NI/mnNi.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/NI/mnNi.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/NI/mnNi.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/NI/mnNi.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/NI/mnS3Ni.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/NI/mnS3Ni.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/NI/mnS3Ni.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/NI/mnS3Ni.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/NI/mnflowNi.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/NI/mnflowNi.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/PH/mnPh.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/PH/mnPh.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/PH/mnPh.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/PH/mnPh.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/PH/mnS3Ph.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/PH/mnS3Ph.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/PH/mnS3Ph.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/PH/mnS3Ph.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/PH/mnflowPh.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/PH/mnflowPh.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/PH/mnidendimmPh.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/PH/mnidendimmPh.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/RB/mnRb.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/RB/mnRb.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/RB/mnRb.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/RB/mnRb.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/RB/mnS3Rb.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/RB/mnS3Rb.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/RB/mnS3Rb.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/RB/mnS3Rb.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/RB/mnflowRb.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/RB/mnflowRb.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/RB/mnidendimmRb.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/RB/mnidendimmRb.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mn.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mn.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnS3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnS3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mndct.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mndct.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnfeat.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnfeat.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnflow.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnflow.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnmct.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnmct.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnphy.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnphy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnreg.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mnreg.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mntrain2.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mntrain2.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mntrain3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/NB/mntrain3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/C32/mprc32_3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/C32/mprc32_3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/C32/mpuc32_3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/C32/mpuc32_3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DA/mpsda2.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DA/mpsda2.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DA/mpsda3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DA/mpsda3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DA/mpuda3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DA/mpuda3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DR/mprdr2.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DR/mprdr2.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DR/mprdr3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DR/mprdr3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DR/mpsdr3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DR/mpsdr3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DR/mpudr2.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DR/mpudr2.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DR/mpudr3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/DR/mpudr3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/HY/mprhy3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/HY/mprhy3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/HY/mpshy3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/HY/mpshy3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/HY/mpuhy3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/HY/mpuhy3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/LN/mprln3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/LN/mprln3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/LN/mpsln3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/LN/mpsln3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/LN/mpuln3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/LN/mpuln3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/NI/mpsNi3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/NI/mpsNi3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/NI/mpuNi3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/NI/mpuNi3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/PH/mpsph3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/PH/mpsph3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/PH/mpuph3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/PH/mpuph3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/RB/mpsRb3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/RB/mpsRb3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/RB/mpuRb3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/RB/mpuRb3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mp.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mp.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mplribt.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mplribt.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mplrnlr.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mplrnlr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mplrnpr.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mplrnpr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mpmaxfreq.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mpmaxfreq.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mpmr0.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mpmr0.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mpodtpat.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mpodtpat.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mprc10opspd.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mprc10opspd.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mprc2ibt.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mprc2ibt.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mprtt.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mprtt.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mpsao.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Ps/mpsao.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR2/mt2.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR2/mt2.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR2/mt2.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR2/mt2.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR2/mtot2.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR2/mtot2.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR2/mtot2.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR2/mtot2.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR2/mtspd2.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR2/mtspd2.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR2/mtspd2.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR2/mtspd2.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mt3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mt3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mt3.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mt3.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtlrdimm3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtlrdimm3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtlrdimm3.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtlrdimm3.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtot3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtot3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtot3.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtot3.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtrci3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtrci3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtrci3.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtrci3.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtsdi3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtsdi3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtsdi3.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtsdi3.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtspd3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtspd3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtspd3.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mtspd3.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mttecc3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mttecc3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mttwl3.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/DDR3/mttwl3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mt.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mt.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mthdi.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mthdi.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttEdgeDetect.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttEdgeDetect.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttEdgeDetect.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttEdgeDetect.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttdimbt.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttdimbt.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttecc.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttecc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mtthrc.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mtthrc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mtthrcSeedTrain.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mtthrcSeedTrain.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttml.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttml.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttoptsrc.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttoptsrc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttsrc.c b/src/vendorcode/amd/agesa/f12/Proc/Mem/Tech/mttsrc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/ma.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/ma.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/memPage.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/memPage.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/merrhdl.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/merrhdl.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/mfParallelTraining.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/mfParallelTraining.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/mfStandardTraining.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/mfStandardTraining.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/mfmemclr.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/mfmemclr.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/mfs3.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/mfs3.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/mftds.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/mftds.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/mm.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/mm.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/mn.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/mn.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/mp.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/mp.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/mport.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/mport.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/mt.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/mt.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Mem/mu.h b/src/vendorcode/amd/agesa/f12/Proc/Mem/mu.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/CPU/cpuRecovery.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/CPU/cpuRecovery.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/CPU/cpuRecovery.h b/src/vendorcode/amd/agesa/f12/Proc/Recovery/CPU/cpuRecovery.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/GNB/GnbRecovery.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/GNB/GnbRecovery.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/GNB/NbInitRecovery.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/GNB/NbInitRecovery.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/GNB/NbInitRecovery.h b/src/vendorcode/amd/agesa/f12/Proc/Recovery/GNB/NbInitRecovery.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/HT/htInitRecovery.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/HT/htInitRecovery.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/HT/htInitReset.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/HT/htInitReset.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/C32/mrnc32.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/C32/mrnc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/C32/mrnc32.h b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/C32/mrnc32.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/C32/mrnmctc32.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/C32/mrnmctc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/C32/mrnprotoc32.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/C32/mrnprotoc32.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/DA/mrnda.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/DA/mrnda.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/DA/mrnda.h b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/DA/mrnda.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/DA/mrnmctda.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/DA/mrnmctda.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/DR/mrndr.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/DR/mrndr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/DR/mrndr.h b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/DR/mrndr.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/DR/mrnmctdr.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/DR/mrnmctdr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/HY/mrndcthy.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/HY/mrndcthy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/HY/mrnhy.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/HY/mrnhy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/HY/mrnhy.h b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/HY/mrnhy.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/HY/mrnmcthy.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/HY/mrnmcthy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/HY/mrnprotohy.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/HY/mrnprotohy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/LN/mrndctln.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/LN/mrndctln.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/LN/mrnln.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/LN/mrnln.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/LN/mrnln.h b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/LN/mrnln.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/LN/mrnmctln.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/LN/mrnmctln.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/NI/mrnNi.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/NI/mrnNi.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/NI/mrnNi.h b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/NI/mrnNi.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/PH/mrnPh.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/PH/mrnPh.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/PH/mrnPh.h b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/PH/mrnPh.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/RB/mrnRb.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/RB/mrnRb.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/RB/mrnRb.h b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/RB/mrnRb.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/mrn.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/mrn.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/mrndct.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/mrndct.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/mrnmct.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/mrnmct.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/mrntrain3.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/NB/mrntrain3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrp.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrp.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrplribt.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrplribt.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrplrnlr.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrplrnlr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrplrnpr.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrplrnpr.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrpmr0.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrpmr0.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrpodtpat.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrpodtpat.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrprc10opspd.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrprc10opspd.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrprc2ibt.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrprc2ibt.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrprtt.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrprtt.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrpsao.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Ps/mrpsao.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/DDR3/mrt3.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/DDR3/mrt3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/DDR3/mrtrci3.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/DDR3/mrtrci3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/DDR3/mrtsdi3.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/DDR3/mrtsdi3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/DDR3/mrtspd3.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/DDR3/mrtspd3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/DDR3/mrtspd3.h b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/DDR3/mrtspd3.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/DDR3/mrttwl3.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/DDR3/mrttwl3.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/mrtthrc.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/mrtthrc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/mrtthrcSeedTrain.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/mrtthrcSeedTrain.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/mrttpos.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/mrttpos.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/mrttsrc.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/Tech/mrttsrc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mrdef.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mrdef.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mrinit.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mrinit.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mrm.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mrm.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mrport.h b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mrport.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mrt3.h b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mrt3.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mru.h b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mru.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mruc.c b/src/vendorcode/amd/agesa/f12/Proc/Recovery/Mem/mruc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/Proc/Recovery/recoveryPage.h b/src/vendorcode/amd/agesa/f12/Proc/Recovery/recoveryPage.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/agesa/f12/errno.h b/src/vendorcode/amd/agesa/f12/errno.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/AcpiLib.c b/src/vendorcode/amd/cimx/sb900/AcpiLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/AcpiLib.h b/src/vendorcode/amd/cimx/sb900/AcpiLib.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/AmdLib.c b/src/vendorcode/amd/cimx/sb900/AmdLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/AmdSbLib.c b/src/vendorcode/amd/cimx/sb900/AmdSbLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/AmdSbLib.h b/src/vendorcode/amd/cimx/sb900/AmdSbLib.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/Azalia.c b/src/vendorcode/amd/cimx/sb900/Azalia.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/Debug.c b/src/vendorcode/amd/cimx/sb900/Debug.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/Dispatcher.c b/src/vendorcode/amd/cimx/sb900/Dispatcher.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/Ec.c b/src/vendorcode/amd/cimx/sb900/Ec.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/EcFan.h b/src/vendorcode/amd/cimx/sb900/EcFan.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/EcFanLib.c b/src/vendorcode/amd/cimx/sb900/EcFanLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/EcFanc.c b/src/vendorcode/amd/cimx/sb900/EcFanc.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/EcLib.c b/src/vendorcode/amd/cimx/sb900/EcLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/Gec.c b/src/vendorcode/amd/cimx/sb900/Gec.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/Gpp.c b/src/vendorcode/amd/cimx/sb900/Gpp.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/GppHp.c b/src/vendorcode/amd/cimx/sb900/GppHp.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/Hudson-2.h b/src/vendorcode/amd/cimx/sb900/Hudson-2.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/Hwm.c b/src/vendorcode/amd/cimx/sb900/Hwm.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/IoLib.c b/src/vendorcode/amd/cimx/sb900/IoLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/Legacy.c b/src/vendorcode/amd/cimx/sb900/Legacy.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/MemLib.c b/src/vendorcode/amd/cimx/sb900/MemLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/Oem.h b/src/vendorcode/amd/cimx/sb900/Oem.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/PciLib.c b/src/vendorcode/amd/cimx/sb900/PciLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/Pmio2Lib.c b/src/vendorcode/amd/cimx/sb900/Pmio2Lib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/PmioLib.c b/src/vendorcode/amd/cimx/sb900/PmioLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/Sata.c b/src/vendorcode/amd/cimx/sb900/Sata.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/SbBiosRamUsage.h b/src/vendorcode/amd/cimx/sb900/SbBiosRamUsage.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/SbCmn.c b/src/vendorcode/amd/cimx/sb900/SbCmn.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/SbDef.h b/src/vendorcode/amd/cimx/sb900/SbDef.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/SbMain.c b/src/vendorcode/amd/cimx/sb900/SbMain.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/SbModInf.c b/src/vendorcode/amd/cimx/sb900/SbModInf.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/SbPeLib.c b/src/vendorcode/amd/cimx/sb900/SbPeLib.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/SbPor.c b/src/vendorcode/amd/cimx/sb900/SbPor.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/SbSubFun.h b/src/vendorcode/amd/cimx/sb900/SbSubFun.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/SbType.h b/src/vendorcode/amd/cimx/sb900/SbType.h old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/Smm.c b/src/vendorcode/amd/cimx/sb900/Smm.c old mode 100755 new mode 100644 diff --git a/src/vendorcode/amd/cimx/sb900/Usb.c b/src/vendorcode/amd/cimx/sb900/Usb.c old mode 100755 new mode 100644 -- cgit v1.2.3