From 980180962a1855220de08779fa4697c78757614a Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Wed, 24 Jul 2013 06:18:20 -0700 Subject: pit: Bump the EC SPI bus speed up to 5 MHz That speed is used with U-Boot instead of the more conservative 500 KHz. Change-Id: Ie9d79db3b52b88c1f3bfec1745634ae6bdc9f4ee Signed-off-by: Gabe Black Reviewed-on: https://gerrit.chromium.org/gerrit/63193 Reviewed-by: Hung-Te Lin Commit-Queue: Gabe Black Tested-by: Gabe Black Reviewed-on: http://review.coreboot.org/4386 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/mainboard/google/pit/romstage.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/google/pit/romstage.c b/src/mainboard/google/pit/romstage.c index 7ead3c9353..b582f3e19d 100644 --- a/src/mainboard/google/pit/romstage.c +++ b/src/mainboard/google/pit/romstage.c @@ -126,7 +126,7 @@ static void setup_ec(void) { /* SPI2 (EC) is slower and needs to work in half-duplex mode with * single byte bus width. */ - clock_set_rate(PERIPH_ID_SPI2, 500000); + clock_set_rate(PERIPH_ID_SPI2, 5000000); exynos_pinmux_spi2(); } -- cgit v1.2.3