From 9fb3d792be3319cf232ac6e3adfef0a44996a350 Mon Sep 17 00:00:00 2001
From: Aamir Bohra <aamir.bohra@intel.com>
Date: Tue, 5 May 2020 13:54:27 +0530
Subject: mb/google/dedede: Enable S0ix support

Change-Id: I4cadfe69e36f959b54e374800c32629a7481ea94
Signed-off-by: Aamir Bohra <aamir.bohra@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41060
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Karthik Ramasubramanian <kramasub@google.com>
---
 src/mainboard/google/dedede/variants/baseboard/devicetree.cb | 3 +++
 1 file changed, 3 insertions(+)

diff --git a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
index 0b69f7d5cf..8b68beb8c3 100644
--- a/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
+++ b/src/mainboard/google/dedede/variants/baseboard/devicetree.cb
@@ -119,6 +119,9 @@ chip soc/intel/jasperlake
 	# SD card power enable polarity
 	register "SdCardPowerEnableActiveHigh" = "1"
 
+	# Enable S0ix support
+	register "s0ix_enable" = "1"
+
 	# Display related UPDs
 	# Select eDP for port A
 	register "DdiPortAConfig" = "1"
-- 
cgit v1.2.3