From a767eb4ed9dd942a5d5b28162b81be6d559bdab0 Mon Sep 17 00:00:00 2001 From: Kangheui Won Date: Wed, 14 Apr 2021 09:35:28 +1000 Subject: psp_verstage: move svc to platform-specific dir Since there are some differences between picasso PSP svc and cezanne PSP svc, each platform should have their own svc wrapper. Moreover cezanne PSP will drop unused parameters from update_psp_bios_dir and save_uapp_data so make wrapper around it. BUG=b:182477057 BRANCH=none TEST=build psp_verstage and boot on zork Signed-off-by: Kangheui Won Change-Id: I69f998865fc3184ea8900a431924a315c5ee9133 Reviewed-on: https://review.coreboot.org/c/coreboot/+/52307 Reviewed-by: Martin Roth Tested-by: build bot (Jenkins) --- src/soc/amd/common/psp_verstage/Makefile.inc | 1 - .../amd/common/psp_verstage/include/psp_verstage.h | 62 +++++++ src/soc/amd/common/psp_verstage/psp_verstage.c | 6 +- src/soc/amd/common/psp_verstage/psp_verstage.h | 59 ------- src/soc/amd/common/psp_verstage/svc.c | 166 ------------------- src/soc/amd/common/psp_verstage/svc.h | 57 ------- src/soc/amd/picasso/psp_verstage/Makefile.inc | 2 + src/soc/amd/picasso/psp_verstage/svc.c | 178 +++++++++++++++++++++ src/soc/amd/picasso/psp_verstage/svc.h | 57 +++++++ 9 files changed, 301 insertions(+), 287 deletions(-) create mode 100644 src/soc/amd/common/psp_verstage/include/psp_verstage.h delete mode 100644 src/soc/amd/common/psp_verstage/psp_verstage.h delete mode 100644 src/soc/amd/common/psp_verstage/svc.c delete mode 100644 src/soc/amd/common/psp_verstage/svc.h create mode 100644 src/soc/amd/picasso/psp_verstage/svc.c create mode 100644 src/soc/amd/picasso/psp_verstage/svc.h diff --git a/src/soc/amd/common/psp_verstage/Makefile.inc b/src/soc/amd/common/psp_verstage/Makefile.inc index 40d9c45763..406d28bcc0 100644 --- a/src/soc/amd/common/psp_verstage/Makefile.inc +++ b/src/soc/amd/common/psp_verstage/Makefile.inc @@ -16,7 +16,6 @@ verstage-y += printk.c verstage-y += psp_verstage.c verstage-y += psp.c verstage-y += reset.c -verstage-y += svc.c verstage-y += timer.c verstage-y += vboot_crypto.c diff --git a/src/soc/amd/common/psp_verstage/include/psp_verstage.h b/src/soc/amd/common/psp_verstage/include/psp_verstage.h new file mode 100644 index 0000000000..f7cb1c94b0 --- /dev/null +++ b/src/soc/amd/common/psp_verstage/include/psp_verstage.h @@ -0,0 +1,62 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef PSP_VERSTAGE_H +#define PSP_VERSTAGE_H + +#include +#include + +#define EMBEDDED_FW_SIGNATURE 0x55aa55aa +#define PSP_COOKIE 0x50535024 /* 'PSP$' */ +#define BDT1_COOKIE 0x44484224 /* 'DHB$ */ + +#define PSP_VBOOT_ERROR_SUBCODE 0x0D5D0000 + +#define POSTCODE_ENTERED_PSP_VERSTAGE 0x00 +#define POSTCODE_CONSOLE_INIT 0x01 +#define POSTCODE_EARLY_INIT 0x02 +#define POSTCODE_LATE_INIT 0x03 +#define POSTCODE_VERSTAGE_MAIN 0x04 + +#define POSTCODE_SAVE_BUFFERS 0x0E +#define POSTCODE_UPDATE_BOOT_REGION 0x0F + +#define POSTCODE_DEFAULT_BUFFER_SIZE_NOTICE 0xC0 +#define POSTCODE_WORKBUF_RESIZE_WARNING 0xC1 +#define POSTCODE_WORKBUF_SAVE_ERROR 0xC2 +#define POSTCODE_WORKBUF_BUFFER_SIZE_ERROR 0xC3 +#define POSTCODE_ROMSIG_MISMATCH_ERROR 0xC4 +#define POSTCODE_PSP_COOKIE_MISMATCH_ERROR 0xC5 +#define POSTCODE_BDT1_COOKIE_MISMATCH_ERROR 0xC6 +#define POSTCODE_UPDATE_PSP_BIOS_DIR_ERROR 0xC7 +#define POSTCODE_FMAP_REGION_MISSING 0xC8 +#define POSTCODE_AMD_FW_MISSING 0xC9 +#define POSTCODE_CMOS_RECOVERY 0xCA + +#define POSTCODE_UNMAP_SPI_ROM 0xF0 +#define POSTCODE_UNMAP_FCH_DEVICES 0xF1 +#define POSTCODE_LEAVING_VERSTAGE 0xF2 + +#define SPI_ADDR_MASK 0x00ffffff +#define MIN_TRANSFER_BUFFER_SIZE (8 * KiB) +#define MIN_WORKBUF_TRANSFER_SIZE (MIN_TRANSFER_BUFFER_SIZE - TRANSFER_INFO_SIZE) + +struct psp_ef_table { + uint32_t signature; /* 0x55aa55aa */ + uint32_t reserved0[4]; + uint32_t psp_table; + uint32_t bios0_entry; + uint32_t bios1_entry; + uint32_t bios2_entry; +} __attribute__((packed, aligned(16))); + +void test_svc_calls(void); +uint32_t unmap_fch_devices(void); +uint32_t verstage_soc_early_init(void); +void verstage_soc_init(void); +uintptr_t *map_spi_rom(void); + +uint32_t update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset); +uint32_t save_uapp_data(void *address, uint32_t size); + +#endif /* PSP_VERSTAGE_H */ diff --git a/src/soc/amd/common/psp_verstage/psp_verstage.c b/src/soc/amd/common/psp_verstage/psp_verstage.c index d4c5d155af..58f17e14f1 100644 --- a/src/soc/amd/common/psp_verstage/psp_verstage.c +++ b/src/soc/amd/common/psp_verstage/psp_verstage.c @@ -113,8 +113,7 @@ static uint32_t update_boot_region(struct vb2_context *ctx) return POSTCODE_BDT1_COOKIE_MISMATCH_ERROR; } - if (svc_update_psp_bios_dir((void *)&psp_dir_addr, - (void *)&bios_dir_addr, DIR_OFFSET_SET)) { + if (update_psp_bios_dir((void *)&psp_dir_addr, (void *)&bios_dir_addr)) { printk(BIOS_ERR, "Error: Updated BIOS Directory could not be set.\n"); return POSTCODE_UPDATE_PSP_BIOS_DIR_ERROR; } @@ -179,8 +178,7 @@ static uint32_t save_buffers(struct vb2_context **ctx) memcpy(_transfer_buffer, &buffer_info, sizeof(buffer_info)); - retval = svc_save_uapp_data(UAPP_COPYBUF_CHROME_WORKBUF, (void *)_transfer_buffer, - buffer_size); + retval = save_uapp_data((void *)_transfer_buffer, buffer_size); if (retval) { printk(BIOS_ERR, "Error: Could not save workbuf. Error code 0x%08x\n", retval); return POSTCODE_WORKBUF_SAVE_ERROR; diff --git a/src/soc/amd/common/psp_verstage/psp_verstage.h b/src/soc/amd/common/psp_verstage/psp_verstage.h deleted file mode 100644 index 4f85d7caa1..0000000000 --- a/src/soc/amd/common/psp_verstage/psp_verstage.h +++ /dev/null @@ -1,59 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef PSP_VERSTAGE_H -#define PSP_VERSTAGE_H - -#include -#include - -#define EMBEDDED_FW_SIGNATURE 0x55aa55aa -#define PSP_COOKIE 0x50535024 /* 'PSP$' */ -#define BDT1_COOKIE 0x44484224 /* 'DHB$ */ - -#define PSP_VBOOT_ERROR_SUBCODE 0x0D5D0000 - -#define POSTCODE_ENTERED_PSP_VERSTAGE 0x00 -#define POSTCODE_CONSOLE_INIT 0x01 -#define POSTCODE_EARLY_INIT 0x02 -#define POSTCODE_LATE_INIT 0x03 -#define POSTCODE_VERSTAGE_MAIN 0x04 - -#define POSTCODE_SAVE_BUFFERS 0x0E -#define POSTCODE_UPDATE_BOOT_REGION 0x0F - -#define POSTCODE_DEFAULT_BUFFER_SIZE_NOTICE 0xC0 -#define POSTCODE_WORKBUF_RESIZE_WARNING 0xC1 -#define POSTCODE_WORKBUF_SAVE_ERROR 0xC2 -#define POSTCODE_WORKBUF_BUFFER_SIZE_ERROR 0xC3 -#define POSTCODE_ROMSIG_MISMATCH_ERROR 0xC4 -#define POSTCODE_PSP_COOKIE_MISMATCH_ERROR 0xC5 -#define POSTCODE_BDT1_COOKIE_MISMATCH_ERROR 0xC6 -#define POSTCODE_UPDATE_PSP_BIOS_DIR_ERROR 0xC7 -#define POSTCODE_FMAP_REGION_MISSING 0xC8 -#define POSTCODE_AMD_FW_MISSING 0xC9 -#define POSTCODE_CMOS_RECOVERY 0xCA - -#define POSTCODE_UNMAP_SPI_ROM 0xF0 -#define POSTCODE_UNMAP_FCH_DEVICES 0xF1 -#define POSTCODE_LEAVING_VERSTAGE 0xF2 - -#define SPI_ADDR_MASK 0x00ffffff -#define MIN_TRANSFER_BUFFER_SIZE (8 * KiB) -#define MIN_WORKBUF_TRANSFER_SIZE (MIN_TRANSFER_BUFFER_SIZE - TRANSFER_INFO_SIZE) - -struct psp_ef_table { - uint32_t signature; /* 0x55aa55aa */ - uint32_t reserved0[4]; - uint32_t psp_table; - uint32_t bios0_entry; - uint32_t bios1_entry; - uint32_t bios2_entry; -} __attribute__((packed, aligned(16))); - -void test_svc_calls(void); -uint32_t unmap_fch_devices(void); -uint32_t verstage_soc_early_init(void); -void verstage_soc_init(void); -uintptr_t *map_spi_rom(void); - -#endif /* PSP_VERSTAGE_H */ diff --git a/src/soc/amd/common/psp_verstage/svc.c b/src/soc/amd/common/psp_verstage/svc.c deleted file mode 100644 index acc9c70318..0000000000 --- a/src/soc/amd/common/psp_verstage/svc.c +++ /dev/null @@ -1,166 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#include "svc.h" - -#include -#include -#include - -void svc_exit(uint32_t status) -{ - uint32_t unused = 0; - SVC_CALL0(SVC_EXIT, unused); -} - -uint32_t svc_map_user_stack(void *start_addr, void *end_addr, void *stack_va) -{ - uint32_t retval = 0; - SVC_CALL3(SVC_MAP_USER_STACK, (uint32_t)start_addr, - (uint32_t)end_addr, stack_va, retval); - return retval; -} - -void svc_debug_print(const char *string) -{ - uint32_t unused = 0; - SVC_CALL1(SVC_DEBUG_PRINT, (uint32_t)string, unused); -} - -void svc_debug_print_ex(uint32_t dword0, - uint32_t dword1, uint32_t dword2, uint32_t dword3) -{ - uint32_t unused = 0; - SVC_CALL4(SVC_DEBUG_PRINT_EX, dword0, dword1, dword2, dword3, unused); -} - -uint32_t svc_wait_10ns_multiple(uint32_t multiple) -{ - uint32_t retval = 0; - SVC_CALL1(SVC_WAIT_10NS_MULTIPLE, multiple, retval); - return retval; -} - -uint32_t svc_get_boot_mode(uint32_t *boot_mode) -{ - uint32_t retval = 0; - SVC_CALL1(SVC_GET_BOOT_MODE, boot_mode, retval); - return retval; -} - -void svc_delay_in_usec(uint32_t delay) -{ - uint32_t unused = 0; - SVC_CALL1(SVC_DELAY_IN_MICRO_SECONDS, delay, unused); -} - -uint32_t svc_get_spi_rom_info(struct spirom_info *spi_rom_info) -{ - uint32_t retval = 0; - SVC_CALL1(SVC_GET_SPI_INFO, (uint32_t)spi_rom_info, retval); - return retval; -} - -uint32_t svc_map_fch_dev(enum fch_io_device io_device, - uint32_t arg1, uint32_t arg2, void **io_device_axi_addr) -{ - uint32_t retval = 0; - assert(io_device < FCH_IO_DEVICE_END); - SVC_CALL4(SVC_MAP_FCH_IO_DEVICE, io_device, arg1, arg2, - (uint32_t)io_device_axi_addr, retval); - return retval; -} - -uint32_t svc_unmap_fch_dev(enum fch_io_device io_device, void *io_device_axi_addr) -{ - uint32_t retval = 0; - assert(io_device < FCH_IO_DEVICE_END); - SVC_CALL2(SVC_UNMAP_FCH_IO_DEVICE, (uint32_t)io_device, - (uint32_t)io_device_axi_addr, retval); - return retval; -} - -uint32_t svc_map_spi_rom(void *spi_rom_addr, - uint32_t size, void **spi_rom_axi_addr) -{ - uint32_t retval = 0; - SVC_CALL3(SVC_MAP_SPIROM_DEVICE, spi_rom_addr, size, - (uint32_t)spi_rom_axi_addr, retval); - return retval; -} - -uint32_t svc_unmap_spi_rom(void *spi_rom_addr) -{ - uint32_t retval = 0; - SVC_CALL1(SVC_UNMAP_SPIROM_DEVICE, (uint32_t)spi_rom_addr, retval); - return retval; -} - -uint32_t svc_update_psp_bios_dir(uint32_t *psp_dir_offset, - uint32_t *bios_dir_offset, enum dir_offset_operation operation) -{ - uint32_t retval = 0; - assert(operation < DIR_OFFSET_OPERATION_MAX); - SVC_CALL3(SVC_UPDATE_PSP_BIOS_DIR, (uint32_t)psp_dir_offset, - (uint32_t)bios_dir_offset, operation, retval); - return retval; -} - -uint32_t svc_save_uapp_data(enum uapp_copybuf type, void *address, - uint32_t size) -{ - uint32_t retval = 0; - assert(type < UAPP_COPYBUF_MAX); - SVC_CALL3(SVC_COPY_DATA_FROM_UAPP, type, (uint32_t)address, size, retval); - return retval; -} - -uint32_t svc_read_timer_val(enum psp_timer_type type, uint64_t *counter_value) -{ - unsigned int retval = 0; - assert(type < PSP_TIMER_TYPE_MAX); - SVC_CALL2(SVC_READ_TIMER_VAL, type, counter_value, retval); - return retval; -} - -uint32_t svc_reset_system(enum reset_type reset_type) -{ - unsigned int retval = 0; - assert(reset_type < RESET_TYPE_MAX); - SVC_CALL1(SVC_RESET_SYSTEM, reset_type, retval); - return retval; -} - -uint32_t svc_write_postcode(uint32_t postcode) -{ - uint32_t retval = 0; - SVC_CALL1(SVC_WRITE_POSTCODE, postcode, retval); - return retval; -} - -uint32_t svc_get_max_workbuf_size(uint32_t *size) -{ - uint32_t retval = 0; - SVC_CALL1(SVC_GET_MAX_WORKBUF_SIZE, size, retval); - return retval; -} - -uint32_t svc_crypto_sha(struct sha_generic_data *sha_op, enum sha_operation_mode sha_mode) -{ - uint32_t retval = 0; - SVC_CALL2(SVC_SHA, sha_op, sha_mode, retval); - return retval; -} - -uint32_t svc_rsa_pkcs_verify(const struct rsapkcs_verify_params *rsa_params) -{ - uint32_t retval = 0; - SVC_CALL1(SVC_RSAPKCS_VERIFY, rsa_params, retval); - return retval; -} - -uint32_t svc_modexp(struct mod_exp_params *mod_exp_param) -{ - uint32_t retval = 0; - SVC_CALL1(SVC_MODEXP, mod_exp_param, retval); - return retval; -} diff --git a/src/soc/amd/common/psp_verstage/svc.h b/src/soc/amd/common/psp_verstage/svc.h deleted file mode 100644 index 03bae066e0..0000000000 --- a/src/soc/amd/common/psp_verstage/svc.h +++ /dev/null @@ -1,57 +0,0 @@ -/* SPDX-License-Identifier: GPL-2.0-only */ - -#ifndef PSP_VERSTAGE_SVC_H -#define PSP_VERSTAGE_SVC_H - -#define SVC_CALL4(SVC_ID, R0, R1, R2, R3, Ret) \ - __asm__ __volatile__ ( \ - "mov r0, %[reg0]\n\t" \ - "mov r1, %[reg1]\n\t" \ - "mov r2, %[reg2]\n\t" \ - "mov r3, %[reg3]\n\t" \ - "svc %[id]\n\t" \ - "mov %[result], r0\n\t" \ - : [result] "=r" (Ret) /* output */ \ - : [id] "i" (SVC_ID), [reg0] "r" (R0), [reg1] "r" (R1), [reg2] "r" (R2), \ - [reg3] "r" (R3) /* input(s) */ \ - : "r0", "r1", "r2", "r3", "memory", "cc" /* list of clobbered registers */); - -#define SVC_CALL3(SVC_ID, R0, R1, R2, Ret) \ - __asm__ __volatile__ ( \ - "mov r0, %[reg0]\n\t" \ - "mov r1, %[reg1]\n\t" \ - "mov r2, %[reg2]\n\t" \ - "svc %[id]\n\t" \ - "mov %[result], r0\n\t" \ - : [result] "=r" (Ret) /* output */ \ - : [id] "i" (SVC_ID), [reg0] "r" (R0), [reg1] "r" (R1), [reg2] "r" (R2) \ - : "r0", "r1", "r2", "memory", "cc" /* list of clobbered registers */); - -#define SVC_CALL2(SVC_ID, R0, R1, Ret) \ - __asm__ __volatile__ ( \ - "mov r0, %[reg0]\n\t" \ - "mov r1, %[reg1]\n\t" \ - "svc %[id]\n\t" \ - "mov %[result], r0\n\t" \ - : [result] "=r" (Ret) /* output */ \ - : [id] "i" (SVC_ID), [reg0] "r" (R0), [reg1] "r" (R1)/* input(s) */ \ - : "r0", "r1", "memory", "cc" /* list of clobbered registers */); - -#define SVC_CALL1(SVC_ID, R0, Ret) \ - __asm__ __volatile__ ( \ - "mov r0, %[reg0]\n\t" \ - "svc %[id]\n\t" \ - "mov %[result], r0\n\t" \ - : [result] "=r" (Ret) /* output */ \ - : [id] "i" (SVC_ID), [reg0] "r" (R0) /* input(s) */ \ - : "r0", "memory", "cc" /* list of clobbered registers */); - -#define SVC_CALL0(SVC_ID, Ret) \ - __asm__ __volatile__ ( \ - "svc %[id]\n\t" \ - "mov %[result], r0\n\t" \ - : [result] "=r" (Ret) /* output */ \ - : [id] "I" (SVC_ID) /* input(s) */ \ - : "memory", "cc" /* list of clobbered registers */); - -#endif /* PSP_VERSTAGE_SVC_H */ diff --git a/src/soc/amd/picasso/psp_verstage/Makefile.inc b/src/soc/amd/picasso/psp_verstage/Makefile.inc index e70360fa51..32b594d2cb 100644 --- a/src/soc/amd/picasso/psp_verstage/Makefile.inc +++ b/src/soc/amd/picasso/psp_verstage/Makefile.inc @@ -3,5 +3,7 @@ verstage-generic-ccopts += -I$(src)/soc/amd/picasso/psp_verstage/include verstage-generic-ccopts += -I$(src)/vendorcode/amd/fsp/picasso/include +verstage-y += svc.c + verstage-y += $(top)/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_startup.S verstage-y += $(top)/src/vendorcode/amd/fsp/picasso/bl_uapp/bl_uapp_end.S diff --git a/src/soc/amd/picasso/psp_verstage/svc.c b/src/soc/amd/picasso/psp_verstage/svc.c new file mode 100644 index 0000000000..a20c2a618f --- /dev/null +++ b/src/soc/amd/picasso/psp_verstage/svc.c @@ -0,0 +1,178 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#include "svc.h" + +#include +#include +#include +#include + +void svc_exit(uint32_t status) +{ + uint32_t unused = 0; + SVC_CALL0(SVC_EXIT, unused); +} + +uint32_t svc_map_user_stack(void *start_addr, void *end_addr, void *stack_va) +{ + uint32_t retval = 0; + SVC_CALL3(SVC_MAP_USER_STACK, (uint32_t)start_addr, + (uint32_t)end_addr, stack_va, retval); + return retval; +} + +void svc_debug_print(const char *string) +{ + uint32_t unused = 0; + SVC_CALL1(SVC_DEBUG_PRINT, (uint32_t)string, unused); +} + +void svc_debug_print_ex(uint32_t dword0, + uint32_t dword1, uint32_t dword2, uint32_t dword3) +{ + uint32_t unused = 0; + SVC_CALL4(SVC_DEBUG_PRINT_EX, dword0, dword1, dword2, dword3, unused); +} + +uint32_t svc_wait_10ns_multiple(uint32_t multiple) +{ + uint32_t retval = 0; + SVC_CALL1(SVC_WAIT_10NS_MULTIPLE, multiple, retval); + return retval; +} + +uint32_t svc_get_boot_mode(uint32_t *boot_mode) +{ + uint32_t retval = 0; + SVC_CALL1(SVC_GET_BOOT_MODE, boot_mode, retval); + return retval; +} + +void svc_delay_in_usec(uint32_t delay) +{ + uint32_t unused = 0; + SVC_CALL1(SVC_DELAY_IN_MICRO_SECONDS, delay, unused); +} + +uint32_t svc_get_spi_rom_info(struct spirom_info *spi_rom_info) +{ + uint32_t retval = 0; + SVC_CALL1(SVC_GET_SPI_INFO, (uint32_t)spi_rom_info, retval); + return retval; +} + +uint32_t svc_map_fch_dev(enum fch_io_device io_device, + uint32_t arg1, uint32_t arg2, void **io_device_axi_addr) +{ + uint32_t retval = 0; + assert(io_device < FCH_IO_DEVICE_END); + SVC_CALL4(SVC_MAP_FCH_IO_DEVICE, io_device, arg1, arg2, + (uint32_t)io_device_axi_addr, retval); + return retval; +} + +uint32_t svc_unmap_fch_dev(enum fch_io_device io_device, void *io_device_axi_addr) +{ + uint32_t retval = 0; + assert(io_device < FCH_IO_DEVICE_END); + SVC_CALL2(SVC_UNMAP_FCH_IO_DEVICE, (uint32_t)io_device, + (uint32_t)io_device_axi_addr, retval); + return retval; +} + +uint32_t svc_map_spi_rom(void *spi_rom_addr, + uint32_t size, void **spi_rom_axi_addr) +{ + uint32_t retval = 0; + SVC_CALL3(SVC_MAP_SPIROM_DEVICE, spi_rom_addr, size, + (uint32_t)spi_rom_axi_addr, retval); + return retval; +} + +uint32_t svc_unmap_spi_rom(void *spi_rom_addr) +{ + uint32_t retval = 0; + SVC_CALL1(SVC_UNMAP_SPIROM_DEVICE, (uint32_t)spi_rom_addr, retval); + return retval; +} + +uint32_t update_psp_bios_dir(uint32_t *psp_dir_offset, uint32_t *bios_dir_offset) +{ + return svc_update_psp_bios_dir(psp_dir_offset, bios_dir_offset, + DIR_OFFSET_SET); +} + +uint32_t svc_update_psp_bios_dir(uint32_t *psp_dir_offset, + uint32_t *bios_dir_offset, enum dir_offset_operation operation) +{ + uint32_t retval = 0; + assert(operation < DIR_OFFSET_OPERATION_MAX); + SVC_CALL3(SVC_UPDATE_PSP_BIOS_DIR, (uint32_t)psp_dir_offset, + (uint32_t)bios_dir_offset, operation, retval); + return retval; +} + +uint32_t save_uapp_data(void *address, uint32_t size) +{ + return svc_save_uapp_data(UAPP_COPYBUF_CHROME_WORKBUF, address, size); +} + +uint32_t svc_save_uapp_data(enum uapp_copybuf type, void *address, + uint32_t size) +{ + uint32_t retval = 0; + assert(type < UAPP_COPYBUF_MAX); + SVC_CALL3(SVC_COPY_DATA_FROM_UAPP, type, (uint32_t)address, size, retval); + return retval; +} + +uint32_t svc_read_timer_val(enum psp_timer_type type, uint64_t *counter_value) +{ + unsigned int retval = 0; + assert(type < PSP_TIMER_TYPE_MAX); + SVC_CALL2(SVC_READ_TIMER_VAL, type, counter_value, retval); + return retval; +} + +uint32_t svc_reset_system(enum reset_type reset_type) +{ + unsigned int retval = 0; + assert(reset_type < RESET_TYPE_MAX); + SVC_CALL1(SVC_RESET_SYSTEM, reset_type, retval); + return retval; +} + +uint32_t svc_write_postcode(uint32_t postcode) +{ + uint32_t retval = 0; + SVC_CALL1(SVC_WRITE_POSTCODE, postcode, retval); + return retval; +} + +uint32_t svc_get_max_workbuf_size(uint32_t *size) +{ + uint32_t retval = 0; + SVC_CALL1(SVC_GET_MAX_WORKBUF_SIZE, size, retval); + return retval; +} + +uint32_t svc_crypto_sha(struct sha_generic_data *sha_op, enum sha_operation_mode sha_mode) +{ + uint32_t retval = 0; + SVC_CALL2(SVC_SHA, sha_op, sha_mode, retval); + return retval; +} + +uint32_t svc_rsa_pkcs_verify(const struct rsapkcs_verify_params *rsa_params) +{ + uint32_t retval = 0; + SVC_CALL1(SVC_RSAPKCS_VERIFY, rsa_params, retval); + return retval; +} + +uint32_t svc_modexp(struct mod_exp_params *mod_exp_param) +{ + uint32_t retval = 0; + SVC_CALL1(SVC_MODEXP, mod_exp_param, retval); + return retval; +} diff --git a/src/soc/amd/picasso/psp_verstage/svc.h b/src/soc/amd/picasso/psp_verstage/svc.h new file mode 100644 index 0000000000..03bae066e0 --- /dev/null +++ b/src/soc/amd/picasso/psp_verstage/svc.h @@ -0,0 +1,57 @@ +/* SPDX-License-Identifier: GPL-2.0-only */ + +#ifndef PSP_VERSTAGE_SVC_H +#define PSP_VERSTAGE_SVC_H + +#define SVC_CALL4(SVC_ID, R0, R1, R2, R3, Ret) \ + __asm__ __volatile__ ( \ + "mov r0, %[reg0]\n\t" \ + "mov r1, %[reg1]\n\t" \ + "mov r2, %[reg2]\n\t" \ + "mov r3, %[reg3]\n\t" \ + "svc %[id]\n\t" \ + "mov %[result], r0\n\t" \ + : [result] "=r" (Ret) /* output */ \ + : [id] "i" (SVC_ID), [reg0] "r" (R0), [reg1] "r" (R1), [reg2] "r" (R2), \ + [reg3] "r" (R3) /* input(s) */ \ + : "r0", "r1", "r2", "r3", "memory", "cc" /* list of clobbered registers */); + +#define SVC_CALL3(SVC_ID, R0, R1, R2, Ret) \ + __asm__ __volatile__ ( \ + "mov r0, %[reg0]\n\t" \ + "mov r1, %[reg1]\n\t" \ + "mov r2, %[reg2]\n\t" \ + "svc %[id]\n\t" \ + "mov %[result], r0\n\t" \ + : [result] "=r" (Ret) /* output */ \ + : [id] "i" (SVC_ID), [reg0] "r" (R0), [reg1] "r" (R1), [reg2] "r" (R2) \ + : "r0", "r1", "r2", "memory", "cc" /* list of clobbered registers */); + +#define SVC_CALL2(SVC_ID, R0, R1, Ret) \ + __asm__ __volatile__ ( \ + "mov r0, %[reg0]\n\t" \ + "mov r1, %[reg1]\n\t" \ + "svc %[id]\n\t" \ + "mov %[result], r0\n\t" \ + : [result] "=r" (Ret) /* output */ \ + : [id] "i" (SVC_ID), [reg0] "r" (R0), [reg1] "r" (R1)/* input(s) */ \ + : "r0", "r1", "memory", "cc" /* list of clobbered registers */); + +#define SVC_CALL1(SVC_ID, R0, Ret) \ + __asm__ __volatile__ ( \ + "mov r0, %[reg0]\n\t" \ + "svc %[id]\n\t" \ + "mov %[result], r0\n\t" \ + : [result] "=r" (Ret) /* output */ \ + : [id] "i" (SVC_ID), [reg0] "r" (R0) /* input(s) */ \ + : "r0", "memory", "cc" /* list of clobbered registers */); + +#define SVC_CALL0(SVC_ID, Ret) \ + __asm__ __volatile__ ( \ + "svc %[id]\n\t" \ + "mov %[result], r0\n\t" \ + : [result] "=r" (Ret) /* output */ \ + : [id] "I" (SVC_ID) /* input(s) */ \ + : "memory", "cc" /* list of clobbered registers */); + +#endif /* PSP_VERSTAGE_SVC_H */ -- cgit v1.2.3