From b915faedd503f7904fef9f7ff531262981061473 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Mon, 9 Dec 2019 08:08:58 +0200 Subject: sb/amd/{agesa,pi}/hudson: Use simple PCI config accessor MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I3d8e21e17a0f870d854694e326b10f7d2d04e5ad Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/37596 Reviewed-by: Angel Pons Reviewed-by: HAOUAS Elyes Reviewed-by: Michał Żygowski Tested-by: build bot (Jenkins) --- src/southbridge/amd/agesa/hudson/reset.c | 4 ++-- src/southbridge/amd/pi/hudson/reset.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/southbridge/amd/agesa/hudson/reset.c b/src/southbridge/amd/agesa/hudson/reset.c index e3290384dc..ff77eb87d3 100644 --- a/src/southbridge/amd/agesa/hudson/reset.c +++ b/src/southbridge/amd/agesa/hudson/reset.c @@ -28,9 +28,9 @@ void cf9_reset_prepare(void) { u32 htic; - htic = pci_io_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); + htic = pci_s_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); htic &= ~HTIC_BIOSR_Detect; - pci_io_write_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL, htic); + pci_s_write_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL, htic); } void do_board_reset(void) diff --git a/src/southbridge/amd/pi/hudson/reset.c b/src/southbridge/amd/pi/hudson/reset.c index e3290384dc..ff77eb87d3 100644 --- a/src/southbridge/amd/pi/hudson/reset.c +++ b/src/southbridge/amd/pi/hudson/reset.c @@ -28,9 +28,9 @@ void cf9_reset_prepare(void) { u32 htic; - htic = pci_io_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); + htic = pci_s_read_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL); htic &= ~HTIC_BIOSR_Detect; - pci_io_write_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL, htic); + pci_s_write_config32(PCI_DEV(0, 0x18, 0), HT_INIT_CONTROL, htic); } void do_board_reset(void) -- cgit v1.2.3