From c328a680def0f589536c24ff547465bd7eb3546d Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Sat, 23 Nov 2019 07:23:40 +0200 Subject: soc,southbridge/intel: Control SMI related FADT entries MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit When no SMI is installed, FADT should not advertise a trigger mechanism that does not respond. Change-Id: Ifb4f99c11a72e75ec20b9faaf62aed5546de91fa Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/41909 Reviewed-by: Angel Pons Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) --- src/soc/intel/baytrail/acpi.c | 12 ++++++------ src/soc/intel/braswell/acpi.c | 12 ++++++------ src/soc/intel/broadwell/acpi.c | 12 ++++++------ src/soc/intel/common/block/acpi/acpi.c | 11 ++++++----- src/soc/intel/denverton_ns/acpi.c | 9 +-------- src/soc/intel/skylake/acpi.c | 12 ++++++------ src/soc/intel/xeon_sp/cpx/acpi.c | 10 ---------- src/soc/intel/xeon_sp/skx/acpi.c | 28 ++++++++-------------------- src/southbridge/intel/bd82x6x/lpc.c | 12 ++++++------ src/southbridge/intel/i82371eb/fadt.c | 11 +++++------ src/southbridge/intel/i82801gx/lpc.c | 14 ++++++++------ src/southbridge/intel/i82801jx/lpc.c | 14 ++++++++------ src/southbridge/intel/ibexpeak/lpc.c | 12 ++++++------ src/southbridge/intel/lynxpoint/lpc.c | 12 ++++++------ 14 files changed, 78 insertions(+), 103 deletions(-) diff --git a/src/soc/intel/baytrail/acpi.c b/src/soc/intel/baytrail/acpi.c index 66cdc3d132..66263e6748 100644 --- a/src/soc/intel/baytrail/acpi.c +++ b/src/soc/intel/baytrail/acpi.c @@ -128,11 +128,12 @@ void acpi_fill_in_fadt(acpi_fadt_t *fadt) const uint16_t pmbase = ACPI_BASE_ADDRESS; fadt->sci_int = acpi_sci_irq(); - fadt->smi_cmd = APM_CNT; - fadt->acpi_enable = APM_CNT_ACPI_ENABLE; - fadt->acpi_disable = APM_CNT_ACPI_DISABLE; - fadt->s4bios_req = 0x0; - fadt->pstate_cnt = 0; + + if (CONFIG(HAVE_SMI_HANDLER)) { + fadt->smi_cmd = APM_CNT; + fadt->acpi_enable = APM_CNT_ACPI_ENABLE; + fadt->acpi_disable = APM_CNT_ACPI_DISABLE; + } fadt->pm1a_evt_blk = pmbase + PM1_STS; fadt->pm1b_evt_blk = 0x0; @@ -150,7 +151,6 @@ void acpi_fill_in_fadt(acpi_fadt_t *fadt) fadt->gpe0_blk_len = 2 * (GPE0_EN - GPE0_STS); fadt->gpe1_blk_len = 0; fadt->gpe1_base = 0; - fadt->cst_cnt = 0; fadt->p_lvl2_lat = 1; fadt->p_lvl3_lat = 87; fadt->flush_size = 1024; diff --git a/src/soc/intel/braswell/acpi.c b/src/soc/intel/braswell/acpi.c index a3025c23c6..4e3795e6ed 100644 --- a/src/soc/intel/braswell/acpi.c +++ b/src/soc/intel/braswell/acpi.c @@ -132,11 +132,12 @@ void acpi_fill_in_fadt(acpi_fadt_t *fadt) const uint16_t pmbase = ACPI_BASE_ADDRESS; fadt->sci_int = acpi_sci_irq(); - fadt->smi_cmd = APM_CNT; - fadt->acpi_enable = APM_CNT_ACPI_ENABLE; - fadt->acpi_disable = APM_CNT_ACPI_DISABLE; - fadt->s4bios_req = 0x0; - fadt->pstate_cnt = 0; + + if (CONFIG(HAVE_SMI_HANDLER)) { + fadt->smi_cmd = APM_CNT; + fadt->acpi_enable = APM_CNT_ACPI_ENABLE; + fadt->acpi_disable = APM_CNT_ACPI_DISABLE; + } fadt->pm1a_evt_blk = pmbase + PM1_STS; fadt->pm1b_evt_blk = 0x0; @@ -154,7 +155,6 @@ void acpi_fill_in_fadt(acpi_fadt_t *fadt) fadt->gpe0_blk_len = 2 * (GPE0_EN - GPE0_STS); fadt->gpe1_blk_len = 0; fadt->gpe1_base = 0; - fadt->cst_cnt = 0; fadt->p_lvl2_lat = 1; fadt->p_lvl3_lat = 87; fadt->flush_size = 1024; diff --git a/src/soc/intel/broadwell/acpi.c b/src/soc/intel/broadwell/acpi.c index 316b85a1e5..9df7dee26b 100644 --- a/src/soc/intel/broadwell/acpi.c +++ b/src/soc/intel/broadwell/acpi.c @@ -184,11 +184,12 @@ void acpi_fill_in_fadt(acpi_fadt_t *fadt) const uint16_t pmbase = ACPI_BASE_ADDRESS; fadt->sci_int = acpi_sci_irq(); - fadt->smi_cmd = APM_CNT; - fadt->acpi_enable = APM_CNT_ACPI_ENABLE; - fadt->acpi_disable = APM_CNT_ACPI_DISABLE; - fadt->s4bios_req = 0x0; - fadt->pstate_cnt = 0; + + if (CONFIG(HAVE_SMI_HANDLER)) { + fadt->smi_cmd = APM_CNT; + fadt->acpi_enable = APM_CNT_ACPI_ENABLE; + fadt->acpi_disable = APM_CNT_ACPI_DISABLE; + } fadt->pm1a_evt_blk = pmbase + PM1_STS; fadt->pm1b_evt_blk = 0x0; @@ -206,7 +207,6 @@ void acpi_fill_in_fadt(acpi_fadt_t *fadt) fadt->gpe0_blk_len = 32; fadt->gpe1_blk_len = 0; fadt->gpe1_base = 0; - fadt->cst_cnt = 0; fadt->p_lvl2_lat = 1; fadt->p_lvl3_lat = 87; fadt->flush_size = 1024; diff --git a/src/soc/intel/common/block/acpi/acpi.c b/src/soc/intel/common/block/acpi/acpi.c index 70a9cac9b1..c4a069850d 100644 --- a/src/soc/intel/common/block/acpi/acpi.c +++ b/src/soc/intel/common/block/acpi/acpi.c @@ -100,11 +100,12 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->header.revision = get_acpi_table_revision(FADT); fadt->sci_int = acpi_sci_irq(); - fadt->smi_cmd = APM_CNT; - fadt->acpi_enable = APM_CNT_ACPI_ENABLE; - fadt->acpi_disable = APM_CNT_ACPI_DISABLE; - fadt->s4bios_req = 0x0; - fadt->pstate_cnt = 0; + + if (CONFIG(HAVE_SMI_HANDLER)) { + fadt->smi_cmd = APM_CNT; + fadt->acpi_enable = APM_CNT_ACPI_ENABLE; + fadt->acpi_disable = APM_CNT_ACPI_DISABLE; + } fadt->pm1a_evt_blk = pmbase + PM1_STS; fadt->pm1b_evt_blk = 0x0; diff --git a/src/soc/intel/denverton_ns/acpi.c b/src/soc/intel/denverton_ns/acpi.c index 4041ca2d26..15d2e6611f 100644 --- a/src/soc/intel/denverton_ns/acpi.c +++ b/src/soc/intel/denverton_ns/acpi.c @@ -121,13 +121,6 @@ void soc_fill_fadt(acpi_fadt_t *fadt) { u16 pmbase = get_pmbase(); - /* System Management */ - if (!CONFIG(HAVE_SMI_HANDLER)) { - fadt->smi_cmd = 0x00; - fadt->acpi_enable = 0x00; - fadt->acpi_disable = 0x00; - } - /* Power Control */ fadt->pm2_cnt_blk = pmbase + PM2_CNT; fadt->pm_tmr_blk = pmbase + PM1_TMR; @@ -139,7 +132,7 @@ void soc_fill_fadt(acpi_fadt_t *fadt) fadt->gpe0_blk_len = 8; fadt->gpe1_blk_len = 0; fadt->gpe1_base = 0; - fadt->cst_cnt = 0; + fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED; fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; fadt->flush_size = 0; /* set to 0 if WBINVD is 1 in flags */ diff --git a/src/soc/intel/skylake/acpi.c b/src/soc/intel/skylake/acpi.c index c5d709fff5..34aed02ee8 100644 --- a/src/soc/intel/skylake/acpi.c +++ b/src/soc/intel/skylake/acpi.c @@ -225,11 +225,12 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->header.revision = get_acpi_table_revision(FADT); fadt->sci_int = acpi_sci_irq(); - fadt->smi_cmd = APM_CNT; - fadt->acpi_enable = APM_CNT_ACPI_ENABLE; - fadt->acpi_disable = APM_CNT_ACPI_DISABLE; - fadt->s4bios_req = 0x0; - fadt->pstate_cnt = 0; + + if (CONFIG(HAVE_SMI_HANDLER)) { + fadt->smi_cmd = APM_CNT; + fadt->acpi_enable = APM_CNT_ACPI_ENABLE; + fadt->acpi_disable = APM_CNT_ACPI_DISABLE; + } fadt->pm1a_evt_blk = pmbase + PM1_STS; fadt->pm1b_evt_blk = 0x0; @@ -248,7 +249,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->gpe0_blk_len = 2 * GPE0_REG_MAX * sizeof(uint32_t); fadt->gpe1_blk_len = 0; fadt->gpe1_base = 0; - fadt->cst_cnt = 0; fadt->p_lvl2_lat = 1; fadt->p_lvl3_lat = 87; fadt->flush_size = 1024; diff --git a/src/soc/intel/xeon_sp/cpx/acpi.c b/src/soc/intel/xeon_sp/cpx/acpi.c index 334b1b7680..d6d847bd8b 100644 --- a/src/soc/intel/xeon_sp/cpx/acpi.c +++ b/src/soc/intel/xeon_sp/cpx/acpi.c @@ -152,16 +152,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->smi_cmd = APM_CNT; fadt->acpi_enable = APM_CNT_ACPI_ENABLE; fadt->acpi_disable = APM_CNT_ACPI_DISABLE; - fadt->s4bios_req = 0; - fadt->pstate_cnt = 0; - fadt->cst_cnt = 0; - } else { - fadt->smi_cmd = 0; - fadt->acpi_enable = 0; - fadt->acpi_disable = 0; - fadt->s4bios_req = 0; - fadt->pstate_cnt = 0; - fadt->cst_cnt = 0; } /* General-Purpose Event Registers */ diff --git a/src/soc/intel/xeon_sp/skx/acpi.c b/src/soc/intel/xeon_sp/skx/acpi.c index 71119c0d3b..9cb36b8229 100644 --- a/src/soc/intel/xeon_sp/skx/acpi.c +++ b/src/soc/intel/xeon_sp/skx/acpi.c @@ -6,6 +6,7 @@ #include #include #include +#include #include #include #include @@ -227,13 +228,6 @@ void soc_fill_fadt(acpi_fadt_t *fadt) { uint16_t pmbase = ACPI_BASE_ADDRESS; - /* System Management */ - if (!CONFIG(HAVE_SMI_HANDLER)) { - fadt->smi_cmd = 0x00; - fadt->acpi_enable = 0x00; - fadt->acpi_disable = 0x00; - } - /* Power Control */ fadt->pm2_cnt_blk = pmbase + PM2_CNT; fadt->pm_tmr_blk = pmbase + PM1_TMR; @@ -246,7 +240,6 @@ void soc_fill_fadt(acpi_fadt_t *fadt) fadt->gpe0_blk_len = 2 * GPE0_REG_MAX * sizeof(uint32_t); fadt->gpe1_blk_len = 0; fadt->gpe1_base = 0; - fadt->cst_cnt = 0; fadt->p_lvl2_lat = ACPI_FADT_C2_NOT_SUPPORTED; fadt->p_lvl3_lat = ACPI_FADT_C3_NOT_SUPPORTED; fadt->flush_size = 0; /* set to 0 if WBINVD is 1 in flags */ @@ -345,17 +338,13 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->header.revision = get_acpi_table_revision(FADT); fadt->sci_int = acpi_sci_irq(); - /* - TODO: enabled SMM mode switch when SMM handlers are set up. - fadt->smi_cmd = APM_CNT; - fadt->acpi_enable = APM_CNT_ACPI_ENABLE; - fadt->acpi_disable = APM_CNT_ACPI_DISABLE; - */ - fadt->smi_cmd = 0x00; - fadt->acpi_enable = 0x00; - fadt->acpi_disable = 0x00; - fadt->s4bios_req = 0x0; - fadt->pstate_cnt = 0; + + /* TODO: enabled SMM mode switch when SMM handlers are set up. */ + if (0 && CONFIG(HAVE_SMI_HANDLER)) { + fadt->smi_cmd = APM_CNT; + fadt->acpi_enable = APM_CNT_ACPI_ENABLE; + fadt->acpi_disable = APM_CNT_ACPI_DISABLE; + } fadt->pm1a_evt_blk = pmbase + PM1_STS; fadt->pm1b_evt_blk = 0x0; @@ -374,7 +363,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->gpe0_blk_len = 2 * GPE0_REG_MAX * sizeof(uint32_t); fadt->gpe1_blk_len = 0; fadt->gpe1_base = 0; - fadt->cst_cnt = 0; fadt->p_lvl2_lat = 1; fadt->p_lvl3_lat = 87; fadt->flush_size = 1024; diff --git a/src/southbridge/intel/bd82x6x/lpc.c b/src/southbridge/intel/bd82x6x/lpc.c index 55e2573eff..45215f1c94 100644 --- a/src/southbridge/intel/bd82x6x/lpc.c +++ b/src/southbridge/intel/bd82x6x/lpc.c @@ -697,11 +697,12 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->reserved = 0; fadt->sci_int = 0x9; - fadt->smi_cmd = APM_CNT; - fadt->acpi_enable = APM_CNT_ACPI_ENABLE; - fadt->acpi_disable = APM_CNT_ACPI_DISABLE; - fadt->s4bios_req = 0x0; - fadt->pstate_cnt = 0; + + if (CONFIG(HAVE_SMI_HANDLER)) { + fadt->smi_cmd = APM_CNT; + fadt->acpi_enable = APM_CNT_ACPI_ENABLE; + fadt->acpi_disable = APM_CNT_ACPI_DISABLE; + } fadt->pm1a_evt_blk = pmbase; fadt->pm1b_evt_blk = 0x0; @@ -719,7 +720,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->gpe0_blk_len = 16; fadt->gpe1_blk_len = 0; fadt->gpe1_base = 0; - fadt->cst_cnt = 0; c2_latency = chip->c2_latency; if (!c2_latency) { c2_latency = 101; /* c2 unsupported */ diff --git a/src/southbridge/intel/i82371eb/fadt.c b/src/southbridge/intel/i82371eb/fadt.c index 921edf3c5a..09e027f407 100644 --- a/src/southbridge/intel/i82371eb/fadt.c +++ b/src/southbridge/intel/i82371eb/fadt.c @@ -35,11 +35,11 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) fadt->dsdt = (uintptr_t)dsdt; fadt->preferred_pm_profile = 0; /* unspecified */ fadt->sci_int = 9; - fadt->smi_cmd = 0; /* smi command port */ - fadt->acpi_enable = 0; /* acpi enable smi command */ - fadt->acpi_disable = 0; /* acpi disable smi command */ - fadt->s4bios_req = 0x0; - fadt->pstate_cnt = 0x0; + + if (CONFIG(HAVE_SMI_HANDLER)) { + /* TODO: SMI handler is not implemented. */ + fadt->smi_cmd = 0x00; + } fadt->pm1a_evt_blk = DEFAULT_PMBASE; fadt->pm1b_evt_blk = 0x0; @@ -60,7 +60,6 @@ void acpi_create_fadt(acpi_fadt_t *fadt, acpi_facs_t *facs, void *dsdt) fadt->pm_tmr_len = 4; fadt->gpe0_blk_len = 4; - fadt->cst_cnt = 0; /* smi command to indicate c state changed notification */ fadt->p_lvl2_lat = 101; /* >100 means c2 not supported */ fadt->p_lvl3_lat = 1001; /* >1000 means c3 not supported */ fadt->flush_size = 0; /* only needed if CPU wbinvd is broken */ diff --git a/src/southbridge/intel/i82801gx/lpc.c b/src/southbridge/intel/i82801gx/lpc.c index 7e2b5a7ca6..86c3e58750 100644 --- a/src/southbridge/intel/i82801gx/lpc.c +++ b/src/southbridge/intel/i82801gx/lpc.c @@ -521,13 +521,15 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->reserved = 0; fadt->sci_int = 0x9; - fadt->smi_cmd = APM_CNT; - fadt->acpi_enable = APM_CNT_ACPI_ENABLE; - fadt->acpi_disable = APM_CNT_ACPI_DISABLE; - fadt->s4bios_req = 0x0; - fadt->pstate_cnt = APM_CNT_PST_CONTROL; - fadt->cst_cnt = APM_CNT_CST_CONTROL; + if (CONFIG(HAVE_SMI_HANDLER)) { + fadt->smi_cmd = APM_CNT; + fadt->acpi_enable = APM_CNT_ACPI_ENABLE; + fadt->acpi_disable = APM_CNT_ACPI_DISABLE; + fadt->pstate_cnt = APM_CNT_PST_CONTROL; + fadt->cst_cnt = APM_CNT_CST_CONTROL; + } + fadt->p_lvl2_lat = 1; fadt->p_lvl3_lat = chip->c3_latency; fadt->flush_size = 0; diff --git a/src/southbridge/intel/i82801jx/lpc.c b/src/southbridge/intel/i82801jx/lpc.c index ae98fddc2a..b3aeda22f7 100644 --- a/src/southbridge/intel/i82801jx/lpc.c +++ b/src/southbridge/intel/i82801jx/lpc.c @@ -532,13 +532,15 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->reserved = 0; fadt->sci_int = 0x9; - fadt->smi_cmd = APM_CNT; - fadt->acpi_enable = APM_CNT_ACPI_ENABLE; - fadt->acpi_disable = APM_CNT_ACPI_DISABLE; - fadt->s4bios_req = 0x0; - fadt->pstate_cnt = APM_CNT_PST_CONTROL; - fadt->cst_cnt = APM_CNT_CST_CONTROL; + if (CONFIG(HAVE_SMI_HANDLER)) { + fadt->smi_cmd = APM_CNT; + fadt->acpi_enable = APM_CNT_ACPI_ENABLE; + fadt->acpi_disable = APM_CNT_ACPI_DISABLE; + fadt->cst_cnt = APM_CNT_CST_CONTROL; + fadt->pstate_cnt = APM_CNT_PST_CONTROL; + } + fadt->p_lvl2_lat = 1; fadt->p_lvl3_lat = chip->c3_latency; fadt->flush_size = 0; diff --git a/src/southbridge/intel/ibexpeak/lpc.c b/src/southbridge/intel/ibexpeak/lpc.c index 54b2621bca..1209f9b685 100644 --- a/src/southbridge/intel/ibexpeak/lpc.c +++ b/src/southbridge/intel/ibexpeak/lpc.c @@ -591,11 +591,12 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->reserved = 0; fadt->sci_int = 0x9; - fadt->smi_cmd = APM_CNT; - fadt->acpi_enable = APM_CNT_ACPI_ENABLE; - fadt->acpi_disable = APM_CNT_ACPI_DISABLE; - fadt->s4bios_req = 0x0; - fadt->pstate_cnt = 0; + + if (CONFIG(HAVE_SMI_HANDLER)) { + fadt->smi_cmd = APM_CNT; + fadt->acpi_enable = APM_CNT_ACPI_ENABLE; + fadt->acpi_disable = APM_CNT_ACPI_DISABLE; + } fadt->pm1a_evt_blk = pmbase; fadt->pm1b_evt_blk = 0x0; @@ -613,7 +614,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->gpe0_blk_len = 16; fadt->gpe1_blk_len = 0; fadt->gpe1_base = 0; - fadt->cst_cnt = 0; c2_latency = chip->c2_latency; if (!c2_latency) { c2_latency = 101; /* c2 unsupported */ diff --git a/src/southbridge/intel/lynxpoint/lpc.c b/src/southbridge/intel/lynxpoint/lpc.c index 7e1355a7d5..da744bfa64 100644 --- a/src/southbridge/intel/lynxpoint/lpc.c +++ b/src/southbridge/intel/lynxpoint/lpc.c @@ -740,11 +740,12 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) u16 pmbase = get_pmbase(); fadt->sci_int = 0x9; - fadt->smi_cmd = APM_CNT; - fadt->acpi_enable = APM_CNT_ACPI_ENABLE; - fadt->acpi_disable = APM_CNT_ACPI_DISABLE; - fadt->s4bios_req = 0x0; - fadt->pstate_cnt = 0; + + if (CONFIG(HAVE_SMI_HANDLER)) { + fadt->smi_cmd = APM_CNT; + fadt->acpi_enable = APM_CNT_ACPI_ENABLE; + fadt->acpi_disable = APM_CNT_ACPI_DISABLE; + } fadt->pm1a_evt_blk = pmbase + PM1_STS; fadt->pm1b_evt_blk = 0x0; @@ -775,7 +776,6 @@ void acpi_fill_fadt(acpi_fadt_t *fadt) fadt->gpe1_blk_len = 0; fadt->gpe1_base = 0; - fadt->cst_cnt = 0; fadt->p_lvl2_lat = 1; fadt->p_lvl3_lat = 87; fadt->flush_size = 0; -- cgit v1.2.3