From ce8763fb138afe8261301fc6a3638b7b18b381ac Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= Date: Thu, 20 Sep 2018 23:52:43 +0200 Subject: mb/lowrisc: Remove the Nexys4DDR port MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit This board doesn't support the newest RISC-V Privileged Architecture spec (1.10), and it's based on an FPGA so it's a moving target. Now that there's actual RISC-V silicon out there (from SiFive), mb/lowrisc/nexys4ddr will only continue to bitrot. Change-Id: I4e3e715106a1a94381a563dc4a56781c35883c2d Signed-off-by: Jonathan Neuschäfer Reviewed-on: https://review.coreboot.org/28706 Tested-by: build bot (Jenkins) Reviewed-by: Philipp Hug Reviewed-by: Ronald G. Minnich --- MAINTAINERS | 2 -- src/mainboard/lowrisc/Kconfig | 16 ----------- src/mainboard/lowrisc/Kconfig.name | 2 -- src/mainboard/lowrisc/nexys4ddr/Kconfig | 37 -------------------------- src/mainboard/lowrisc/nexys4ddr/Kconfig.name | 2 -- src/mainboard/lowrisc/nexys4ddr/Makefile.inc | 25 ----------------- src/mainboard/lowrisc/nexys4ddr/board_info.txt | 3 --- src/mainboard/lowrisc/nexys4ddr/devicetree.cb | 20 -------------- src/mainboard/lowrisc/nexys4ddr/mainboard.c | 35 ------------------------ src/mainboard/lowrisc/nexys4ddr/memlayout.ld | 31 --------------------- src/mainboard/lowrisc/nexys4ddr/rom_media.c | 30 --------------------- src/mainboard/lowrisc/nexys4ddr/romstage.c | 23 ---------------- src/mainboard/lowrisc/nexys4ddr/uart.c | 30 --------------------- src/soc/lowrisc/Kconfig | 2 -- src/soc/lowrisc/lowrisc/Kconfig | 29 -------------------- src/soc/lowrisc/lowrisc/Makefile.inc | 8 ------ src/soc/lowrisc/lowrisc/cbmem.c | 26 ------------------ util/release/genrelnotes | 2 +- 18 files changed, 1 insertion(+), 322 deletions(-) delete mode 100644 src/mainboard/lowrisc/Kconfig delete mode 100644 src/mainboard/lowrisc/Kconfig.name delete mode 100644 src/mainboard/lowrisc/nexys4ddr/Kconfig delete mode 100644 src/mainboard/lowrisc/nexys4ddr/Kconfig.name delete mode 100644 src/mainboard/lowrisc/nexys4ddr/Makefile.inc delete mode 100644 src/mainboard/lowrisc/nexys4ddr/board_info.txt delete mode 100644 src/mainboard/lowrisc/nexys4ddr/devicetree.cb delete mode 100644 src/mainboard/lowrisc/nexys4ddr/mainboard.c delete mode 100644 src/mainboard/lowrisc/nexys4ddr/memlayout.ld delete mode 100644 src/mainboard/lowrisc/nexys4ddr/rom_media.c delete mode 100644 src/mainboard/lowrisc/nexys4ddr/romstage.c delete mode 100644 src/mainboard/lowrisc/nexys4ddr/uart.c delete mode 100644 src/soc/lowrisc/Kconfig delete mode 100644 src/soc/lowrisc/lowrisc/Kconfig delete mode 100644 src/soc/lowrisc/lowrisc/Makefile.inc delete mode 100644 src/soc/lowrisc/lowrisc/cbmem.c diff --git a/MAINTAINERS b/MAINTAINERS index ca8a6f2a74..4d27129c0a 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -124,10 +124,8 @@ M: Ronald Minnich M: Jonathan Neuschäfer S: Maintained F: src/arch/riscv/ -F: src/soc/lowrisc F: src/soc/ucb/ F: src/mainboard/emulation/*-riscv/ -F: src/mainboard/lowrisc POWER8 ARCHITECTURE M: Ronald Minnich diff --git a/src/mainboard/lowrisc/Kconfig b/src/mainboard/lowrisc/Kconfig deleted file mode 100644 index ba0fbe7499..0000000000 --- a/src/mainboard/lowrisc/Kconfig +++ /dev/null @@ -1,16 +0,0 @@ -if VENDOR_LOWRISC - -choice - prompt "Mainboard model" - -source "src/mainboard/lowrisc/*/Kconfig.name" - -endchoice - -source "src/mainboard/lowrisc/*/Kconfig" - -config MAINBOARD_VENDOR - string - default "lowrisc" - -endif # VENDOR_LOWRISC diff --git a/src/mainboard/lowrisc/Kconfig.name b/src/mainboard/lowrisc/Kconfig.name deleted file mode 100644 index 4c992fc2bb..0000000000 --- a/src/mainboard/lowrisc/Kconfig.name +++ /dev/null @@ -1,2 +0,0 @@ -config VENDOR_LOWRISC - bool "lowrisc" diff --git a/src/mainboard/lowrisc/nexys4ddr/Kconfig b/src/mainboard/lowrisc/nexys4ddr/Kconfig deleted file mode 100644 index 5a6bfb2503..0000000000 --- a/src/mainboard/lowrisc/nexys4ddr/Kconfig +++ /dev/null @@ -1,37 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2016 Google Inc. -## -## This software is licensed under the terms of the GNU General Public -## License version 2, as published by the Free Software Foundation, and -## may be copied, distributed, and modified under those terms. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. - -if BOARD_LOWRISC_NEXYS4DDR - -config BOARD_SPECIFIC_OPTIONS # dummy - def_bool y - select SOC_LOWRISC_LOWRISC - select BOARD_ROMSIZE_KB_4096 - select DRIVERS_UART_8250MEM - select BOOT_DEVICE_NOT_SPI_FLASH - select UART_OVERRIDE_REFCLK - -config MAINBOARD_DIR - string - default lowrisc/nexys4ddr - -config MAINBOARD_PART_NUMBER - string - default "LOWRISC NEXYS4DDR" - -config MAX_CPUS - int - default 1 - -endif # BOARD_LOWRISC_NEXYS4DDR diff --git a/src/mainboard/lowrisc/nexys4ddr/Kconfig.name b/src/mainboard/lowrisc/nexys4ddr/Kconfig.name deleted file mode 100644 index f99b3cc649..0000000000 --- a/src/mainboard/lowrisc/nexys4ddr/Kconfig.name +++ /dev/null @@ -1,2 +0,0 @@ -config BOARD_LOWRISC_NEXYS4DDR - bool "nexys4ddr" diff --git a/src/mainboard/lowrisc/nexys4ddr/Makefile.inc b/src/mainboard/lowrisc/nexys4ddr/Makefile.inc deleted file mode 100644 index abd341c5d7..0000000000 --- a/src/mainboard/lowrisc/nexys4ddr/Makefile.inc +++ /dev/null @@ -1,25 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2016 Google Inc. -## -## This software is licensed under the terms of the GNU General Public -## License version 2, as published by the Free Software Foundation, and -## may be copied, distributed, and modified under those terms. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. - -bootblock-y += uart.c -bootblock-y += rom_media.c -romstage-y += romstage.c -romstage-y += uart.c -romstage-y += rom_media.c -ramstage-y += uart.c -ramstage-y += rom_media.c - -bootblock-y += memlayout.ld -romstage-y += memlayout.ld -ramstage-y += memlayout.ld diff --git a/src/mainboard/lowrisc/nexys4ddr/board_info.txt b/src/mainboard/lowrisc/nexys4ddr/board_info.txt deleted file mode 100644 index a305030ddb..0000000000 --- a/src/mainboard/lowrisc/nexys4ddr/board_info.txt +++ /dev/null @@ -1,3 +0,0 @@ -Board name: lowrisc nexys4ddr -Category: eval -Board URL: https://www.google.com/search?q=Tutorial+for+the+debug+preview+of+lowRISC&oq=Tutorial+for+the+debug+preview+of+lowRISC&btnI diff --git a/src/mainboard/lowrisc/nexys4ddr/devicetree.cb b/src/mainboard/lowrisc/nexys4ddr/devicetree.cb deleted file mode 100644 index e857276d5f..0000000000 --- a/src/mainboard/lowrisc/nexys4ddr/devicetree.cb +++ /dev/null @@ -1,20 +0,0 @@ -## -## This file is part of the coreboot project. -## -## Copyright (C) 2016 Google, Inc. -## -## This software is licensed under the terms of the GNU General Public -## License version 2, as published by the Free Software Foundation, and -## may be copied, distributed, and modified under those terms. -## -## This program is distributed in the hope that it will be useful, -## but WITHOUT ANY WARRANTY; without even the implied warranty of -## MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the -## GNU General Public License for more details. - -chip soc/ucb/riscv - device cpu_cluster 0 on end - chip drivers/generic/generic # I2C0 controller - device i2c 6 on end # Fake component for testing - end -end diff --git a/src/mainboard/lowrisc/nexys4ddr/mainboard.c b/src/mainboard/lowrisc/nexys4ddr/mainboard.c deleted file mode 100644 index 3ef833741d..0000000000 --- a/src/mainboard/lowrisc/nexys4ddr/mainboard.c +++ /dev/null @@ -1,35 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2016 Google, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include - -static void mainboard_enable(struct device *dev) -{ - uintptr_t ram_base; - size_t ram_size; - - /* FIXME: These values shouldn't necessarily be hardcoded */ - ram_base = 0x80000000; - ram_size = 128 * MiB; - ram_resource(dev, 0, ram_base / KiB, ram_size / KiB); - - cbmem_initialize_empty(); -} - -struct chip_operations mainboard_ops = { - .enable_dev = mainboard_enable, -}; diff --git a/src/mainboard/lowrisc/nexys4ddr/memlayout.ld b/src/mainboard/lowrisc/nexys4ddr/memlayout.ld deleted file mode 100644 index 86f3667556..0000000000 --- a/src/mainboard/lowrisc/nexys4ddr/memlayout.ld +++ /dev/null @@ -1,31 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2016 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include - -#include - -#define START 0x80000000 - -SECTIONS -{ - DRAM_START(START) - BOOTBLOCK(START, 64K) - STACK(START + 8M, 64K) - ROMSTAGE(START + 8M + 64K, 128K) - PRERAM_CBMEM_CONSOLE(START + 8M + 192k, 8K) - /* hole at (START + 8M + 200K, 56K) */ - RAMSTAGE(START + 8M + 256K, 256K) -} diff --git a/src/mainboard/lowrisc/nexys4ddr/rom_media.c b/src/mainboard/lowrisc/nexys4ddr/rom_media.c deleted file mode 100644 index 7d4ed00fe1..0000000000 --- a/src/mainboard/lowrisc/nexys4ddr/rom_media.c +++ /dev/null @@ -1,30 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2015 Google Inc. - * Copyright 2016 Jonathan Neuschäfer - * - * This program is free software; you can redistribute it and/or - * modify it under the terms of the GNU General Public License as - * published by the Free Software Foundation; version 2 of - * the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ -#include -#include - -/* - * _dram is the start of RAM. We currently need to load coreboot.rom into - * RAM. The actual "rom" code on the FPGAs is in a block ram. - */ -static const struct mem_region_device boot_dev = - MEM_REGION_DEV_RO_INIT(_dram, CONFIG_ROM_SIZE); - -const struct region_device *boot_device_ro(void) -{ - return &boot_dev.rdev; -} diff --git a/src/mainboard/lowrisc/nexys4ddr/romstage.c b/src/mainboard/lowrisc/nexys4ddr/romstage.c deleted file mode 100644 index c918c83bdb..0000000000 --- a/src/mainboard/lowrisc/nexys4ddr/romstage.c +++ /dev/null @@ -1,23 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright (C) 2016 Google, Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include - -void main(void) -{ - console_init(); - run_ramstage(); -} diff --git a/src/mainboard/lowrisc/nexys4ddr/uart.c b/src/mainboard/lowrisc/nexys4ddr/uart.c deleted file mode 100644 index 7758db355a..0000000000 --- a/src/mainboard/lowrisc/nexys4ddr/uart.c +++ /dev/null @@ -1,30 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * Copyright 2016 Google Inc. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include -#include -#include -#include - -uintptr_t uart_platform_base(int idx) -{ - return (uintptr_t) 0x42000000; -} - -/* The clock which the UART is based on */ -unsigned int uart_platform_refclk(void) -{ - return 25 * MHz; -} diff --git a/src/soc/lowrisc/Kconfig b/src/soc/lowrisc/Kconfig deleted file mode 100644 index a514135297..0000000000 --- a/src/soc/lowrisc/Kconfig +++ /dev/null @@ -1,2 +0,0 @@ -# Load all chipsets -source "src/soc/lowrisc/*/Kconfig" diff --git a/src/soc/lowrisc/lowrisc/Kconfig b/src/soc/lowrisc/lowrisc/Kconfig deleted file mode 100644 index 8b35231642..0000000000 --- a/src/soc/lowrisc/lowrisc/Kconfig +++ /dev/null @@ -1,29 +0,0 @@ -config SOC_LOWRISC_LOWRISC - select ARCH_RISCV - select ARCH_BOOTBLOCK_RISCV - select ARCH_VERSTAGE_RISCV - select ARCH_ROMSTAGE_RISCV - select ARCH_RAMSTAGE_RISCV - select BOOTBLOCK_CONSOLE - select DRIVERS_UART_8250MEM_32 - select GENERIC_UDELAY - select HAVE_MONOTONIC_TIMER - select RISCV_USE_ARCH_TIMER - bool - default n - -if SOC_LOWRISC_LOWRISC - -config RISCV_ARCH - string - default "rv64imafd" - -config RISCV_ABI - string - default "lp64d" - -config RISCV_CODEMODEL - string - default "medany" - -endif diff --git a/src/soc/lowrisc/lowrisc/Makefile.inc b/src/soc/lowrisc/lowrisc/Makefile.inc deleted file mode 100644 index ccd9a16945..0000000000 --- a/src/soc/lowrisc/lowrisc/Makefile.inc +++ /dev/null @@ -1,8 +0,0 @@ -ifeq ($(CONFIG_SOC_LOWRISC_LOWRISC),y) - -bootblock-y += mtime.c -romstage-y += cbmem.c -ramstage-y += cbmem.c -ramstage-y += mtime.c - -endif diff --git a/src/soc/lowrisc/lowrisc/cbmem.c b/src/soc/lowrisc/lowrisc/cbmem.c deleted file mode 100644 index a21266608b..0000000000 --- a/src/soc/lowrisc/lowrisc/cbmem.c +++ /dev/null @@ -1,26 +0,0 @@ -/* - * This file is part of the coreboot project. - * - * This program is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; version 2 of the License. - * - * This program is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - */ - -#include - -void *cbmem_top(void) -{ - uintptr_t base; - size_t size; - - /* FIXME: These values shouldn't necessarily be hardcoded */ - base = 0x80000000; - size = 128 * MiB; - - return (void *)(base + size); -} diff --git a/util/release/genrelnotes b/util/release/genrelnotes index dfdf21ee7f..3038eb3de8 100755 --- a/util/release/genrelnotes +++ b/util/release/genrelnotes @@ -349,7 +349,7 @@ get_log_dedupe "ARM" \ get_log_dedupe "RISC-V" \ "$(for codedir in $(grep -rl "_RISCV" --include=Kconfig | grep -v 'payloads/\|drivers/\|vendorcode/\|console' ); do dirname "$codedir"; done | grep -v '^src$')" \ - "riscv\|risc-v\|lowrisc\|sifive" + "riscv\|risc-v\|sifive" get_log_dedupe "MIPS" \ "$(for codedir in $(grep -rl "_MIPS" --include=Kconfig | \ -- cgit v1.2.3