From d266710d2cca38f417e96447d76b9bfd3fda18f1 Mon Sep 17 00:00:00 2001 From: Ronak Kanabar Date: Wed, 9 Jan 2019 15:50:12 +0530 Subject: mb/google/hatch: Configure miscellaneous features set SaGv = SaGv_Enabled , To Enable System Agent dynamic frequency support set HeciEnabled = 1, To Enable heci communication set speed_shift_enable = 1 To Enable Speed Shift Technology support Change-Id: Iea90a65a77ef5e45a802cfe6fd31e1921163b02b Signed-off-by: Ronak Kanabar Reviewed-on: https://review.coreboot.org/c/30774 Tested-by: build bot (Jenkins) Reviewed-by: Subrata Banik Reviewed-by: Rizwan Qureshi --- src/mainboard/google/hatch/variants/baseboard/devicetree.cb | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb index 8dd2d849be..5b777f840d 100644 --- a/src/mainboard/google/hatch/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/hatch/variants/baseboard/devicetree.cb @@ -48,6 +48,12 @@ chip soc/intel/cannonlake register "SataPortsEnable[1]" = "1" register "SataPortsDevSlp[1]" = "1" register "satapwroptimize" = "1" + # Enable System Agent dynamic frequency + register "SaGv" = "SaGv_Enabled" + # Enable heci communication + register "HeciEnabled" = "1" + # Enable Speed Shift Technology support + register "speed_shift_enable" = "1" register "usb2_ports[0]" = "USB2_PORT_TYPE_C(OC2)" # Type-C Port 0 register "usb2_ports[1]" = "USB2_PORT_TYPE_C(OC2)" # Type-C Port 1 -- cgit v1.2.3