From d9f1b04ec5f87c05da60c5da84df35624ecd0fac Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Wed, 2 Sep 2020 20:19:15 +0200 Subject: sb/intel/lynxpoint: Do not determine PCH type at runtime Both PCH types are very different, and mixing the code for both together isn't useful. First of all, inline `pch_is_lp` to return a constant. This allows the compiler to optimize out unused code, which results in smaller executables. For the Asrock B85M Pro4, it's about 2.5 KiB less. Subsequent commits will further split the southbridge code. Change-Id: Iba904acf64096478d1b76ffd05a076f0203502f8 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/45047 Reviewed-by: Arthur Heymans Tested-by: build bot (Jenkins) --- src/southbridge/intel/lynxpoint/early_pch.c | 5 ----- src/southbridge/intel/lynxpoint/pch.c | 5 ----- src/southbridge/intel/lynxpoint/pch.h | 6 +++++- 3 files changed, 5 insertions(+), 11 deletions(-) diff --git a/src/southbridge/intel/lynxpoint/early_pch.c b/src/southbridge/intel/lynxpoint/early_pch.c index 85f9f33a97..956d1d24de 100644 --- a/src/southbridge/intel/lynxpoint/early_pch.c +++ b/src/southbridge/intel/lynxpoint/early_pch.c @@ -35,11 +35,6 @@ enum pch_platform_type get_pch_platform_type(void) return PCH_TYPE_DESKTOP; } -int pch_is_lp(void) -{ - return get_pch_platform_type() == PCH_TYPE_ULT; -} - static void pch_enable_bars(void) { pci_write_config32(PCH_LPC_DEV, RCBA, (uintptr_t)DEFAULT_RCBA | 1); diff --git a/src/southbridge/intel/lynxpoint/pch.c b/src/southbridge/intel/lynxpoint/pch.c index c08f0da734..adc011bb7b 100644 --- a/src/southbridge/intel/lynxpoint/pch.c +++ b/src/southbridge/intel/lynxpoint/pch.c @@ -57,11 +57,6 @@ enum pch_platform_type get_pch_platform_type(void) return PCH_TYPE_DESKTOP; } -int pch_is_lp(void) -{ - return get_pch_platform_type() == PCH_TYPE_ULT; -} - u16 get_pmbase(void) { static u16 pmbase; diff --git a/src/southbridge/intel/lynxpoint/pch.h b/src/southbridge/intel/lynxpoint/pch.h index 2c86ff0ab6..1ecad62796 100644 --- a/src/southbridge/intel/lynxpoint/pch.h +++ b/src/southbridge/intel/lynxpoint/pch.h @@ -69,6 +69,11 @@ #ifndef __ACPI__ +static inline int pch_is_lp(void) +{ + return CONFIG(INTEL_LYNXPOINT_LP); +} + /* PCH platform types, safe for MRC consumption */ enum pch_platform_type { PCH_TYPE_MOBILE = 0, @@ -84,7 +89,6 @@ void usb_xhci_route_all(void); enum pch_platform_type get_pch_platform_type(void); int pch_silicon_revision(void); int pch_silicon_id(void); -int pch_is_lp(void); u16 get_pmbase(void); u16 get_gpiobase(void); -- cgit v1.2.3