From dc71e254941cf922e4686fc40bf8d77f3ccfe447 Mon Sep 17 00:00:00 2001 From: Arthur Heymans Date: Mon, 29 Jan 2018 10:14:48 +0100 Subject: nb/intel/nehalem: Use the common mrc cache driver The common mrc cache driver allows to save the raminit training results to a separate fmap region which is more manageable than a cbfsfile. Change-Id: I25a6d3fe5466d142e3d10429a87b19047040c251 Signed-off-by: Arthur Heymans Reviewed-on: https://review.coreboot.org/23484 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph --- src/northbridge/intel/nehalem/Kconfig | 2 +- src/northbridge/intel/nehalem/Makefile.inc | 10 ---------- src/northbridge/intel/nehalem/raminit.c | 15 +++++++++------ 3 files changed, 10 insertions(+), 17 deletions(-) diff --git a/src/northbridge/intel/nehalem/Kconfig b/src/northbridge/intel/nehalem/Kconfig index 6a9d0debad..573fdfe208 100644 --- a/src/northbridge/intel/nehalem/Kconfig +++ b/src/northbridge/intel/nehalem/Kconfig @@ -21,7 +21,7 @@ config NORTHBRIDGE_INTEL_NEHALEM select TSC_MONOTONIC_TIMER select INTEL_GMA_ACPI select RELOCATABLE_RAMSTAGE - select NORTHBRIDGE_INTEL_COMMON_MRC_CACHE + select CACHE_MRC_SETTINGS select HAVE_LINEAR_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT select HAVE_VGA_TEXT_FRAMEBUFFER if MAINBOARD_DO_NATIVE_VGA_INIT diff --git a/src/northbridge/intel/nehalem/Makefile.inc b/src/northbridge/intel/nehalem/Makefile.inc index b5c19ffaf3..acb828c1c5 100644 --- a/src/northbridge/intel/nehalem/Makefile.inc +++ b/src/northbridge/intel/nehalem/Makefile.inc @@ -29,14 +29,4 @@ romstage-y += ../../../arch/x86/walkcbfs.S smm-$(CONFIG_HAVE_SMI_HANDLER) += finalize.c -$(obj)/mrc.cache: - dd if=/dev/zero count=1 \ - bs=$(shell printf "%d" $(CONFIG_MRC_CACHE_SIZE) ) | \ - tr '\000' '\377' > $@ - -cbfs-files-y += mrc.cache -mrc.cache-file := $(obj)/mrc.cache -mrc.cache-align := 0x10000 -mrc.cache-type := mrc_cache - endif diff --git a/src/northbridge/intel/nehalem/raminit.c b/src/northbridge/intel/nehalem/raminit.c index a2ccbc36a8..df88ef3e79 100644 --- a/src/northbridge/intel/nehalem/raminit.c +++ b/src/northbridge/intel/nehalem/raminit.c @@ -43,7 +43,7 @@ #include #include #include -#include +#include #endif #if !REAL @@ -91,6 +91,8 @@ typedef struct { u8 largest; } timing_bounds_t[2][2][2][9]; +#define MRC_CACHE_VERSION 1 + struct ram_training { /* [TM][CHANNEL][SLOT][RANK][LANE] */ u16 lane_timings[4][2][2][2][9]; @@ -1741,17 +1743,18 @@ static void save_timings(struct raminfo *info) printk (BIOS_SPEW, "[6e8] = %x\n", train.reg_6e8); /* Save the MRC S3 restore data to cbmem */ - store_current_mrc_cache(&train, sizeof(train)); + mrc_cache_stash_data(MRC_TRAINING_DATA, MRC_CACHE_VERSION, + &train, sizeof(train)); } #if REAL static const struct ram_training *get_cached_training(void) { - struct mrc_data_container *cont; - cont = find_current_mrc_cache(); - if (!cont) + struct region_device rdev; + if (mrc_cache_get_current(MRC_TRAINING_DATA, MRC_CACHE_VERSION, + &rdev)) return 0; - return (void *)cont->mrc_data; + return (void *)rdev_mmap_full(&rdev); } #endif -- cgit v1.2.3