From dd4861ae04a7825f04470471fe56cc4fc46028dc Mon Sep 17 00:00:00 2001 From: Sumeet R Pawnikar Date: Wed, 19 May 2021 15:59:55 +0530 Subject: soc/intel/common: Add Alder Lake device IDs Add Alder Lake specific Host and Graphics device IDs. As per latest document number: 619501, these IDs got an update. Change-Id: I548a903714ccc7470f1425ac67c0c66522437365 Signed-off-by: Sumeet R Pawnikar Reviewed-on: https://review.coreboot.org/c/coreboot/+/54674 Reviewed-by: Subrata Banik Reviewed-by: Angel Pons Reviewed-by: Tim Wawrzynczak Tested-by: build bot (Jenkins) --- src/include/device/pci_ids.h | 5 ++++- src/soc/intel/alderlake/bootblock/report_platform.c | 3 +++ src/soc/intel/common/block/graphics/graphics.c | 2 ++ src/soc/intel/common/block/systemagent/systemagent.c | 1 + 4 files changed, 10 insertions(+), 1 deletion(-) diff --git a/src/include/device/pci_ids.h b/src/include/device/pci_ids.h index 1a9aa35645..51e98aec1a 100644 --- a/src/include/device/pci_ids.h +++ b/src/include/device/pci_ids.h @@ -3813,6 +3813,8 @@ #define PCI_DEVICE_ID_INTEL_ADL_GT1_9 0x4619 #define PCI_DEVICE_ID_INTEL_ADL_P_GT2 0x46a0 #define PCI_DEVICE_ID_INTEL_ADL_P_GT2_1 0x46b0 +#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_2 0x46a1 +#define PCI_DEVICE_ID_INTEL_ADL_P_GT2_3 0x46a3 #define PCI_DEVICE_ID_INTEL_ADL_S_GT1 0x4680 #define PCI_DEVICE_ID_INTEL_ADL_M_GT1 0x46c0 @@ -3909,7 +3911,7 @@ #define PCI_DEVICE_ID_INTEL_ADL_S_ID_13 0x4673 #define PCI_DEVICE_ID_INTEL_ADL_S_ID_14 0x4623 #define PCI_DEVICE_ID_INTEL_ADL_S_ID_15 0x0060 -#define PCI_DEVICE_ID_INTEL_ADL_P_ID_1 0x4602 +#define PCI_DEVICE_ID_INTEL_ADL_P_ID_1 0x4629 #define PCI_DEVICE_ID_INTEL_ADL_P_ID_2 0x460a #define PCI_DEVICE_ID_INTEL_ADL_P_ID_3 0x4641 #define PCI_DEVICE_ID_INTEL_ADL_P_ID_4 0x4649 @@ -3918,6 +3920,7 @@ #define PCI_DEVICE_ID_INTEL_ADL_P_ID_7 0x4601 #define PCI_DEVICE_ID_INTEL_ADL_P_ID_8 0x4661 #define PCI_DEVICE_ID_INTEL_ADL_P_ID_9 0x467f +#define PCI_DEVICE_ID_INTEL_ADL_M_ID_1 0x4602 /* Intel SMBUS device Ids */ #define PCI_DEVICE_ID_INTEL_LPT_H_SMBUS 0x8c22 #define PCI_DEVICE_ID_INTEL_LPT_LP_SMBUS 0x9c22 diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c index 78f02ecd97..15391ab550 100644 --- a/src/soc/intel/alderlake/bootblock/report_platform.c +++ b/src/soc/intel/alderlake/bootblock/report_platform.c @@ -40,6 +40,7 @@ static struct { { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, "Alderlake-P" }, { PCI_DEVICE_ID_INTEL_ADL_P_ID_8, "Alderlake-P" }, { PCI_DEVICE_ID_INTEL_ADL_P_ID_9, "Alderlake-P" }, + { PCI_DEVICE_ID_INTEL_ADL_M_ID_1, "Alderlake-M" }, }; static struct { @@ -100,6 +101,8 @@ static struct { { PCI_DEVICE_ID_INTEL_ADL_GT1_9, "Alderlake GT1" }, { PCI_DEVICE_ID_INTEL_ADL_P_GT2, "Alderlake P GT2" }, { PCI_DEVICE_ID_INTEL_ADL_P_GT2_1, "Alderlake P GT2" }, + { PCI_DEVICE_ID_INTEL_ADL_P_GT2_2, "Alderlake P GT2" }, + { PCI_DEVICE_ID_INTEL_ADL_P_GT2_3, "Alderlake P GT2" }, { PCI_DEVICE_ID_INTEL_ADL_M_GT1, "Alderlake M GT1" }, }; diff --git a/src/soc/intel/common/block/graphics/graphics.c b/src/soc/intel/common/block/graphics/graphics.c index fe89f86154..e5af85f750 100644 --- a/src/soc/intel/common/block/graphics/graphics.c +++ b/src/soc/intel/common/block/graphics/graphics.c @@ -296,6 +296,8 @@ static const unsigned short pci_device_ids[] = { PCI_DEVICE_ID_INTEL_ADL_GT1_9, PCI_DEVICE_ID_INTEL_ADL_P_GT2, PCI_DEVICE_ID_INTEL_ADL_P_GT2_1, + PCI_DEVICE_ID_INTEL_ADL_P_GT2_2, + PCI_DEVICE_ID_INTEL_ADL_P_GT2_3, PCI_DEVICE_ID_INTEL_ADL_S_GT1, PCI_DEVICE_ID_INTEL_ADL_M_GT1, 0, diff --git a/src/soc/intel/common/block/systemagent/systemagent.c b/src/soc/intel/common/block/systemagent/systemagent.c index 7d42fe1641..19d4522d95 100644 --- a/src/soc/intel/common/block/systemagent/systemagent.c +++ b/src/soc/intel/common/block/systemagent/systemagent.c @@ -417,6 +417,7 @@ static const unsigned short systemagent_ids[] = { PCI_DEVICE_ID_INTEL_ADL_P_ID_7, PCI_DEVICE_ID_INTEL_ADL_P_ID_8, PCI_DEVICE_ID_INTEL_ADL_P_ID_9, + PCI_DEVICE_ID_INTEL_ADL_M_ID_1, 0 }; -- cgit v1.2.3