From e37459ed64b40a23880babf430fd92a847752053 Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= <kyosti.malkki@gmail.com>
Date: Wed, 17 Jun 2020 01:04:44 +0300
Subject: ACPI: Add framework for GNVS initialisation
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Provide common initialisation point for setting up
GNVS structure before first SMI is triggered.

Change-Id: Iccad533c3824d70f6cbae52cc8dd79f142ece944
Signed-off-by: Kyösti Mälkki <kyosti.malkki@gmail.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/42423
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
---
 src/acpi/Makefile.inc        |  2 ++
 src/acpi/chromeos-gnvs.c     | 18 ++++++++++++
 src/acpi/gnvs.c              | 69 ++++++++++++++++++++++++++++++++++++++++++++
 src/include/acpi/acpi_gnvs.h | 19 ++++++++++++
 4 files changed, 108 insertions(+)
 create mode 100644 src/acpi/chromeos-gnvs.c
 create mode 100644 src/acpi/gnvs.c
 create mode 100644 src/include/acpi/acpi_gnvs.h

diff --git a/src/acpi/Makefile.inc b/src/acpi/Makefile.inc
index 7e37e1a871..29ddc08d96 100644
--- a/src/acpi/Makefile.inc
+++ b/src/acpi/Makefile.inc
@@ -8,6 +8,8 @@ ramstage-y += acpigen_dsm.c
 ramstage-y += acpigen_ps2_keybd.c
 ramstage-y += acpigen_usb.c
 ramstage-y += device.c
+ramstage-$(CONFIG_CHROMEOS) += chromeos-gnvs.c
+ramstage-y += gnvs.c
 ramstage-y += pld.c
 ramstage-y += sata.c
 ramstage-y += soundwire.c
diff --git a/src/acpi/chromeos-gnvs.c b/src/acpi/chromeos-gnvs.c
new file mode 100644
index 0000000000..d30e204463
--- /dev/null
+++ b/src/acpi/chromeos-gnvs.c
@@ -0,0 +1,18 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi_gnvs.h>
+#include <types.h>
+#include <ec/google/chromeec/ec.h>
+#include <vendorcode/google/chromeos/gnvs.h>
+
+void gnvs_assign_chromeos(void)
+{
+	chromeos_acpi_t *gnvs_chromeos = gnvs_chromeos_ptr();
+	chromeos_init_chromeos_acpi(gnvs_chromeos);
+
+	/* EC can override to ECFW_RW. */
+	gnvs_chromeos->vbt2 = ACTIVE_ECFW_RO;
+
+	if (CONFIG(EC_GOOGLE_CHROMEEC) && !google_ec_running_ro())
+		gnvs_chromeos->vbt2 = ACTIVE_ECFW_RW;
+}
diff --git a/src/acpi/gnvs.c b/src/acpi/gnvs.c
new file mode 100644
index 0000000000..fbc84b36fd
--- /dev/null
+++ b/src/acpi/gnvs.c
@@ -0,0 +1,69 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#include <acpi/acpi_gnvs.h>
+#include <acpi/acpigen.h>
+#include <cbmem.h>
+#include <console/console.h>
+#include <string.h>
+#include <types.h>
+
+static void *gnvs;
+
+void *acpi_get_gnvs(void)
+{
+	if (gnvs)
+		return gnvs;
+
+	gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
+	if (gnvs)
+		return gnvs;
+
+	printk(BIOS_ERR, "Unable to locate Global NVS\n");
+	return NULL;
+}
+
+static void gnvs_assign_cbmc(void)
+{
+	uint32_t *gnvs_cbmc = gnvs_cbmc_ptr();
+	if (gnvs_cbmc)
+		*gnvs_cbmc = (uintptr_t)cbmem_find(CBMEM_ID_CONSOLE);
+}
+
+void *gnvs_get_or_create(void)
+{
+	size_t gnvs_size;
+
+	if (gnvs)
+		return gnvs;
+
+	gnvs = cbmem_find(CBMEM_ID_ACPI_GNVS);
+	if (gnvs)
+		return gnvs;
+
+	gnvs_size = gnvs_size_of_array();
+
+	gnvs = cbmem_add(CBMEM_ID_ACPI_GNVS, gnvs_size);
+	if (!gnvs)
+		return gnvs;
+
+	memset(gnvs, 0, gnvs_size);
+
+	if (CONFIG(CONSOLE_CBMEM))
+		gnvs_assign_cbmc();
+
+	if (CONFIG(CHROMEOS))
+		gnvs_assign_chromeos();
+
+	return gnvs;
+}
+
+void acpi_inject_nvsa(void)
+{
+	uintptr_t gnvs_address = (uintptr_t)acpi_get_gnvs();
+	if (!gnvs_address)
+		return;
+
+	acpigen_write_scope("\\");
+	acpigen_write_name_dword("NVSA", gnvs_address);
+	acpigen_pop_len();
+}
diff --git a/src/include/acpi/acpi_gnvs.h b/src/include/acpi/acpi_gnvs.h
new file mode 100644
index 0000000000..cc0c4710ae
--- /dev/null
+++ b/src/include/acpi/acpi_gnvs.h
@@ -0,0 +1,19 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+
+#ifndef __ACPI_GNVS_H__
+#define __ACPI_GNVS_H__
+
+#include <types.h>
+
+void *acpi_get_gnvs(void);
+void *gnvs_get_or_create(void);
+void acpi_inject_nvsa(void);
+
+void gnvs_assign_chromeos(void);
+
+/* Platform code must implement these. */
+size_t gnvs_size_of_array(void);
+uint32_t *gnvs_cbmc_ptr(void);
+void *gnvs_chromeos_ptr(void);
+
+#endif
-- 
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