From e73e81d02928a9b369861e996eaf4c5c64d76cc2 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Jonathan=20Neusch=C3=A4fer?= Date: Sat, 7 Jul 2018 14:50:34 +0200 Subject: Documentation/mb/sifive: Update TODO list; UART driver has been merged MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit See 894e3a9ec8 ("drivers/uart: Add a driver for SiFive's UART"). Change-Id: I035c238beba28ecafd296f18c0ccda167126ab94 Signed-off-by: Jonathan Neuschäfer Reviewed-on: https://review.coreboot.org/27398 Tested-by: build bot (Jenkins) Reviewed-by: Philipp Deppenwiese --- Documentation/mainboard/sifive/hifive-unleashed.md | 1 - 1 file changed, 1 deletion(-) (limited to 'Documentation/mainboard/sifive/hifive-unleashed.md') diff --git a/Documentation/mainboard/sifive/hifive-unleashed.md b/Documentation/mainboard/sifive/hifive-unleashed.md index bdf5e3c341..62ee82401c 100644 --- a/Documentation/mainboard/sifive/hifive-unleashed.md +++ b/Documentation/mainboard/sifive/hifive-unleashed.md @@ -12,7 +12,6 @@ For general setup instructions, please refer to the [Getting Started Guide]. The following things are still missing from this coreboot port: - Trampoline in the MBR block to support boot mode 1 -- SiFive UART driver - CBMEM support - FU540 clock configuration - FU540 RAM init -- cgit v1.2.3