From 35fd3331f471144d40358a85a43529fa5f172075 Mon Sep 17 00:00:00 2001 From: Iru Cai Date: Sat, 24 Apr 2021 21:22:10 +0800 Subject: mb/hp: Add EliteBook 820 G2 It can now boot Arch Linux from SATA and USB. Change-Id: Id8b3b7f735460c5e76a2dc9ab2d10154e6606ad6 Signed-off-by: Iru Cai --- Documentation/mainboard/hp/820g2.md | 155 ++++++++++++++++++++++++++++++++++++ 1 file changed, 155 insertions(+) create mode 100644 Documentation/mainboard/hp/820g2.md (limited to 'Documentation') diff --git a/Documentation/mainboard/hp/820g2.md b/Documentation/mainboard/hp/820g2.md new file mode 100644 index 0000000000..eea09e2a26 --- /dev/null +++ b/Documentation/mainboard/hp/820g2.md @@ -0,0 +1,155 @@ +# HP EliteBook 820 G2 + +This page is about the notebook [HP EliteBook 820 G2]. + +## Release status + +HP EliteBook 820 G2 was released in 2015 and is now end of life. +It can be bought from a secondhand market like Taobao or eBay. + +## Required proprietary blobs + +The following blobs are required to operate the hardware: + +1. EC firmware +2. Intel ME firmware +3. Broadwell mrc.bin and refcode.elf + +HP EliteBook 820 G2 uses SMSC MEC1324 as its embedded controller. +The EC firmware is stored in the flash chip, but we don't need to touch it +or use it in the coreboot build process. + +Intel ME firmware is in the flash chip. It is not needed when building coreboot. + +The Broadwell memory reference code binary and reference code blob is needed +when building coreboot. + +## Programming + +Before flashing, remove the battery and the hard drive cover according to the +[Maintenance and Service Guide] of this laptop. + +HP EliteBook 820 G2 has two flash chips, a 16MiB system flash, and a 2MiB +private flash. To install coreboot, we need to program both flash chips. +Read [HP Sure Start] for detailed information. + +To access the system flash, we need to connect the AC adapter to the machine, +then clip on the flash chip with an SOIC-8 clip. An [STM32-based flash programmer] +made with an STM32 development board is tested to work. + +To access the private flash chip, we can use a ch341a based flash programmer and +flash the chip with the AC adapter disconnected. + +Before flashing coreboot, we need to do the following: + +1. Erase the private flash to disable the IFD protection +2. Modify the IFD to shrink the BIOS region, so that we'll not use or override + the protected bootblock and PEI region, as well as the EC firmware + +To erase the private flash chip, attach it with the flash programmer via the SOIC-8 clip, +then run: + + flashrom -p --erase + +To modify the IFD, we need a new flash layout. The flash layout of the OEM firmware is: + + 00000000:00000fff fd + 00001000:00002fff gbe + 00003000:005fffff me + 00600000:00ffffff bios + +The default coreboot configuration sets the flash chip size to 12MiB, so set the end of the +BIOS region to 0xbfffff in the new layout. The modified IFD is as follows (Platform Data +region pd is the region protected by HP Sure Start, now we set it to the last 4MiB): + + 00000000:00000fff fd + 00001000:00002fff gbe + 00003000:005fffff me + 00600000:00bfffff bios + 00c00000:00ffffff pd + +Write the above layout in a file, and use ifdtool to modify the IFD of a flash image. +Suppose the above layout file is ``layout.txt`` and the origin content of the system flash +is in ``factory-sys.rom``, run: + + ifdtool -n layout.txt factory-sys.rom + +Then a flash image with a new IFD will be in ``factory-sys.rom.new``. + +Flash the IFD of the system flash: + + flashrom -p --ifd -i fd -w factory-sys.rom.new + +Then flash the coreboot image: + + # first extend the 12M coreboot.rom to 16M + fallocate -l 16M build/coreboot.rom + flashrom -p --ifd -i bios -w build/coreboot.rom + +After coreboot is installed, the coreboot firmware can be updated with internal flashing: + + flashrom -p internal --ifd -i bios --noverify-all -w build/coreboot.rom + +## Debugging + +TBD + +The board can be debugged with EHCI debug. The EHCI debug port is the USB port on the left. + +## Test status + +### Known issues + +TBD + +- No Intel GbE device +- If the laptop has a reboot before, it cannot resume from S3 + +### Untested + +- Touch screen +- NFC module +- SD card reader +- Fingerprint reader +- Smart Card reader +- TPM + +### Working + +- i3-5010U CPU with 16G+8G memory +- SATA and M.2 SATA disk +- PCIe SSD +- Webcam +- Audio output from speaker and headphone jack +- WLAN +- WWAN +- DisplayPort +- VGA +- Dock +- USB +- Keyboard and touchpad +- EC ACPI +- S3 resume +- Arch Linux with Linux 5.11.16 +- Broadwell MRC version 2.6.0 Build 0 and refcode from Purism Librem 13 v1 +- Graphics initialization with libgfxinit +- Payload: SeaBIOS +- EC firmware (what version?) +- Internal flashing under coreboot + +## Technology + +```eval_rst ++------------------+-----------------------------+ +| SoC | Intel Broadwell | ++------------------+-----------------------------+ +| EC | SMSC MEC1324 | ++------------------+-----------------------------+ +| Coprocessor | Intel Management Engine | ++------------------+-----------------------------+ +``` + +[HP EliteBook 820 G2]: https://support.hp.com/us-en/product/HP-EliteBook-820-G2-Notebook-PC/7343192/ +[Maintenance and Service Guide]: http://h10032.www1.hp.com/ctg/Manual/c04775894.pdf +[STM32-based flash programmer]: https://github.com/dword1511/stm32-vserprog +[HP Sure Start]: hp_sure_start.md -- cgit v1.2.3