From 635b45d60878887fba7425f61870cf2a9a6f3102 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Wed, 27 Aug 2014 12:16:16 -0700 Subject: libpayload arm64: Add library helpers Add library helpers to access standard arm64 registers. This library also provides functions to directly read/write register based on current el. So, rest of the code doesnt need to keep checking the el and call appropriate function based on that. BUG=chrome-os-partner:31634 BRANCH=None TEST=Libpayload and depthcharge compile successfully for ryu Change-Id: Ibc0ca49f158362d4b7ab2045bf0fbd58ada79360 Signed-off-by: Patrick Georgi Original-Commit-Id: 2ca6da580cb51b4c23abdaf04fee2785e5780510 Original-Change-Id: I9b63e04aa26a98bbeb34fdef634776d49454ca8d Original-Signed-off-by: Furquan Shaikh Original-Reviewed-on: https://chromium-review.googlesource.com/214575 Original-Reviewed-by: Aaron Durbin Original-Tested-by: Furquan Shaikh Original-Commit-Queue: Furquan Shaikh Reviewed-on: http://review.coreboot.org/8784 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- payloads/libpayload/arch/arm64/cache.c | 11 ++++++----- 1 file changed, 6 insertions(+), 5 deletions(-) (limited to 'payloads/libpayload/arch/arm64/cache.c') diff --git a/payloads/libpayload/arch/arm64/cache.c b/payloads/libpayload/arch/arm64/cache.c index 05d6fb20ca..e89d49e4c8 100644 --- a/payloads/libpayload/arch/arm64/cache.c +++ b/payloads/libpayload/arch/arm64/cache.c @@ -34,6 +34,7 @@ #include #include +#include void tlb_invalidate_all(void) { @@ -60,7 +61,7 @@ unsigned int dcache_line_bytes(void) if (line_bytes) return line_bytes; - ccsidr = read_ccsidr(); + ccsidr = raw_read_ccsidr_el1(); /* [2:0] - Indicates (Log2(number of words in cache line)) - 2 */ line_bytes = 1 << ((ccsidr & 0x7) + 2); /* words per line */ line_bytes *= sizeof(unsigned int); /* bytes per word */ @@ -126,18 +127,18 @@ void dcache_mmu_disable(void) uint32_t sctlr; dcache_clean_invalidate_all(); - sctlr = read_sctlr_el3(); + sctlr = raw_read_sctlr_el3(); sctlr &= ~(SCTLR_C | SCTLR_M); - write_sctlr_el3(sctlr); + raw_write_sctlr_el3(sctlr); } void dcache_mmu_enable(void) { uint32_t sctlr; - sctlr = read_sctlr_el3(); + sctlr = raw_read_sctlr_el3(); sctlr |= SCTLR_C | SCTLR_M; - write_sctlr_el3(sctlr); + raw_write_sctlr_el3(sctlr); } void cache_sync_instructions(void) -- cgit v1.2.3