From 75e297428f6a88406fa3e1c0b54ab3d4f411db5c Mon Sep 17 00:00:00 2001 From: Aaron Durbin Date: Thu, 10 Oct 2013 20:37:04 -0500 Subject: coreboot: config to cache ramstage outside CBMEM Haswell was the original chipset to store the cache in another area besides CBMEM. However, it was specific to the implementation. Instead, provide a generic way to obtain the location of the ramstage cache. This option is selected using the CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM Kconfig option. BUG=chrome-os-partner:23249 BRANCH=None TEST=Built and booted with baytrail support. Also built for falco successfully. Change-Id: I70d0940f7a8f73640c92a75fd22588c2c234241b Signed-off-by: Aaron Durbin Reviewed-on: https://chromium-review.googlesource.com/172602 Reviewed-by: Stefan Reinauer Reviewed-on: http://review.coreboot.org/4876 Tested-by: build bot (Jenkins) Reviewed-by: Alexandru Gagniuc --- src/Kconfig | 8 ++++++++ 1 file changed, 8 insertions(+) (limited to 'src/Kconfig') diff --git a/src/Kconfig b/src/Kconfig index 614b95f976..8646b19fb1 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -429,6 +429,14 @@ config RELOCATABLE_RAMSTAGE wake. When selecting this option the romstage is responsible for determing a stack location to use for loading the ramstage. +config CACHE_RELOCATED_RAMSTAGE_OUTSIDE_CBMEM + depends on RELOCATABLE_RAMSTAGE + bool "Cache the relocated ramstage outside of cbmem." + default n + help + The relocated ramstage is saved in an area specified by the + by the board and/or chipset. + config HAVE_REFCODE_BLOB depends on ARCH_X86 bool "An external reference code blob should be put into cbfs." -- cgit v1.2.3