From 91ebbfdc5c7b99abc5391b3938367747b1bfc53b Mon Sep 17 00:00:00 2001 From: Julius Werner Date: Tue, 25 Jul 2017 13:55:43 -0700 Subject: arm64: Pass COREBOOT flag to ARM TF, always enable logging This patch changes the way coreboot builds ARM TF to pass the new COREBOOT flag introduced with the following pull request: https://github.com/ARM-software/arm-trusted-firmware/pull/1193 Since the new coreboot support code supports the CBMEM console, we need to always enable LOG_LEVEL INFO. Supporting platforms will parse the coreboot table to conditionally enable the serial console only if it was enabled in coreboot as well. Also remove explicit cache flushes of some BL31 parameters. Turns out we never really needed these because we already flush the whole cache when disabling the MMU, and we were already not doing it for most parameters. Change-Id: I3c52a536dc6067da1378b3f15c4a4d6cf0be7ce7 Signed-off-by: Julius Werner Reviewed-on: https://review.coreboot.org/23558 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/arch/arm64/arm_tf.c | 5 ++--- 1 file changed, 2 insertions(+), 3 deletions(-) (limited to 'src/arch/arm64/arm_tf.c') diff --git a/src/arch/arm64/arm_tf.c b/src/arch/arm64/arm_tf.c index e976e34be0..69e83c10fe 100644 --- a/src/arch/arm64/arm_tf.c +++ b/src/arch/arm64/arm_tf.c @@ -81,11 +81,10 @@ void arm_tf_run_bl31(u64 payload_entry, u64 payload_arg0, u64 payload_spsr) bl33_ep_info.spsr = payload_spsr; bl33_ep_info.args.arg0 = payload_arg0; - /* May update bl31_params if necessary. Must flush all added structs. */ + /* May update bl31_params if necessary. */ void *bl31_plat_params = soc_get_bl31_plat_params(&bl31_params); - dcache_clean_by_mva(&bl31_params, sizeof(bl31_params)); - dcache_clean_by_mva(&bl33_ep_info, sizeof(bl33_ep_info)); + /* MMU disable will flush cache, so passed params land in memory. */ raw_write_daif(SPSR_EXCEPTION_MASK); mmu_disable(); bl31_entry(&bl31_params, bl31_plat_params); -- cgit v1.2.3