From dea4597bd4e35d8421b1cf8816a3c9dc045b9b36 Mon Sep 17 00:00:00 2001 From: Jimmy Huang Date: Mon, 13 Apr 2015 20:28:38 +0800 Subject: arch/arm64: update mmu translation table granule size, logic and macros 1. change mmu granule size from 64KB to 4KB 2. correct level 1 translation table creation logic 3. automatically calculate granule size related macros BRANCH=none BUG=none TEST=boot to kernel on oak board Change-Id: I9e99a3017033f6870b1735ac8faabb267c7be0a4 Signed-off-by: Patrick Georgi Original-Commit-Id: 2f18c4d5d9902f2830db82720c5543af270a7e3c Original-Change-Id: Ia27a414ab7578d70b00c36f9c063983397ba7927 Original-Signed-off-by: Jimmy Huang Original-Reviewed-on: https://chromium-review.googlesource.com/265603 Original-Reviewed-by: Aaron Durbin Original-Commit-Queue: Yidi Lin Original-Tested-by: Yidi Lin Reviewed-on: http://review.coreboot.org/10009 Reviewed-by: Stefan Reinauer Tested-by: build bot (Jenkins) --- src/arch/arm64/include/armv8/arch/mmu.h | 58 ++++++++++----------------------- 1 file changed, 17 insertions(+), 41 deletions(-) (limited to 'src/arch/arm64/include/armv8') diff --git a/src/arch/arm64/include/armv8/arch/mmu.h b/src/arch/arm64/include/armv8/arch/mmu.h index 564d6afed4..59d215858e 100644 --- a/src/arch/arm64/include/armv8/arch/mmu.h +++ b/src/arch/arm64/include/armv8/arch/mmu.h @@ -22,15 +22,6 @@ #include -/* IMPORTANT!!!!!!! - * Assumptions made: - * Granule size is 64KiB - * BITS per Virtual address is 33 - * All the calculations for tables L1,L2 and L3 are based on these assumptions - * If these values are changed, recalculate the other macros as well - */ - - /* Memory attributes for mmap regions * These attributes act as tag values for memrange regions */ @@ -74,46 +65,31 @@ /* XLAT Table Init Attributes */ #define VA_START 0x0 -/* If BITS_PER_VA or GRANULE_SIZE are changed, recalculate and change the - macros following them */ #define BITS_PER_VA 33 -/* Granule size of 64KB is being used */ -#define GRANULE_SIZE_SHIFT 16 +/* Granule size of 4KB is being used */ +#define GRANULE_SIZE_SHIFT 12 #define GRANULE_SIZE (1 << GRANULE_SIZE_SHIFT) -#define XLAT_TABLE_MASK ~(0xffffUL) -#define GRANULE_SIZE_MASK ((1 << 16) - 1) - -#define L1_ADDR_SHIFT 42 -#define L2_ADDR_SHIFT 29 -#define L3_ADDR_SHIFT 16 - -#define L1_ADDR_MASK (0UL << L1_ADDR_SHIFT) -#define L2_ADDR_MASK (0xfUL << L2_ADDR_SHIFT) -#define L3_ADDR_MASK (0x1fffUL << L3_ADDR_SHIFT) - -/* Dependent on BITS_PER_VA and GRANULE_SIZE */ -#define INIT_LEVEL 2 -#define XLAT_MAX_LEVEL 3 - -/* Each entry in XLAT table is 8 bytes */ -#define XLAT_ENTRY_SHIFT 3 -#define XLAT_ENTRY_SIZE (1 << XLAT_ENTRY_SHIFT) +#define XLAT_TABLE_MASK (~(0UL) << GRANULE_SIZE_SHIFT) +#define GRANULE_SIZE_MASK ((1 << GRANULE_SIZE_SHIFT) - 1) -#define XLAT_TABLE_SHIFT GRANULE_SIZE_SHIFT -#define XLAT_TABLE_SIZE (1 << XLAT_TABLE_SHIFT) +#define BITS_RESOLVED_PER_LVL (GRANULE_SIZE_SHIFT - 3) +#define L1_ADDR_SHIFT (GRANULE_SIZE_SHIFT + BITS_RESOLVED_PER_LVL * 2) +#define L2_ADDR_SHIFT (GRANULE_SIZE_SHIFT + BITS_RESOLVED_PER_LVL * 1) +#define L3_ADDR_SHIFT (GRANULE_SIZE_SHIFT + BITS_RESOLVED_PER_LVL * 0) -#define XLAT_NUM_ENTRIES_SHIFT (XLAT_TABLE_SHIFT - XLAT_ENTRY_SHIFT) -#define XLAT_NUM_ENTRIES (1 << XLAT_NUM_ENTRIES_SHIFT) +#if BITS_PER_VA > L1_ADDR_SHIFT + BITS_RESOLVED_PER_LVL + #error "BITS_PER_VA too large (we don't have L0 table support)" +#endif -#define L3_XLAT_SIZE_SHIFT (GRANULE_SIZE_SHIFT) -#define L2_XLAT_SIZE_SHIFT (GRANULE_SIZE_SHIFT + XLAT_NUM_ENTRIES_SHIFT) -#define L1_XLAT_SIZE_SHIFT (GRANULE_SIZE_SHIFT + XLAT_NUM_ENTRIES_SHIFT) +#define L1_ADDR_MASK (((1UL << BITS_RESOLVED_PER_LVL) - 1) << L1_ADDR_SHIFT) +#define L2_ADDR_MASK (((1UL << BITS_RESOLVED_PER_LVL) - 1) << L2_ADDR_SHIFT) +#define L3_ADDR_MASK (((1UL << BITS_RESOLVED_PER_LVL) - 1) << L3_ADDR_SHIFT) /* These macros give the size of the region addressed by each entry of a xlat table at any given level */ -#define L3_XLAT_SIZE (1 << L3_XLAT_SIZE_SHIFT) -#define L2_XLAT_SIZE (1 << L2_XLAT_SIZE_SHIFT) -#define L1_XLAT_SIZE (1 << L1_XLAT_SIZE_SHIFT) +#define L3_XLAT_SIZE (1UL << L3_ADDR_SHIFT) +#define L2_XLAT_SIZE (1UL << L2_ADDR_SHIFT) +#define L1_XLAT_SIZE (1UL << L1_ADDR_SHIFT) /* Block indices required for MAIR */ #define BLOCK_INDEX_MEM_DEV_NGNRNE 0 -- cgit v1.2.3