From 8799fde76062b381721ad856fb382983b98c52a5 Mon Sep 17 00:00:00 2001 From: Furquan Shaikh Date: Fri, 10 Jul 2015 15:27:02 -0700 Subject: arm64/a57: Move cortex_a57.h under include directory BUG=chrome-os-partner:41877 BRANCH=None TEST=Compiles successfully Change-Id: I8a94176a3faacb25ae5e9eaeaac4011ddf5af6a1 Signed-off-by: Patrick Georgi Original-Commit-Id: 802cba6f28a4e683256e8ce9fb6395acecdc9397 Original-Change-Id: I3a5983d4a40466bc0aa8ab3bd8430ab6cdd093cc Original-Signed-off-by: Furquan Shaikh Original-Reviewed-on: https://chromium-review.googlesource.com/284868 Original-Reviewed-by: Yen Lin Original-Reviewed-by: Aaron Durbin Original-Trybot-Ready: Furquan Shaikh Original-Tested-by: Furquan Shaikh Original-Commit-Queue: Furquan Shaikh Reviewed-on: http://review.coreboot.org/10898 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/arch/arm64/include/cpu/cortex_a57.h | 35 +++++++++++++++++++++++++++++++++ 1 file changed, 35 insertions(+) create mode 100644 src/arch/arm64/include/cpu/cortex_a57.h (limited to 'src/arch/arm64/include') diff --git a/src/arch/arm64/include/cpu/cortex_a57.h b/src/arch/arm64/include/cpu/cortex_a57.h new file mode 100644 index 0000000000..113a6ff946 --- /dev/null +++ b/src/arch/arm64/include/cpu/cortex_a57.h @@ -0,0 +1,35 @@ +/* + * This file is part of the coreboot project. + * + * Copyright 2015 Google Inc. + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc. + */ + +#ifndef __ARCH_ARM64_CORTEX_A57_H__ +#define __ARCH_ARM64_CORTEX_A57_H__ + +#define CPUACTLR_EL1 s3_1_c15_c2_0 +#define BTB_INVALIDATE (1 << 0) + +#define CPUECTLR_EL1 S3_1_c15_c2_1 +#define SMPEN_SHIFT 6 + +/* Cortex MIDR[15:4] PN */ +#define CORTEX_A53_PN 0xd03 + +/* Double lock control bit */ +#define OSDLR_DBL_LOCK_BIT 1 + +#endif /* __ARCH_ARM64_CORTEX_A57_H__ */ -- cgit v1.2.3