From 35b6bbb7217956fe29f5d7f29d3ce780f1e640f5 Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Sun, 28 Mar 2010 21:26:54 +0000 Subject: drop unneeded __ROMCC__ checks when the check for __PRE_RAM__ is more appropriate. Also, factor out post_code() for __PRE_RAM__ code and drop it from some mainboards. Signed-off-by: Stefan Reinauer Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5307 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/arch/i386/include/arch/cpu.h | 2 +- src/arch/i386/include/arch/hlt.h | 2 +- src/arch/i386/include/arch/io.h | 8 ++++---- 3 files changed, 6 insertions(+), 6 deletions(-) (limited to 'src/arch/i386/include') diff --git a/src/arch/i386/include/arch/cpu.h b/src/arch/i386/include/arch/cpu.h index d43c847cef..47d4baf63b 100644 --- a/src/arch/i386/include/arch/cpu.h +++ b/src/arch/i386/include/arch/cpu.h @@ -104,7 +104,7 @@ static inline unsigned int cpuid_edx(unsigned int op) #define X86_VENDOR_SIS 10 #define X86_VENDOR_UNKNOWN 0xff -#if !defined( __ROMCC__ ) && !defined(__PRE_RAM__) && defined( __GNUC__) +#if !defined(__PRE_RAM__) #include diff --git a/src/arch/i386/include/arch/hlt.h b/src/arch/i386/include/arch/hlt.h index 931e933fc7..ddfe169954 100644 --- a/src/arch/i386/include/arch/hlt.h +++ b/src/arch/i386/include/arch/hlt.h @@ -1,7 +1,7 @@ #ifndef ARCH_HLT_H #define ARCH_HLT_H -#if defined( __ROMCC__) && !defined(__PRE_RAM__) && !defined(__GNUC__) +#if defined(__ROMCC__) static void hlt(void) { __builtin_hlt(); diff --git a/src/arch/i386/include/arch/io.h b/src/arch/i386/include/arch/io.h index e2e15ec762..3a76579fbc 100644 --- a/src/arch/i386/include/arch/io.h +++ b/src/arch/i386/include/arch/io.h @@ -9,7 +9,7 @@ * (insb/insw/insl/outsb/outsw/outsl). You can also use "pausing" * versions of the single-IO instructions (inb_p/inw_p/..). */ -#if defined( __ROMCC__ ) && !defined (__GNUC__) +#if defined(__ROMCC__) static inline void outb(uint8_t value, uint16_t port) { __builtin_outb(value, port); @@ -42,7 +42,6 @@ static inline uint32_t inl(uint16_t port) return __builtin_inl(port); } #else - static inline void outb(uint8_t value, uint16_t port) { __asm__ __volatile__ ("outb %b0, %w1" : : "a" (value), "Nd" (port)); @@ -78,8 +77,7 @@ static inline uint32_t inl(uint16_t port) __asm__ __volatile__ ("inl %w1, %0" : "=a"(value) : "Nd" (port)); return value; } - -#endif /* __ROMCC__ && !__GNUC__*/ +#endif /* __ROMCC__ */ static inline void outsb(uint16_t port, const void *addr, unsigned long count) { @@ -136,6 +134,7 @@ static inline void insl(uint16_t port, void *addr, unsigned long count) ); } +#if 0 /* XXX XXX XXX This is a story from the evil API from hell XXX XXX XXX * We have different functions for memory access in pre-ram stage and ram * stage. Those in pre-ram stage are called write32 and expect the address @@ -173,6 +172,7 @@ static inline uint32_t readl(const volatile void *addr) { return *(volatile uint32_t *) addr; } +#endif #if !defined(__PRE_RAM__) static inline __attribute__((always_inline)) uint8_t read8(unsigned long addr) -- cgit v1.2.3